JP3271140B2 - Continuous processing apparatus and continuous processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a continuous processing apparatus used in the manufacturing process of various semiconductor devices, that is, an integrated device capable of performing a plurality of processes under the same vacuum environment. The present invention relates to a so-called multi-chamber apparatus and a continuous processing method.

[Summary of the Invention]

According to the present invention, in a continuous processing apparatus in which a plurality of processing chambers are connected via a gate valve, at least one of the processing chambers is a measurement chamber for film thickness measurement, component analysis, and the like. By doing so, it is possible to appropriately manage and control each process during the continuous process, so that a semiconductor device having desired characteristics can be obtained with a high yield.

[Conventional technology]

2. Description of the Related Art In recent years, a continuous processing apparatus, that is, an integrated processing apparatus so-called a multi-chamber apparatus that enables a plurality of processes to be performed in the same vacuum environment in a process of manufacturing various semiconductor devices has been spotlighted.

Examples of this type of continuous processing apparatus include, for example, NIKKEI MICRODEVICES, October 1989, Nos. 41-46.
Page or Proceeding of 6th (Proceeding of 6th)
-IEEE VMIC) 1989, June, pages 89 to 95, etc., as disclosed in, for example, a configuration in which a plurality of processing chambers, that is, chambers are connected to a common load lock chamber via gate valves. In a processing chamber, for example, a plasma decomposition CVD (chemical vapor deposition) process, a thermal decomposition CVD process, a dry etching process, and the like are separately performed.

According to this continuous processing apparatus, a method is adopted in which a semiconductor wafer subjected to each processing in a processing chamber is put into a next processing chamber under a vacuum environment without being exposed to the outside air, and the processing is performed. From this, natural oxidation or contamination of the surface is avoided between each treatment, and furthermore, for example, B ₂ O ₃ has a property that it can be reflowed or flattened at a relatively low temperature of about 450 ° C., but this deliqueshes. In the case of adopting the process of once drawing out to the atmosphere by having it, there are many advantages such as the use of unusable materials.

In addition, in the case of this type of continuous processing apparatus, the occupation area and equipment for all the processes of these multiple processes are reduced by omitting the handling between each operation and performing each operation in the same vacuum environment, and thus the clean room. There are many advantages that the apparatus can be reduced as a whole, the manufacturing operation cost can be reduced, etc. as the area of the device is reduced and saved.

In this type of apparatus, the processing conditions in each processing chamber are controlled such that the processing conditions are set to be substantially constant, and a semiconductor device having desired characteristics can be finally obtained by time control. It is in a state.

However, when such a continuous processing apparatus is used, even if some of the steps are inconvenient, the work is completed up to the final step, and after removing the semiconductor wafer from the continuous processing apparatus, Only by measuring the characteristics of the obtained semiconductor device, it is possible to know that a problem has occurred in the processing in this device. Therefore, even if the cause of the defective product is caused by the processing at a relatively early stage of a plurality of processings, each work is advanced to the last processing, so that the working time and the operating cost are remarkably wasted. Come. Further, even when such a problem occurs in the characteristics, it may not be possible to determine which processing step caused the problem by measuring the characteristics of the semiconductor device finally taken out.

[Problems to be solved by the invention]

The present invention enables a plurality of processes to be continuously performed in the same vacuum environment in the continuous processing device described above, that is, a multi-chamber device as an integrated process device. It is possible to perform observation and measurement of the processing state on the way, and to control and manage each processing in a continuous process, thereby avoiding the useless work described above, and further improving yield and improving characteristics. This makes it possible to reliably obtain a semiconductor device.

[Means for solving the problem]

In the present invention, a plurality of processing chambers (1 ₁ ) (1 ₂ ) (1 ₃ ) ‥‥ are provided for a common load lock chamber 4 as shown in FIG. In a continuous apparatus connected via gate valves (2 ₁ ) (2 ₂ ) (2 ₃ )} at least one of the processing chambers (1 ₁ ) (1 ₂ ) (1 ₃ )} A measurement room equipped with equipment (3) capable of performing various measurements such as, for example, film thickness measurement component analysis in (1 _n ).

[Action]

According to the above-described apparatus of the present invention, by providing a measurement chamber in at least one of the plurality of processing chambers, the object to be processed, that is, the semiconductor wafer after each processing or a part of the processing has passed, or For another so-called dummy wafer that adopted the same processing steps,
For example, the processing state can be known in the middle of the processing step, and if any inconvenience occurs in the processing, control and management of the processing are performed by performing necessary measures such as correcting the conditions of the processing. It can be performed appropriately. Therefore, a semiconductor device having desired characteristics can be obtained with high yield.

Further, when it is found from the above-mentioned measurement that a certain inconvenience has occurred in a certain processing operation, the subsequent continuous processing is stopped, thereby eliminating unnecessary processing and reducing operating costs. Cost reduction can be achieved.

〔Example〕

An example of the continuous processing apparatus and the continuous processing method according to the present invention will be described with reference to FIG.
A plurality of processing chambers, that is, chambers (1 ₁ ) (1 ₂ ) (1 ₃ ) ‥‥ (1 _n ) are provided for each load lock chamber (4) by the gate valves (2 ₁ ) (2 ₂ ) (2 ₃ ). ) ‥‥ (2 _n ). Further, a spare chamber (5) is similarly connected to the load lock chamber (4) via a gate valve (52). An object to be processed (6), for example, a semiconductor wafer for obtaining a target semiconductor device, is brought into the preparatory chamber (5) and arranged there. A dummy object (61), for example, a dummy semiconductor wafer is brought.

A handling robot (7) is provided in the load lock chamber (4), and the workpiece (6) or the dummy workpiece (61) in the preliminary chamber (5) is carried out by the handling robot (7). (1 ₁ ) (1 ₂ ) ‥‥ or the measurement room (1 _n ).

The gate valves (2 ₁ ) (2 ₂ ) ‥‥ (2 _n ) and (52) of the chambers (1 ₁ ) (1 ₂ ) (1 _n ) and (5) are respectively provided with the object (6 ) And a slit through which a dummy object can be carried in and out, and comprises, for example, an electromagnetic opening / closing valve which can be airtightly closed. When the valve is closed, each chamber (1 ₁ ) (1 ₂ ) ‥‥
(1 _n ) and (61) can be made hermetically independent of each other.

In the measurement chamber (1 _n ), for example, measurement equipment (3) for film thickness measurement, component analysis, etc., for example, a film thickness measurement device for boron detection by X-ray induced fluorescence analysis or an interference spectrum, or an atomic force microscopy AFM (Atomic Force) Microscop
y), a surface shape observation device using a scanning electron microscope (SEM) or the like is arranged.

An example of the continuous processing method according to the present invention when the present invention is applied to a manufacturing process of a semiconductor device using the apparatus of the present invention will be described with reference to the process chart of FIG. In this example, as shown in FIG. 2A, for example, an object to be processed (6) is formed on a semiconductor substrate (71) such as a silicon wafer on a first wiring such as a phosphorus-doped polycrystalline silicon layer, a wiring made of Al metal or the like. (7
2) are arranged with, for example, an interval and a thickness of about 0.6 μm. Then, an upper layer second wiring is provided thereon. In this case, the first wiring (72) is formed on the first wiring (72) so that a short circuit or a disconnection does not occur between the second wirings. This forms an interlayer insulating layer having a flat surface.

In this case, first, as shown in FIG. 2B, for example, in the first processing chamber (1 ₁ ) shown in FIG. ₁ , an organic silane, for example, tetraethoxysilane (TEOS) is used, and SiO _{2 is formed} by CVD by plasma decomposition using TEOS. One insulation layer (73) is 1000Å
It is formed to a thickness of about. Obtained by this plasma decomposition
It is known that the SiO ₂ insulating layer (73) can be applied with relatively good coverage, that is, coverage, despite the presence of the uneven surface due to the presence of the underlying first wiring (72).
In addition, the SiO ₂ insulating layer (7
3) is a compensation film for the problem that the SiO ₂ insulating film of the following O ₃ -TEOS decomposition has a problem in reliability such as quick etching. Yet another second process chamber over this (1 ₂₎ O ₃ -TEOS first by the thickness of the example 2000Å as shown in FIG. 2 C by performing thermal decomposition CVD second SiO ₂ insulating layer (74 )
To form This film has better coverage than the previous plasma-TEOS insulating film.

Thereafter, showing the anisotropic etching by dry etching in FIG. 2 D and etched back of the thickness of the surface, for example, from 2000Å of SiO ₂ insulating layer (74) in the example the third treatment chamber (3 ₁₎ from the surface As described above, the side wall (75) is formed on the side surface of the unevenness due to the presence of the first wiring (72).

Then, as further shown in FIG. 2 E, for example, the first treatment chamber (1 ₁₎ third SiO ₂ insulating the O ₃ -TEOS in plasma -TEOS and the second processing chamber (1 ₂₎ in the above The layer (76) is formed to a thickness of about 3000 mm.

Next, for example, in the same first processing chamber (1 ₁ ), for example, B ₂ O ₃ or BSG (boron silicate glass) is deposited to about 3000 ° by CVD while changing the feed gas.
In this case, FIG.
As shown in the figure, a surface flattened filling insulating layer (77) in which recesses on the surface of the insulating layer (76) are buried and the surface is almost flattened
Is formed. In this case, even a deliquescent insulating layer such as B ₂ O ₃ is formed as a series of operations that are not exposed to the outside air, thereby impairing the film quality or impairing the characteristics of the semiconductor. Never do.

Further, as shown in FIG. 2G, the surface flattened filling insulating layer (77) of B ₂ O ₃ or the like is entirely formed to a thickness of about 3000 mm from the surface, for example, by the reactivity of the _third processing chamber (1 ₃ ). In the ion etching processing chamber, high-speed etching using, for example, NF ₃ is performed to planarize the surface.

Thereafter, as shown in FIG. 2H, the SiO ₂ insulating layer (72) and B ₂
O is etched back over the thickness of about 6000Å by reactive ion etching using CHF ₃ + O ₂ having a constant speed of etching against each layer of filling insulating layer such as a ₃ (77).
In this way, for example, the filling insulating layer (77) having deliquescent property such as B ₂ O ₃ is entirely removed, and the surface thereof is flattened.

Then, for example, as shown in FIG.
To a thickness of 4000 mm, for example, by changing the supply gas in the processing chamber (1 ₁ ) described above by plasma CVD.
To form an insulating layer (78), and an interlayer insulating layer (79) made of the insulating layers (73), (74), (76), and (78) whose surface is flattened.

Thus, the interlayer insulating layer (79) whose surface is flattened by the continuous processing apparatus having the respective processing chambers (1 ₁ ) to (1 ₃ ) is obtained. On the insulating layer (79), a second wiring (8
0) is formed.

In this way, the upper second layer is formed by the interlayer insulating layer (79).
In addition, the lower first wirings (80) and (72) are electrically insulated and the upper wiring (80) is formed on a flat insulating layer so as not to cause disconnection or the like. To obtain a semiconductor device.

In such a process, in particular, in the present invention, the first
For example, a dummy wafer (61) is brought from the preliminary chamber (5) by the handling robot (7) in the continuous processing apparatus described in FIG. 2) forming the second SiO ₂ insulating layer (74) and performing the etching of the second SiO ₂ insulating layer (74) in the second processing chamber (1 ₂ ).
After the process is performed in the third processing chamber (1 ₃ ), it is brought to the measuring chamber (1 _n ) and its film thickness is measured. Further, after a similar dummy wafer (61) is subjected to the same steps as described with reference to FIGS. 2E and 2F, for example, a boron concentration measurement and a thickness measurement are performed in a measurement chamber (1 _n ) to obtain a required insulating layer. It is confirmed whether or not is formed. Further, the same operation as that shown in FIGS. 2G and 2H is carried out in a dummy, and then brought into the measurement chamber (1 _n ). It is detected whether it is not present, that is, whether the boron layer is surely removed.

As described above, for example, after the required processing steps are performed using the dummy wafer (61), the measurement is performed in the measurement chamber (1 _n ) to determine whether each processing is performed well or within an allowable range. , It is possible to check and detect whether each process is working normally or whether the process is as designed. Therefore, based on this, it is possible to accurately correct and control the conditions of each processing.

In the above-described example, the measurement of the dummy wafer is performed. However, each measurement may be performed on a wafer that is actually used for manufacturing a finally obtained semiconductor device.

In the above-described example, the present invention is applied to the case where an interlayer insulating film is formed. However, the present invention can be applied to other various semiconductor device manufacturing processes.

〔The invention's effect〕

According to the above-described apparatus of the present invention, the object to be processed after each processing, or a part of the processing, that is, the semiconductor wafer, is provided by providing the measurement chamber in at least one of the plurality of processing chambers, or For another so-called dummy wafer adopting the same processing step, the processing state can be known, for example, in the middle of the processing step, so that if any inconvenience occurs in the processing, this processing It is possible to appropriately control and manage the processing such as performing necessary operations such as condition correction, so that a semiconductor device having desired characteristics can be obtained with a high yield.

Further, according to the method of the present invention, when it is known from the above-mentioned measurement that a certain inconvenience has occurred in a certain processing operation, the processing is interrupted to eliminate subsequent unnecessary processing. As a result, the operating costs can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of an example of a continuous processing apparatus according to the present invention, and FIG. 2 is a process diagram of an example of a manufacturing process of a semiconductor device to which the apparatus is applied. (1 ₁ ) (1 ₂ ) ‥‥ is a processing room, (1 _n ) is a measurement room, (4) is a load lock room, (7) is a handling robot,
(2 ₁ ) (2 ₂ ) ‥‥ (5 ₂ ) are gate valves.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification code FI H01L 21/205 H01L 21/205 21/66 21/66 G

Claims (2)

(57) [Claims] At least three or more processing chambers are connected to one common load lock chamber via gate valves, respectively, and at least one of the processing chambers is a measurement chamber.
At least two other processing chambers are non-measurement processing chambers. 2. An object to be processed in an arbitrary processing chamber without exposing the object to the atmosphere from one load lock chamber commonly provided to at least three or more processing chambers via respective gate valves. A method for continuously processing an object to be processed, comprising a plurality of processing steps for performing the processing on the object to be processed without exposing the object to the atmosphere through the common one load lock chamber. A continuous processing method characterized by performing a measurement step of knowing a processing state of the processing step in the processing chamber other than the processing chamber.