JP3264043B2 - Quantization control device and method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quantization control device and method related to bit reduction for reducing the bit rate of a digital video signal in a digital video signal recording device.

[0002]

2. Description of the Related Art A digital VTR for recording a digital video signal on a magnetic tape by a rotary head, for example, is known. Because of the large amount of digital video signal information,
High-efficiency coding for compressing the transmission data amount is often adopted. Among various high efficiency codings, DC
The practical use of T (Discrete Cosine Transform) is in progress.

[0003] DCT converts one frame of image into, for example, (4
× 4), and the block is subjected to a cosine transform process, which is a type of orthogonal transform. As a result, (4 × 4) coefficient data is generated. Such coefficient data is recorded after being subjected to a variable-length encoding process such as a run-length code and a Huffman code. At the time of recording, in order to facilitate data processing on the reproduction side, a code signal as an encoded output is inserted into a data area of a fixed-length sync block, and a synchronization signal, I
A frame forming a sync block to which the D signal is added is formed.

A digital VTR using a magnetic tape,
In a disk recording device or the like using a disk-shaped recording medium, one field or one frame of video data is usually recorded on a plurality of tracks. However, when a variable-length output is formed as in the above-described DCT, the data amount in these predetermined periods fluctuates. For this reason, equalization processing (also referred to as buffering) for reducing the data amount in a predetermined period to a target value or less is required.

[0005] As an example of the equalization processing, a predetermined period shorter than one field or one frame (referred to as equalization unit), for example, the data amount of one sync block is controlled.
Even whole 1 field or 1 frame period, equal length processing for the data amount equal to or less than the target value have been proposed.

Digital VTR for performing the above-mentioned equal length processing
Will be described with reference to FIGS. 1 and 2.
FIG. 1 shows the overall configuration of a digital VTR recording system based on bit reduction using DCT. FIG.
It includes processing digital video signals and processing PCM audio signals.

The configuration of a video signal system will be described. An input video signal is divided into blocks and is shuffled by a shuffling circuit 1.
Blocking and shuffling are performed. By the blocking, the video data in the raster scan order is converted into, for example, data of a (4 × 4) DCT block structure. In shuffling, for example, a DCT block within one frame is used to prevent errors from being concentrated and irreparable due to tape scratches, clogging of a head, and the like, and as a result, deterioration of image quality is not conspicuous. The unit is to change the array.

The output of the blocking and shuffling circuit 1 is supplied to a DCT (discrete cosine transform) circuit 2,
Are orthogonally transformed. From the DCT circuit 2, each DCT
DCT coefficient data including one DC component data and 15 AC component data is generated for the block. This DCT
The coefficient data is divided into equal length units, and the quantization control circuit 3 determines an optimum quantization index 12 for each equal length unit. In the quantizer 4, the control circuit 3
DCT based on the quantization index 12 determined in
Quantizes the coefficient data. That is, the coefficient data for AC is divided by an appropriate quantization level, and the quotient is converted to an integer. As an example, the quantization control circuit 3
Is a block for recording on a tape the encoded output of 10 blocks of the luminance signal Y and the encoded output of 5 blocks of each of the color difference signals BY and RY (this unit is a sync block). ) Is determined.

The output of the quantization control circuit 3 is supplied to a quantization circuit 4 and performs quantization by dividing a DCT coefficient by a quantization level determined by a quantization index 12. The output of the quantization circuit 4 is a variable length encoder 5
And compresses the quantized DCT coefficients by variable-length coding using entropy codes. Compressed DC
The T coefficient is collected by the buffering circuit 6 for each sync block, and the outer code encoding circuit 7 adds an outer code parity for error correction.

An audio signal given as an input is shuffled by a shuffling circuit 8 to facilitate correction at the time of reproduction, and an outer code for error correction is added by an outer code encoding circuit 9. The adder adds the video and audio signals to which the parity of the outer code is added, and the inner code encoder 10 adds the parity of the inner code for error correction. Then, the data is recorded on the tape T after being channel-coded by the channel coding circuit 11.

Here, the relationship between the quantization level and the quantization index will be described. The quantization level is actually used for dividing or multiplying by a quantizer or an inverse quantizer. . As the quantization level, a plurality of values that change in a predetermined relationship are set. A number for identifying the plurality of quantization levels is a quantization index. Although the quantization level itself may be recorded / reproduced, the quantization index is recorded on the tape because the quantization index can reduce the number of bits. However, when the bit number of the quantization level is relatively small, the quantization level itself can be used instead of the quantization index in the following description.

Next, the structure of the reproducing system will be described with reference to FIG. 2. A signal reproduced from the tape T is subjected to channel coding by a channel decoding circuit 21 and an inner code is used by an inner code decoding circuit 22. Perform error correction. Next, the data is divided into video data and audio data, and the audio data is subjected to error correction using an outer code by an outer code decoding circuit 23 and deshuffled by a deshuffling circuit 24. A reproduced audio output is obtained from the deshuffling circuit 24.

The video data from the inner code decoding circuit 22 is subjected to error correction using an outer code in an outer code decoding circuit 25. After that, the variable length code decoding circuit 26 decodes the variable length code. The output of the decoding circuit 26 is supplied to an inverse quantization circuit 27. The inverse quantization circuit 27 multiplies the data by a quantization level determined by the recorded quantization index. Next, this data is subjected to inverse DCT by an inverse DCT circuit 28, block-formed, and deshuffled by a deshuffling circuit 29 to have the same format as the input image data. Data that cannot be corrected by the error correction code is corrected by the correction circuit 30.

In the quantization performed by the quantization circuit 4 of FIG. 1, it is necessary to use an optimum quantization level for each equal length unit. As for the quantization level, the larger the value, the stronger data compression can be performed, but on the other hand, the image quality deteriorates. Therefore, it is necessary to minimize the value of the quantization level within the range permitted by the bit rate. And digital VT
In a process in which R encodes, for example, an original image signal from a video camera by DCT and records it on a tape, and decodes reproduction data from the first generation tape to obtain a first generation image, a process of recording / reproducing data includes By referring to the quantization index indicating the quantization level, the same quantization level can be used for encoding and decoding.

However, the first generation image from the reproduction VTR is transmitted to the recording VTR via the interface,
At the time of dubbing to create a second generation tape by the recording VTR, it is necessary to use the same quantization level as used when creating the first generation image from the original image. The same applies to the case where the first generation image is processed via the switcher and the special effect generator, and the processed image is recorded. The reason is that, whether the quantization level is larger or smaller than this value, the image quality is deteriorated as compared with the first generation image.

In a home VTR or communication system, this quantization level can be transmitted separately.
In the case of a commercial / broadcast VTR in which a digital interface such as 01 is used, it is difficult to transmit this quantization level or quantization index in view of its format. You have to decide.

The quantization control circuit 3 is provided for determining an optimum quantization level and searching for the original quantization level during dubbing. That is, the quantization control circuit 3 needs to determine a quantization level (quantization index) that satisfies the following points. First, at the time of normal recording, the minimum quantization level at which data falls within an equal length unit, for example, a sync block. Second, at the time of dubbing, the quantization index is the same as that used previously.

Regarding the first request, the present applicant has proposed a technique called binary search. Binary search is based on the relationship between the quantization level and the total code length after variable-length encoding is monotonically decreasing, that is, using the relationship that the total code length decreases as the quantization level increases.
Determine the value of the optimal quantization level. More specifically,
The binary search is determined by log ₂ (the width of the quantization level) by reducing the width of the quantization level by half.

As an example, it is assumed that the relationship between the quantization index and the total code length is as shown in FIG. Assuming that the total code length of an equal length unit, for example, one sync block, is 5, the optimum quantization level in this case is to find the minimum value such that the total code length becomes 5 or less.

The binary search is performed in the following steps. Step 1: The quantization index is set to 7. Since the total code length at this time is 4.9, the optimal quantization index is in the range of 0 or more and 7 or less. Step 2: Set the quantization index to 3. Since the total code length at this time is 11.0, the optimal quantization index is in the range of 4 or more and 7 or less. Step 3: The quantization index is set to 5. Since the total code length at this time is 7.4, the optimal quantization index is in the range of 6 or more and 7 or less. Step 4: The quantization index is set to 6. Since the total code length at this time is 6.0, the optimal quantization index is determined to be 7. As described above, the optimum quantization index is obtained in log ₂ (16) = 4 steps.

At the time of dubbing, if the quantization index is determined by the above-described binary search, it becomes smaller than the previous one. An actual example is shown in FIG.
FIG. 4 is a graph in which the relationship between the quantization index and the total code length is plotted for the original (one that has never been dubbed) and the dubbing (data after recording / reproducing with the quantization index 62). The solid line 14 indicates the original relationship, and the broken line 15 indicates the dubbing relationship. The target total code length is represented by a horizontal dashed line TQ.

As can be seen from FIG. 4, in the original, the quantization index 62 is the minimum value within the target code length, whereas in the dubbing, the quantization index 59 is the minimum value. That is, if the result of the binary search is used as it is, the quantization becomes 59 which does not match the previous quantization index, and the image quality is deteriorated. When dubbing is repeated, deterioration of image quality increases.
As a method for dealing with this, the present applicant has previously proposed a technique called back search.

The back search utilizes the fact that, in the case of dubbing, data after DCT generated for an image once recorded / reproduced is a multiple of the previous quantization level. . The operation of quantization / inverse quantization is an operation of “divide, round, and multiply”. Because of the operation of “multiply”, data after DCT processing at the time of dubbing is performed at the time of previous recording / reproduction. It takes the form of a multiple of the quantization level.

Focusing on this point, in the earlier application, the sum of the remainder of the quantization index determined by the binary search and the quantization index for several factors larger than that is determined. Among them, the one with extremely small value is D
Since the data after the CT processing is in a multiple relation of the previous quantization level, the quantization index giving the minimum remainder is the previous quantization level. If there is no extremely small image, the image is not an image recorded and reproduced before, that is, an original image. Therefore, a quantization index determined by a binary search is used as it is.

As a specific example, FIG. 5 shows a plot of the relationship between the quantization index and the sum of the remainder at the quantization level for the same data as in FIG. 4 for the original and dubbing. The solid line 16 is dubbing, and the broken line 17 is original. As can be seen from FIG. 5, in dubbing, the total remainder is small at a quantization index of 62. Also, while the original uses the value of the binary search as it is as the quantization level, the dubbing uses the value of the back search as the quantization index because a clear minimum point is found during the back search. become.

As described above, the back search is a very effective method at the time of dubbing, and its circuit configuration is as shown in FIG. In FIG. 6, n sections to which the DCT coefficient data is input are provided in parallel. Each section is provided with a quantizer 31, an inverse quantizer 32, a subtractor 33, an absolute value circuit 34, and an accumulator 35.

First, the input data after the transform coding in the quantizer 31 is quantized at a quantization level determined by a certain quantization index. Next, the inverse quantizer 32 performs inverse quantization at the quantization level. In the subtractor 3, quantization and
Find the difference between the inversely quantized data and the input data. This difference is the remainder when divided by the quantization level. Next, the difference is made an absolute value by an absolute value conversion circuit 34,
In step 5, integration is performed in sync block units.

The above processing is performed by the quantization index determined by the binary search and several points larger than the quantization index (that is, +1, +2,.
.., + n) for each section in parallel. The minimum value detection selector 36 determines that the input data is considered to be a multiple of the quantization level if any of the remainders for the quantization indexes obtained in parallel is clearly smaller than the other. Output the quantization index. If there is no clearly small one, the quantization index determined by the binary search is output as it is.

[0029]

However, the circuit configuration proposed above requires a large number of quantizers and inverse quantizers. A quantizer or inverse quantizer is usually
Since it is composed of a multiplier and a shift circuit, the circuit scale becomes large, and it is very difficult to realize it with an IC or the like.

Accordingly, an object of the present invention is not to obtain the remainder itself, but to obtain a decimal part instead of the remainder, thereby achieving the same quantization control with a small hardware scale. apparatus
And a method .

[0031]

SUMMARY OF THE INVENTION claims 1 invention, the digital video signal to an orthogonal transformation and-coding with variable length <br/> and monitor, the target data amount of the coded output of equal length units A quantization control device for controlling coefficient data generated by orthogonal transformation to a value equal to or less than a target value, and for generating first quantization information for reducing a data amount of an encoded output of an equal length unit to a target value or less. Determining means, supplied with coefficient data and first quantization information, and divides each of the coefficient data by the first quantization information and several larger pieces of second quantization information; Find the decimal part of
Means for calculating the integrated value of the conversion unit, and
Detects the presence or absence of a small integrated value
The quantization, if any, that results in the integrated value
If you select information and there is no apparently small integrated value
Means for selecting first quantization information
And the quantization information selected by the quantization information determination means.
Is a quantization control device used to quantize coefficient data .

[0032]

The optimum quantization index for reducing the data amount to the target value or less is received, and quantization is performed by using this quantization index and several quantization indexes larger than the quantization index. The previous quantization index can be determined from the decimal part of the quantization result. Therefore,
The need for an inverse quantizer is eliminated, and the configuration can be simplified.

[0033]

An embodiment of the present invention will be described below. The present invention mainly relates to a back search, and a process of obtaining a quantization index by a binary search can be performed by a configuration similar to that of the above-mentioned earlier application. FIG. 7 shows a configuration including a multiplier and a shift circuit used as a quantizer in the present invention.
Since the quantizer is the division as a calculation, but it as used the divider would otherwise, divider to become hardware large, often implemented with adder and a shift circuit multiplication.

In FIG. 7, reference numeral 37 denotes a multiplier to which coefficient data generated by the DCT is supplied. The output of the multiplier 37 is supplied to a shift circuit 38 at the next stage. A quantization level multiplier table 39 is provided in association with the multiplier 37, and a quantization level shift amount table 40 is provided in association with the shift circuit 38. These tables are realized by a ROM. For example, it is assumed that a quantizer is configured by using a multiplier 37 and a shift circuit 38 each having a 16-bit multiplicand and a multiplier. At this time, if it is assumed that the quantization level is 3, the division of the input data by 3 can be realized, so that the multiplier 37 requires 43691 (0AAABh).
, And shifting by 18 bits.

Normally, the fractional part of the shifted result is used at most for rounding. However, if the input data is a multiple of the quantization level, the fractional part is 0. Yes, otherwise some number. Therefore, the multiple relationship of the input data can be determined by calculating the sum of the fractional parts.

FIG. 8 shows a circuit configuration of an embodiment of the present invention based on this. First, the input data after the conversion and encoding are all converted into absolute values by the absolute value conversion circuit 41.
This is in consideration of the fact that positive / negative information is not required for the determination of the multiple relationship, and that if the absolute value is set, the subsequent calculation is simplified. Next, in the multiplier 42, multiplication is performed in the same manner as when quantization is performed with a certain quantization index. In the example of quantization of dividing by 3 described above, 4396
This is equivalent to multiplying by one. The result is shifted by the shift circuit 43 so that the decimal point is aligned, and only the decimal part is extracted. Although not shown in FIG. 8, the quantization level multiplier table and quantization level shift amount table in FIG. 7 are provided in association with the multiplier 42 and the shift circuit 43, respectively.

In the next absolute value conversion circuit 44, the following operation corresponding to obtaining a kind of absolute value is performed on the decimal part. f (x) = x (x <0.5) f (x) = 1−x (x ≧ 0.5)

This is because, for example, when the decimal part is 0.9, it is rather assumed that the decimal part is -0.1 and the value is set to 0.1. The accumulator 45 accumulates the absolute value of the decimal part in sync block units. Such processing is performed by the quantization index determined by the binary search and several points larger than the quantization index (+1 is added to the quantization index,
+2,..., + N).

The maximum value detection / minimum value detection selector 46 calculates the maximum of the decimal integrated value for each quantization index obtained in parallel. This value is halved by the shift circuit 47, and this and the decimal integrated value for each quantization index are detected by the maximum value detection / minimum value detection selector 4.
6 and the maximum value detection / minimum value detection selector 46
The quantization index of the smallest of these values is output.

[0040] This is, as follows, based on the fact that previous data is the determination of whether the quantization and inverse quantization. If less than half of the minimum maximum values of the fractional accumulated value, apparently regarded as small, it is determined that multiple related, it is determined that there is no particular ploidy if Re Otherwise such only.

[0041] In order to make this determination easier is the quantization index to determine the 1/2 binary search of the maximum value and the monitor is placed in the maximum value detection and minimum value detection selector 46. If the minimum value is not more than 1/2 of the maximum value, the quantization index is selected. Otherwise, the quantization index is selected because 1/2 of the maximum value is the minimum value. In the end, the maximum value detection / minimum value detection selector 46 is composed of a circuit for obtaining the maximum value among all the decimal integrated values, and a circuit for obtaining the minimum value among all the decimal integrated values. And a selector for outputting a quantization index based on the number.
It is composed of one.

FIG. 9 shows an example of the maximum value detection / minimum value detection selector 46. The minimum value detecting circuit 48 detects the minimum value among the input decimal integrated values, and generates a select signal indicating which quantization index the minimum value corresponds to. According to this select signal, the selector 49
Selectively outputs a predetermined one of the input quantization indices. Further, the decimal integrated value is supplied to the maximum value selection circuit 50. The maximum value selection circuit 50 selectively outputs the maximum value among the decimal integrated values.

In order to facilitate understanding of one embodiment of the present invention, its operation will be described below using specific values.
One sync block is composed of three data (-12345, 57
58, -10207). Also,
It is assumed that the quantization index, the multiplier of the multiplier, and the shift amount are as shown in Table 1. The contents of Table 1 are stored in the ROM as a table.

[0044]

[Table 1]

FIG. 10 shows a case in which quantization and inverse quantization have not been performed, that is, an original case. First, the absolute value is converted by the absolute value conversion circuit 41 to (12345,5
758, 10207). Hereinafter, since the processing is performed in parallel, only the uppermost stage will be described. Others are exactly the same except that the value of the quantization index is different. The multiplier 42 multiplies the absolute value data. Since the quantization index is 50, the data is multiplied by a multiplier 140 according to Table 1. The resulting data is (172
8300, 806120, 1428980).

The output of the multiplier 42 is supplied to the shift circuit 4
Shifted by three. Since the quantization index is 50, the shift amount is 14. However, if 8 bits are to be obtained by shifting by 14-8 = 6 in order to take out 8 bits below the decimal, (124, 51, 55) is obtained. Next, the absolute value conversion circuit 4
At 4, the arithmetic operation given by the above equation is performed. Since the decimal number is represented by 8 bits, 0.5 is 128. Therefore, 1
For those with 28 or more, subtraction from 256 is performed.
In this case, since there are no 128 or more, the output data of the absolute value conversion circuit 44 is (124, 51, 55). Next, the accumulator 5 calculates the total sum of the data series in sync block units. 124 + 51 + 55 = 230. This 2
30 is a decimal integrated value for the quantization index 50.

Similarly, the decimal integral value 154 for the quantization index 51, 184 for the quantization index 52, the decimal integral value 170 for the quantization index 53, and the decimal integral value 2 for the quantization index 54
46, and a decimal integrated value 200 relating to the quantization index 55 is obtained by each of the parallel sections.

The maximum value detection / minimum value detection selector 46
It can be seen that the maximum value of this decimal integrated value is 246. This is used as a criterion for determining whether or not the minimum value has a multiple relationship. The maximum value is divided by 2 into 123 by the shift circuit 47. One half of this maximum value is used as a decimal integrated value 123 with respect to the quantization index 50, together with other decimal integrated values, for the maximum value detection / minimum value detection selector 46.
Is input to Maximum value detection / minimum value detection selector 46
Outputs the quantization index that takes the minimum value among them. In this case, since the minimum value is 123, the corresponding 5
0 is output as the quantization index. This means that the half value (= 123) of the maximum value is smaller than the minimum value (= 154), that is, there is no clearly smaller value, so that the quantization index 50 of the binary search is selected. .

Next, the input data is converted to a quantization index 5
Consider the case where quantization / inverse quantization is performed at 1, that is, at the time of dubbing. As shown in FIG. 11, the input data sequence is (-12349,574) by quantization and inverse quantization.
7, -101478). Thereafter, the multiplier 41, the shift circuit 43, the absolute value conversion circuit 44, and the accumulator 45 operate as described above.

As a result, for the maximum value detection / minimum value detection selector 46, the decimal integrated value 223 for the quantization index 50, the decimal integrated value 2 for the quantization index 51, the decimal integrated value 220 for the quantization index 52, Decimal integrated value 1 relating to quantization index 53
25, decimal integrated value 22 relating to quantization index 54
5. Decimal integrated value 253 related to quantization index 55
Is entered. Maximum value detection / minimum value detection selector 46
Detects and outputs the maximum value 253 among them. This maximum value is halved by the shift circuit 47 and input to the maximum value detection / minimum value detection selector 46 again as a decimal integrated value 126 relating to the quantization index 50. In this case, since the minimum value is 2, the corresponding 51 is output as the quantization index.

As described above, in the original, the quantization index determined by the binary search is output as it is as the determined quantization index, and a quantization index that has a multiple relationship during dubbing is output.

[0052]

According to the present invention, the optimum quantization index can be determined from the DCT coefficient data not only in the first generation but also in the multi-generation where the information of the quantization index cannot be received.
Image quality can be prevented from deteriorating.

Further, according to the present invention, the circuit scale for the back search can be made very small as compared with the previously proposed one. The following can be cited as the reason. First, as compared with the previously proposed configuration, an inverse quantizer is not required, and therefore, the number of multipliers and shift circuits is reduced to half. In particular, a multiplier requires a large number of gates, and reducing the number of multipliers is effective in reducing the circuit scale. Second, when the recording system and the reproduction system are separated and integrated into an IC, the previously proposed configuration requires a ROM for inverse quantization also in the recording system. Only the ROM needs to be provided in the recording system. Third, the previously proposed arrangement required a subtractor to find the remainder, but the invention is not required. Fourth, in the configuration proposed above, it is difficult to realize a circuit for determining that the remainder is clearly small, whereas the present invention is extremely simple.

As an example, a digital VTR IC having n = 10 as the number of points for performing the back search is realized. The gate size was able to be realized with about 30,000 gates. This is a gate size of 以下 or less (estimated) as compared with the previously proposed one.

[Brief description of the drawings]

FIG. 1 is a block diagram of a recording system of a digital VTR to which the present invention can be applied.

FIG. 2 is a block diagram of a reproduction system of a digital VTR to which the present invention can be applied.

FIG. 3 is a schematic diagram illustrating an example of a relationship between a quantization index and a total code length.

FIG. 4 is a schematic diagram illustrating a relationship between a quantization index and a total code length for original and dubbing, respectively.

FIG. 5 is a schematic diagram showing a relationship between a quantization index and a total remainder for original and dubbing, respectively.

FIG. 6 is a block diagram showing a configuration for a previously proposed back search.

FIG. 7 is a block diagram illustrating an example of a quantizer.

FIG. 8 is a block diagram illustrating an example of a quantization control circuit to which the present invention is applied;

FIG. 9 is a partial block diagram of one embodiment of the present invention.

FIG. 10 is a block diagram for explaining the operation of one embodiment of the present invention.

FIG. 11 is a block diagram for explaining the operation of one embodiment of the present invention.

[Explanation of symbols]

 2 DCT circuit 3 Quantization control circuit 4 Quantizer 5 Variable length encoder 41 Absolute value circuit 42 Multiplier 45 Accumulator 46 Maximum value detection / minimum value detection selector

Claims (3)

(57) [Claims] [Claim 1] When orthogonal transform and-coding with a variable length digital video signal and monitor, quantization control instrumentation for controlling the data amount of the coded output of equal length units below the target value
The coefficient data generated by the orthogonal transform is supplied, and the data amount of the encoded output of the equal length unit is set to be equal to or less than the target value.
Means for determining a first quantization information, the coefficient data and the first quantization information is supplied, the a first quantization information, few a larger first
The second quantization information by dividing each of the coefficient data, determine the fractional part of the division result, the like of the decimal part
Means for calculating the integrated value of the lengthening unit and the presence or absence of an apparently smaller integrated value among the above integrated values are detected.
If there is an apparently small integrated value,
Select the quantization information that produces the integrated value, and
If there is no smaller integrated value, the first amount
And a quantization information determining means for selecting the coca information, quantization information selected by the quantization information determining unit, the upper
A quantization control device used to quantize the coefficient data . 2. The quantization control device according to claim 1,
Wherein the quantization information determination means comprises: means for converting coefficient data into an absolute value; n number of multiplication means coupled to the absolute value means; and shift means respectively coupled to the multiplication means. ,
Means for generating a multiplier for the multiplying means and a shift amount indicating signal for the shifting means based on each of the inputted first quantization information and the second quantizing information ; and absolute value means which is coupled respectively to the above absolute value means, selectively outputs the accumulation means for generating the <br/> integrated value, the maximum value in the output of the accumulator means as well as to detect the minimum value, and maximum value detection and minimum value detection selector means quantization information corresponding to the detected minimum value to output selectively, the value and the first in which the maximum value 1/2 to quantization control apparatus of the quantization information, characterized in that it consists of a means for providing to said selector means. 3. An orthogonal transform of a digital video signal.
Both when-coding with variable length, of equal length unit of encoded output
Quantization control method to control data amount below target value
The coefficient data generated by the orthogonal transformation is supplied and equalized.
To reduce the amount of encoded output data per unit to or below the target value.
Determining first quantization information; providing the coefficient data and the first quantization information;
And the first quantization information and several larger
Each of the coefficient data is divided by two pieces of quantization information.
Calculate the decimal part of each division result, and calculate the decimal part
Calculating the integrated value of the lengthening unit, and detecting whether there is an apparently small integrated value among the integrated values.
If there is an apparently small integrated value,
Select the quantization information that produces the integrated value, and
If there is no smaller integrated value, the first amount
And a quantization information determining step of selecting coca information, quantization information selected by the quantization information determining step
Is the quantization code used to quantize the coefficient data.
Control method.