JP3263850B2 - Signal processing circuit and image display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a moving picture such as a television of an interlace system (a system in which 262.5 scanning lines are output in one field) or a double-speed scanning system (a system in which 525 scanning lines are output in one field). The present invention relates to a signal processing circuit and an image display device suitable for application to an image system in which a system and a still image system such as an electronic camera are mixed.

[0002]

2. Description of the Related Art At present, as an image display device, a moving image system for a standard of scanning 262.5 lines per field, such as a general interlaced television (NTSC system), and a double-speed scanning system, for example, a non-interlaced system There are moving image and still image systems for the standard of scanning 525 lines in one field, such as a television (ED system or HD system high definition television, monitor for electronic still camera) and an electronic still camera.

Here, a description will be given with reference to an interlaced moving image system and a double speed scanning still image system.

Conventionally, a signal processing circuit corresponding to such a moving image system and a signal processing circuit corresponding to a still image system have been separately configured as completely different circuits. This is because, at present, an interlaced moving image system and a double-speed scanning still image system are individually supplied to the market.

[0005]

However, due to various developments of the image display system, at present, a moving picture system for the standard of scanning 262.5 lines per field, such as an interlaced television (NTSC system), and a double-speed scanning. 2. Description of the Related Art An image display system in which a still image system for a standard of scanning 525 lines in one field, such as an electronic still camera, is used.

In order to cope with the signal processing of the image display system, it is necessary to mount a signal processing circuit for a moving image system and a signal processing circuit for a still image system. However, if these signal processing circuits are simply mounted, there is a disadvantage that the scale of the image display system becomes large and the circuit configuration becomes complicated.

Therefore, conventionally, only a signal processing circuit for a moving image system is mounted on the above-mentioned image display system, and is also used as a signal processing circuit for a still image system.

[0008] However, the still image system needs to perform gamma correction processing and the like different from the moving image system since the display object is color photographic paper. Since the frequency band to be emphasized differs from the method, an aperture control process corresponding to the frequency band is required. Therefore, conventionally, signal processing of the image display system is performed while sacrificing image quality in the still image system.

SUMMARY OF THE INVENTION The present invention has been made in view of such problems, and an object of the present invention is to provide an image display system in which an interlaced moving image system and a double-speed scanning still image system are used for image signal processing. The signal processing circuit and the image signal processing that can improve the image quality of the image display system can be applied to an image display system in which an interlaced moving image system and a double-speed scanning still image system are mixed. It is an object of the present invention to provide an image display device which can correspond to the above and can improve the image quality.

[0010]

A signal embedding circuit according to the present invention scans an image signal from a CCD solid-state image sensor which is read out independently of all pixels at twice the speed of an interlaced image display device and an interlaced system. A common luminance signal processing circuit and a common chroma signal processing circuit common to the image display apparatus of the double-speed scanning system, a gamma correction circuit provided for the common chroma signal processing circuit, and a common luminance signal processing circuit in a stage subsequent to the common luminance signal processing circuit. The connected first individual luminance signal processing circuit having a moving image gamma correction circuit unique to the interlaced image display device and the still image gamma correction circuit unique to the double-speed scanning image display device. And an interlaced image display device connected in parallel at the subsequent stage of the two individual luminance signal processing circuits and the common chroma signal processing circuit. , A first individual chroma signal processing circuit having a moving image low-pass filter and a second individual chroma signal processing circuit unique to a double-speed scanning image display device, and a first individual luminance signal processing circuit A first luminance signal from the first individual chroma signal processing circuit and a second luminance signal from the second individual luminance signal processing circuit and the second luminance signal from the second individual chroma signal processing circuit. The second chroma signal is output in parallel and simultaneously. An image display device according to the present invention comprises a CCD solid-state imaging device for reading out all pixels independently, and a C
Image display having a signal processing circuit for performing signal processing on an image pickup signal from a CD solid-state image pickup device, an image display means of an interlace method, and an image display means of a double-speed scan method for scanning at twice the speed of the interlace method The signal processing circuit is provided in a common luminance signal processing circuit and a common chroma signal processing circuit common to the interlace image display means and the double-speed scan image display means, respectively, and the common chroma signal processing circuit. Gamma correction circuit, a first individual luminance signal processing circuit having a moving image gamma correction circuit, which is unique to the interlaced image display means and is connected in parallel to the subsequent stage of the common luminance signal processing circuit, and a double-speed scanning method A second individual luminance signal processing circuit having a still image gamma correction circuit unique to the image display means; No. processed in parallel connected to a subsequent circuit, specific to the image display means interlaced, the first individual chroma signal comprising a low pass filter for video processing circuit and speed scan method the second natural image display means
An individual chroma signal processing circuit, and the first luminance signal from the first individual luminance signal processing circuit and the first chroma signal from the first individual chroma signal processing circuit are supplied to an interlaced image display means. The second luminance signal from the second individual luminance signal processing circuit and the second chroma signal from the second individual chroma signal processing circuit are supplied to the double-speed scanning image display means. It was done.

[0011]

According to the signal processing circuit and the image display device of the present invention described above, an interlaced television (NTS)
For the video system according to the standard C), the first luminance signal output through the first individual luminance signal processing circuit and the first chroma signal output through the first individual chroma signal processing circuit are used, For a still image system based on the standard of a double-speed scanning plane image display device (such as an electronic still camera), the second luminance signal and the second individual chroma signal processing output through the second individual luminance signal processing circuit are used. The second chroma signal output through the circuit can be used, and the image signal processing can be separately performed in each system according to each of the interlace and the double-speed scanning.

Therefore, according to the signal processing circuit of the present invention, the image signal processing can be made compatible with an image display system in which an interlaced moving image system and a double-speed scanning still image system coexist. The image quality of the display system can be improved. Further, according to the image display device of the present invention, the image signal processing can be made compatible with an image display system in which an interlaced moving image system and a double-speed scanning still image system are mixed. Image quality can be improved.

Further, according to the signal processing circuit and the image display device of the present invention, in the interlaced moving image system and the double speed scanning still image system, a portion where the image signal processing can be made common is a common luminance signal processing circuit and a common luminance signal processing circuit. Since it can be performed by the common chroma signal processing circuit,
It is possible to reduce the size of the circuit configuration during the rest, and to efficiently reduce the size and power consumption of the image display system.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram illustrating a schematic configuration of the signal processing circuit according to the present embodiment.

Here, the CCD solid-state imaging device 1 used in the present embodiment employs an all-pixel reading method in which signal charges for all pixels are read independently, and two horizontal registers (not shown) are connected in parallel. It has an arranged configuration. In this example, one horizontal register is one channel (one channel), and the other one is two channels.
Handled as a channel (2ch).

In the CCD solid-state image pickup device 1, color filters of three colors of green G, yellow Ye, and cyan Cy are subjected to checker coding as shown in FIG. 6A or stripe coding as shown in FIG. 6B. ing.

As shown in FIG. 1, the imaging signals Sch1 and Sc from each channel of the CCD solid-state imaging device 1 are obtained.
h2 are sequentially supplied to the synchronization processing circuit 2 in which a plurality of delay lines are incorporated, and the imaging signals Sch1 and S2
During ch2, the imaging signal S for a predetermined number of scanning lines is synchronized. These synchronized imaging signals S relating to a predetermined number of scanning lines are supplied to an aperture controller processing unit 3 and a luminance signal processing unit 4, respectively.
And supplied to the chroma signal processing unit 5 in parallel.

The aperture controller 3 has an aperture controller 6 for moving images and an aperture controller 7 for still images. The moving image aperture circuit 6 includes a frequency band (1) corresponding to a standard of a moving image system (for example, an NTSC television) of the interlaced method (a method of outputting 262.5 scanning lines in one field) in the imaging signal S. 〜2 MHz) and output as a moving image aperture control signal AP1. The still image aperture control circuit 7 outputs the image signal S
Among them, the double-speed scanning method (scanning lines 52 in one field)
The signal component in the frequency band (for example, 3 to 4 MHz) corresponding to the standard of the still image system (five output methods) is emphasized and output as the still image aperture control signal AP2.

The luminance signal processing section 4 includes a common luminance signal processing circuit 8, a moving image luminance signal processing circuit 9, and a still image luminance signal processing circuit 10. The common luminance signal processing circuit 8 incorporates a part that can be shared between luminance signal processing in an interlaced moving image system and luminance signal processing in a double-speed scanning still image system. Accordingly, the luminance signal processing circuit 9 for the moving image and the luminance signal processing circuit 10 for the still image at the subsequent stage respectively perform the luminance signal processing exclusively for the interlaced moving image system and the luminance signal processing exclusively for the double-speed scanning still image system.

The moving picture aperture control signal AP1 output from the moving picture aperture control circuit 6 of the aperture control processing unit 3 and the luminance signal Si output from the moving picture luminance signal processing circuit 9 of the luminance signal processing unit 4 are synthesized. A moving image luminance signal Y1 is obtained from the output terminal φy1. At the same time, the 1ch still image aperture control signal AP21 output from the still image aperture control circuit 7 of the aperture control processing unit 3 and the 1ch luminance signal Sn1 output from the still image luminance signal processing circuit 10 of the luminance signal processing unit 4 are output. The 1ch still image luminance signal Y21 is obtained by synthesis, and the still image aperture control circuit 7
The 2ch still picture brightness signal Y22 is obtained by combining the 2ch still picture aperture control signal AP22 output from the PDP and the 2ch brightness signal Sn2 output from the still picture brightness signal processing circuit 10 of the brightness signal processing section 4, The 1ch still image luminance signal Y21 and the 2ch still image luminance signal Y22 are combined to obtain a still image luminance signal Y2 corresponding to 525 pieces of information per field from the output terminal φy2.

On the other hand, the chroma signal processing section 5 has a common chroma signal processing circuit 11, a moving picture chroma signal processing circuit 12, and a still picture chroma signal processing circuit 13. The common chroma signal processing circuit 11 incorporates a part that can be shared between chroma signal processing in an interlaced moving image system and chroma signal processing in a double-speed scanning still image system.

Accordingly, the chroma signal processing circuit 12 for the moving picture and the chroma signal processing circuit 13 for the still picture at the subsequent stage respectively perform the chroma signal processing dedicated to the interlaced moving picture system and the chroma signal processing dedicated to the double-speed scanning still picture system. Then, a moving picture chroma signal C1 and a still picture chroma signal C2 are obtained from the output terminals φc1 and φc2.

A moving picture luminance signal Y1 and a moving picture chroma signal C from the output terminals φy1, φc1, φy2 and φc2.
1, Still picture luminance signal Y2 and still picture chroma signal C2
Are output simultaneously and in parallel.

Next, a specific example of the signal processing circuit according to this embodiment will be described with reference to FIGS. FIG. 2 is a block diagram showing Y-system signal processing, and FIG. 3 is a block diagram showing chroma-system signal processing.

In FIG. 2, reference numerals 21 and 22 surrounded by alternate long and short dash lines indicate a synchronization processing circuit for 1ch and a synchronization processing circuit for 2ch, respectively. In this example, the imaging signal Sch1 for even-numbered scanning lines is input from 1ch, and the imaging signal Sch2 for odd-numbered scanning lines is input from 2ch.

In the 1-channel synchronization processing circuit 21, two delay lines are incorporated, and three even-numbered (6n + 2, 6n + 4, 6n + 6; n = 0,
The imaging signals S2, S4 and S6 relating to (1, 2,...) Are output in a synchronized manner. In addition, three delay lines are incorporated in the 2-channel synchronization processing circuit 22, and four odd-numbered (8n + 1, 8n +
(3, 8n + 5, 8n + 7; n = 0, 1, 2,...) Are output in synchronization with each other.

First, the Y-system signal processing will be described with reference to FIG. 2. Of the seven imaging signals S1 to S7 from the 1ch synchronization processing circuit 21 and the 2ch synchronization processing circuit 22,
The imaging signals S3 and S4 relating to (8n + 3) and (6n + 4) are supplied as the Y main line 23 to the moving image mixing circuit 24 and the first still image mixing circuit 25 at the subsequent stage, and the above-mentioned 2 branched from the Y main line 23. The two imaging signals S3 and S4 are input to a first horizontal aperture control processing circuit 26 to perform contour correction, and the contour correction signal APh
Is supplied to the moving image mixing circuit 24 and the first still image mixing circuit 25 at the subsequent stage.

Of the seven imaging signals S1 to S7 from each of the synchronization processing circuits 21 and 22, six imaging signals S1 to S6 excluding the signal relating to (8n + 7) are similarly output to the first Y _L processing circuit 27. And a first 1/4 V aperture control processing circuit 28, which is input in parallel to each of the processing circuits 27 and 2
8 output a low-frequency luminance signal Y _L and a ＶV aperture control signal AP 1, respectively.
And supplied to the first still image mixing circuit 25.
At the same time, the imaging signals S3, S4, and S5 are input to the first 1 / 2V aperture control circuit 29, and the 1 / 2V aperture control signal AP2 is output from the aperture control circuit 29, and the subsequent first still image mixing circuit 25.

Here, the first 1 / 2V aperture control processing circuit 29 is a signal processing circuit for boosting frequencies near 525 vertical lines by gain control based on the input of the image quality adjustment voltage. The aperture control processing circuit 28
By the gain control based on the input of the image quality adjustment voltage, the vertical 2
This is a signal processing circuit that boosts the frequency around 63 lines.

That is, the vertical arrangement pitch of the color filters shown in FIG. 6 is Py and the horizontal arrangement pitch is Px. In FIG. 4, the vertical axis represents the vertical frequency and the horizontal axis represents the horizontal frequency. In this case, the first 1 / 4V aperture control processing circuit 28 boosts the frequency in the vicinity of 1 / (2Py) (the shaded area in FIG. 4A) (FIG. 4B).
reference). Further, the first 1 / 2V aperture control processing circuit 2
9 is around 1 / Py (the area indicated by oblique lines in FIG. 4C)
(See FIG. 4D).

In the double-speed scanning still image system, up to 525 vertical resolutions are required. Therefore, the aperture control signal AP2 from the first 1 / 2V aperture control processing circuit 29 and the first 1/4 aperture control processing are used. The aperture control signal AP1 from the circuit 28 is synthesized by the first still image mixing circuit 25 at the next stage, and the signal component in the frequency band (for example, 3 to 4 MHz) corresponding to the standard of the double speed scan still image system is emphasized. .

On the other hand, in the interlaced moving picture system, only about 263 vertical resolutions need to be obtained, so that only the aperture control signal AP1 from the first 1 / 4V aperture control processing circuit 28 is supplied to the moving picture mixing circuit 24. Then, an interlaced video system (for example, N
Signal components in a frequency band (1 to 2 MHz) corresponding to the standard of the TSC television are emphasized.

On the other hand, the synchronization processing circuits 21 and 2 for 1ch
Seven imaging signals S1 to S1 from the channel synchronization processing circuit 22
Of S7, the imaging signals S4 and S5 relating to (6n + 4) and (8n + 5) are supplied to the second still image mixing circuit 31 as the Y main line 30 and the Y main line 30
The two imaging signals S4 and S5 branched from are input to the second horizontal aperture processing circuit 32 to perform contour correction, and the contour correction signal APh is supplied to the second still image mixing circuit 31 at the subsequent stage. Supplied.

Of the seven imaging signals S1 to S7 from the synchronizing circuits 21 and 22, six imaging signals S2 to S7 excluding the signal relating to (8n + 1) are similarly processed by the second Y _L processing circuit 33. And to the second 1 / 4V aperture control processing circuit 34 in parallel, respectively.
4 luminance signal Y _L and 1 / 4V aperture compensation signal AP1 each low is output from, is supplied to the second still picture mixing circuit 31 in the subsequent stage. At the same time, the imaging signal S4
S5 and S6 are input to the second 1 / 2V aperture control circuit 35, and the 1 / 2V aperture control signal AP2 is output from the aperture control circuit 35 and supplied to the second still image mixing circuit 31 at the subsequent stage.

The second 1 / 4V aperture control processing circuit 34
The second 1/2 aperture control processing circuit 35 has the same configuration as the first 1 / 4V aperture control processing circuit 28 and the first 1/2 aperture control processing circuit 29. Therefore, the second
Output from the 1 / 4V aperture control processing circuit 34
By combining the aperture control signal AP1 and the 1/2 aperture control signal AP2 output from the second 1 / 2V aperture control processing circuit 35 in the second still image mixing circuit 31 at the subsequent stage, a double-speed scanning still image is obtained. Signal components in a frequency band (for example, 3 to 4 MHz) corresponding to the system standard are emphasized.

The high-band luminance signal Y _H from the moving image mixing circuit 24 is input to a moving image gamma correction circuit 36 at the next stage. In this gamma correction circuit 36,
Performing gamma correction corresponding to the color picture tube in the moving system interlaced with respect to the luminance signal Y _H. The luminance signal Y _H gamma-corrected by the moving image gamma correction circuit 36 is subjected to blanking processing, setup (DC component reproduction) processing, white clip processing, synchronous addition processing, and the like in the subsequent moving image processing circuit 37. Is performed, and the luminance signal Y1 is extracted from the output terminal φy1.

On the other hand, the first still picture mixing circuit 25
High band from the luminance signal Y _H a is input to the next stage of the first still image gamma correction circuit 38. In the gamma correction circuit 38 performs gamma correction corresponding to the color photographic paper in the still picture system speed scan method with respect to the luminance signal Y _H a. The first still picture luminance signal Y _H a that is gamma corrected by the gamma correction circuit 38, blanking processing at the subsequent stage of the first still picture image processing circuit 39,
Setup (reproduction of DC component) processing, white clip processing, synchronous addition processing, and the like are performed, and the result is output as a first still image luminance signal Y2a.

A second still picture mixing circuit 31
High bandwidth luminance signal from the Y _H b is input to the next stage of the second still image gamma correction circuit 40. In the gamma correction circuit 40, as in the case of the first still image gamma correction circuit 38, a gamma correction corresponding to the color photographic paper in the still picture system speed scan method with respect to the luminance signal Y _H b Do. The second luminance signal is gamma corrected by the still-image gamma correction circuit 40 Y _H b is blanked in the second still picture image processing circuit 41 in the subsequent stage, the setup (DC component regeneration) process , White clip processing, synchronous addition processing, etc., and output as a second still image luminance signal Y2b.

The first and second still image luminance signals Y2a and Y2b from the first and second image processing circuits 39 and 41 are combined by the next-stage frame mixing circuit 42, and the output terminal φy2 It is extracted as a still image luminance signal Y2.

The moving image luminance signal Y1 and the still image luminance signal Y2 are output from the corresponding output terminals φy1 and φy2 simultaneously and in parallel.

Here, the moving image gamma correction circuit 36 and the first and second still image gamma correction circuits 38 and 40 will be described.

First, the moving image gamma correction circuit 36 converts the luminance signal Y _H from the moving image mixing circuit 24 into a gamma correction curve (shown by a curve) based on the electro-optical conversion characteristics of the color picture tube as shown in FIG. 5A. Is converted to a value corresponding to and output. For example, the value Vo1 on the gamma correction curve at the input value Vi is output as a gamma correction value, and as indicated by a proportional line, the luminance signal Y from the moving image mixing circuit 24 is output.
The amplitude of _H and the luminous intensity (brightness) of the color picture tube are in a proportional relationship.

Next, the first and second still image gamma correction circuit 38 and 40, the luminance signal Y _H a and Y _H b from the still picture mixing circuit 25 and 31, as shown in FIG. 5B Then, the image data is converted into a value corresponding to a gamma correction curve (shown by a curve) based on the electro-optical conversion characteristics of the color photographic paper and output. For example outputs the gamma correction curve on the value Vo2 in the input value Vi as gamma correction value, as shown in proportional straight line, each amplitude of the luminance signal Y _H a and Y _H b from the still picture mixing circuit 25 and 31 And the brightness of the color photographic paper in a proportional relationship.

Therefore, if the moving picture gamma correction circuit 36 is connected to the color picture tube side of the moving picture system, the amplitude of the image signal from the CCD solid-state image pickup device 1 and the light emission intensity (brightness) of the color picture tube are connected to the color picture tube. The luminance signal having a proportional relationship is supplied, the intermediate luminance can be raised without changing the white and black signals, and the image quality of the image displayed on the color picture tube is improved.

On the other hand, if the first and second gamma correction circuits 38 and 40 for still images are connected to, for example, the electronic still camera, the electronic still camera will have the amplitude and the color of the imaging signal from the CCD solid-state imaging device 1. A luminance signal in which the brightness of the photographic paper is in a proportional relationship is supplied, the intermediate luminance can be raised without changing the white and black signals, and the image quality of the image displayed on the color photographic paper is improved.

Here, the Y main line 23 and the first horizontal
The aperture control processing circuit 26 and the first Y _LUp to processing circuit 27
Correspond to the common luminance signal processing circuit 8 in FIG.
Kissing circuit 24, moving image gamma correction circuit 36, and moving image
Image processing circuit 37 for the moving image luminance signal processing circuit 9 of FIG.
Corresponding to Also, the first 1 / 4V aperture control processing circuit 2
8 corresponds to the moving image aperture circuit 6 in FIG.
2 1 / 4V aperture control processing circuits 28 and 29 and the first
And second 1 / 2V aperture control processing circuits 34 and 35
1 corresponds to the still image aperture circuit 7.

Further, Y mains 30, a second horizontal aperture compensation processing circuit 32, a second Y _L processing circuit 33, first and second still picture mixing circuit 25 and 31, first and second still image Gamma correction circuits 38 and 40, first and second still image processing circuits 39 and 41, and a frame mixing circuit 42 correspond to the still image luminance signal processing circuit 10 of FIG.
Corresponding to

Next, chroma signal processing will be described with reference to FIG.

Simultaneous processing circuit 21 for 1ch (see FIG. 2)
From the three even numbers (6n + 2, 6n + 4, 6n +
The imaging signals S2, S4, and S6 relating to 6) are supplied to a next-stage color separation circuit 53 through a low-pass filter 51 in the vertical direction and a low-pass filter 52 in the horizontal direction. At the same time, of the four imaging signals from the 2-channel synchronization processing circuit 22 (see FIG. 2), three odd-numbered (8n +
1, 8n + 3, 8n + 5)
And S5 are supplied to the next-stage color separation circuit 53 through a low-pass filter 54 in the vertical direction and a low-pass filter 55 in the horizontal direction.

The color separation circuit 53 separates the supplied line-sequential multiplex signals S1 to S6 into G, R and B signals, respectively.
Thereafter, these G, R and B signals are subjected to white balance for color temperature correction. And a color separation circuit 5
G, R, and B signals from the third gamma correction circuit 56
After performing the normal gamma correction (gamma correction corresponding to the color picture tube) in, the signal is supplied to the matrix circuit 57. In the matrix circuit 57, the G, R and B signals are
A G signal and a BG signal are generated, and two color difference signals (RY signal and BY signal) are generated from these signals.

Thereafter, on the moving image side, the matrix circuit 57
Are supplied to an encoder 59 via a moving image low-pass filter 58, and a moving image chroma signal C1 is obtained from an output terminal φc1. On the other hand, on the still image side, 2
The two color difference signals (RY signal and BY signal) are directly supplied to the encoder 60 to obtain a still picture chroma signal C2 from the output terminal φc2. The moving image chroma signal C1 and the still image chroma signal C2 are output simultaneously and in parallel from the corresponding output terminals φc1 and φc2.

Here, the vertical low-pass filters 51 and 54 to the matrix circuit 57 correspond to the common chroma signal processing circuit 11 of FIG. 1, and the moving image low-pass filter 58 and the encoder 59 correspond to the moving image chroma signal of FIG. The encoder 60 corresponds to the signal processing circuit 12, and the encoder 60 corresponds to the still image chroma signal processing circuit 13 in FIG.

As described above, according to the present embodiment, for the moving picture for which the aperture signal processing corresponding to the standard of the interlaced moving picture system is applied to the image pickup signal S from the CCD solid-state image pickup device 1 which is read out independently for all pixels. An aperture control circuit 6 and a still image aperture control circuit 7 for performing aperture control signal processing corresponding to the standard of the double-speed scanning still image system are provided, and a luminance signal processing corresponding to a common standard in the moving image system and the still image system is provided. A luminance signal processing unit for a moving image is provided with a common luminance signal processing circuit 8 and a common luminance signal processing circuit 11 for performing chroma signal processing, and a luminance signal processing corresponding to a standard dedicated to the moving image system is provided at a subsequent stage of the common luminance signal processing circuit 8. The circuit 9 is connected to a still image luminance signal processing circuit 10 for performing luminance signal processing corresponding to the standard for the still image system. And, the moving image for the aperture control circuit 6
And the interlaced luminance signal Si from the moving image luminance signal processing circuit 9 to output the moving image luminance signal Y1 from the output terminal φy1 and the still image from the still image aperture circuit 7 The aperture control signals AP21 and AP22 and the luminance signals Sn1 and Sn2 from the still image luminance signal processing circuit 10 are combined to output a still image luminance signal Y2 from an output terminal φy2. A chroma signal processing circuit 12 for a moving image that outputs chroma signal C1 for a moving image from an output terminal φc1 by performing chroma signal processing corresponding to the standard dedicated to the moving image system at a stage subsequent to the circuit 11, and corresponds to a standard dedicated to the system for a still image. Still image chroma signal processing for outputting the still image chroma signal C2 from the output terminal φc2. Connect the circuit 13, the output terminals φc1, φc1, φy2 and for moving from φc2 luminance signal Y1, moving image chroma signal C1, still picture luminance signal Y
2 and the still image chroma signal C2 are output in parallel and simultaneously, so that the video signal is output through the output terminals φy1 and φc1 for a moving image system based on the standard of interlaced television (for example, NTSC). Using the obtained moving image luminance signal Y1 and moving image chroma signal C1, the still image luminance signal Y2 from the output terminals φy2 and φc2 and The still image chroma signal C2 can be used, and the image signal processing can be performed separately in each system according to each of the interlace and double-speed scanning.

Therefore, according to the signal processing circuit of the present embodiment, the image signal processing can be adapted to an image display system in which an interlaced moving image system and a double-speed scanning still image system are mixed. The image quality of the image display system can be improved. Further, according to the image display device according to the present embodiment, the image signal processing can be made compatible with an image display system in which an interlaced moving image system and a double-speed scanning still image system coexist. Can be planned.

Further, according to the signal processing circuit according to the present embodiment, in the interlaced moving image system and the double-speed scanning still image system, the portion where the image signal processing can be made common can be performed by the common luminance signal processing circuit 8 and the common luminance signal processing circuit 8. Since the operation can be performed by the chroma signal processing circuit 11, the circuit configuration during the rest can be reduced, and the size of the image display system and the power consumption can be efficiently reduced. Further, according to the image display device of the present embodiment, in the interlaced moving image system and the double-speed scanning still image system, the portion where the image signal processing can be made common is performed by the common luminance signal processing circuit 8 and the common chroma signal processing. Since the operation can be performed by the circuit 11, the circuit configuration during the rest can be reduced, and the size of the image display system and the power consumption can be efficiently reduced.

[0056]

According to the signal processing circuit of the present invention, it is possible to simultaneously obtain an output of an information signal corresponding to an interlace type image display device and an output of an information signal corresponding to a double speed scan type image display device. Therefore, the image signal processing can be made compatible with an image display system in which an interlaced moving image system and a double-speed scanning still image system coexist, for example, and the image quality of the image display system can be improved. According to the image display device of the present invention, the output of the information signal corresponding to the image display device of the interlace system and the output of the information signal corresponding to the image display device of the double-speed scan system can be obtained at the same time. Can be adapted to an image display system in which an interlaced moving image system and a double-speed scanning still image system coexist, and the image quality of the image display system can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a signal processing circuit according to an embodiment.

FIG. 2 is a block diagram showing Y-system signal processing of the signal processing circuit according to the embodiment.

FIG. 3 is a block diagram showing chroma signal processing of the signal processing circuit according to the embodiment.

FIG. 4 is an explanatory diagram illustrating a vertical aperture control process according to the embodiment.

FIG. 5A is a characteristic diagram illustrating gamma correction characteristics corresponding to a moving image system. 4B is a characteristic diagram showing gamma correction characteristics corresponding to a still image system.

FIG. 6 is an explanatory diagram showing an arrangement of color filters in a CCD solid-state imaging device used in the present embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 CCD solid-state imaging device 2 Synchronization processing circuit 3 Aperture processing unit 4 Luminance signal processing unit 5 Chroma signal processing unit 6 Moving image aperture circuit 7 Still image aperture control circuit 8 Common luminance signal processing circuit 9 Moving image luminance signal processing circuit 10 Still Picture luminance signal processing circuit 11 Common chroma signal processing circuit 12 Moving picture chroma signal processing circuit 10 Still picture chroma signal processing circuit

Continuation of the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H04N 9/00-9/11 H04N 9/44-9/78 H04N 11/00-11/24

Claims (2)

(57) [Claims] 1. An image display apparatus of an interlace system for image signals from a CCD solid-state image sensor which reads out all pixels independently, and a common image display apparatus of a double speed scan system for scanning at a double speed with respect to the interlace system. A luminance signal processing circuit and a common chroma signal processing circuit; a gamma correction circuit provided for the common chroma signal processing circuit; and the interlaced image display device connected in parallel to a stage subsequent to the common luminance signal processing circuit A first individual luminance signal processing circuit including a moving image gamma correction circuit, and a second individual luminance signal processing circuit including a still image gamma correction circuit, which is specific to the double-speed scanning image display device. Connected in parallel to the subsequent stage of the common chroma signal processing circuit,
A first individual chroma signal processing circuit having a moving image low-pass filter specific to the interlaced image display device and a second individual chroma signal processing circuit specific to the double-speed scanning image display device, A first luminance signal from the first individual luminance signal processing circuit, a first luminance signal from the first individual luminance signal processing circuit, and a second luminance signal from the second individual luminance signal processing circuit And a second chroma signal from the second individual chroma signal processing circuit is output in parallel and simultaneously. 2. A CCD solid-state imaging device for reading out all pixels independently, a signal processing circuit for performing signal processing on an imaging signal from the CCD solid-state imaging device, an interlace-type image display means, An image display device having a double-speed scanning image display unit that performs double-speed scanning, wherein the signal processing circuit is common to the interlace image display unit and the double-speed scan image display unit. A common luminance signal processing circuit and a common chroma signal processing circuit; a gamma correction circuit provided in the common chroma signal processing circuit; and the interlaced image display means connected in parallel at a subsequent stage of the common luminance signal processing circuit. Individual luminance signal processing circuit including a moving image gamma correction circuit, and an image of the double-speed scanning method Specific to indicate means, and a second separate luminance signal processing circuit comprising a gamma correction circuit for a still image, connected in parallel downstream of the common chroma signal processing circuit,
A first individual chroma signal processing circuit having a moving image low-pass filter unique to the interlaced image display means and a second individual chroma signal processing circuit unique to the double-speed scan image display means, The first luminance signal from the first individual luminance signal processing circuit and the first chroma signal from the first individual chroma signal processing circuit are supplied to the interlaced image display means, and the second luminance signal is supplied to the interlaced image display means. The second luminance signal from the individual luminance signal processing circuit and the second chroma signal from the second individual chroma signal processing circuit are supplied to the double-speed scanning image display means. Image display device.