JP3250992B2 - Stacked chip package - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package, and more particularly, to a stacked chip package.

[0002]

BACKGROUND OF THE INVENTION This application is filed and assigned simultaneously and is entitled "Semiconductor Packaging Structure with Bonding Bars on Chip", Ser.
No. 2241 is related to the patent application.

[0003] The trend of electronic products is to reduce weight and size. How to reduce the weight and size of the package is a matter worth considering as well as satisfying both performance and cost requirements at the same time. Increasing the package density and reducing the size of the package is a challenge worth the effort. The stacked chip package satisfies the above-mentioned requirements for improving package density. In a so-called stacked chip package, an upper chip is mounted on a lower chip, and a stacked structure is formed in one package.

[0004] One of the advantages of a stacked chip package is that the package density can be increased. For example, if two 64 MB memory chips are sealed in one package, a 128 MB memory IC can be manufactured. Another advantage is that a multifunctional IC can be manufactured by encapsulating two chips having different functions in one package. Conventional bonding pads are located on the outer edge of the chip, which prevents them from meeting the very many demanding requirements of the package. By disposing the bonding pad in the center of the chip, the width of the package can be reduced, and the propagation speed can be improved by 1.5 ns. Another advantage is that, since the operating voltage is supplied to the center of the chip, the wiring can be shortened, the impedance can be reduced, and the stability can be improved.

FIG. 9 shows a package of a laminated chip according to the prior art. In the figure, a first chip 21 and a second chip 22 are attached to the lower and upper surfaces of a die pad, respectively. First chip 1 and second chip 2
Are each covered with an insulating film 30 made of polyimide. Bonding pad 12 of first chip 1 and bonding pad 22 of second chip 2
Are located on the outer edge of the chip. Since the first chip 1 and the second chip 2 are the same, the relative position of the bonding pad 12 is particularly the same as that of the bonding pad 22.

After the second chip 2 is mounted on the upper side of the first chip 1, the bonding wires 31 of the first chip 2 or the bonding wires 32 of the second chip 2
Are the bonding pads 12 of the first chip 1 and the second
In order to connect the bonding pads 22 of the chip 2 to the inner leads of the same lead frame 5, they must cross each other. Therefore, this may cause a defect.

[0007] To solve this problem, an interposer needs to be used. As shown in FIG. 9, a plurality of connectors 33 are provided on the surface of the interposer 7. A second bonding wire 32 extending from the bonding pad 22 is connected to a first end of the connector 33, and then a second end of the connector 33 is connected to an inner lead of the lead frame 5. The above components are sealed with a mold material 6 made of an epoxy resin, and a package body 9 is completed.

FIG. 10 shows another stacked chip package according to the prior art. In the figure, a package 9 includes a first chip 1 and a second chip 2. The difference between the package body 9 of FIG. 10 and the package body 9 of FIG.
The second point is that the bonding pads 22 of the second chip 2 are arranged at the center of the chip.

The first chip 1 and the second chip 2 are connected to the first and second lead frames 5a, 5a by a first insulating adhesive tape 15a and a second insulating adhesive tape 15b.
b. Second lead frame 5b
Of the second chip 2 extends to the center on the upper side of the second chip 2. One end of the second lead frame 5b is connected to the first lead frame by the connection conductor 16, and the inner lead 51 at the other end is attached to the second chip 2 by the third insulating film 15c.

The package body 9 includes, as other components, a first bonding pad 12 and a second bonding pad 22 for connecting the first bonding pad 12 and the second bonding pad 22 to the lead frame 5.
Bonding wire 31 and second bonding wire 33, a fourth insulating film 15d supporting the second inner lead 51, a molding material 6 encapsulating the above components, and an external circuit (not shown). And outer leads 52 to be connected. Here, it should be noted that a die pad for supporting a chip is not provided in the package body 9. The disadvantages of this package 9 are
One lead frame is used, which results in high costs.

[0011]

According to the present invention, unlike the above-mentioned conventional package, the structure is improved by stacking two chips using only one lead frame without using an interposer. An object of the present invention is to provide a laminated chip package that is simple.

[0012]

According to the present invention, there is provided a laminated chip package comprising: a lead frame having a plurality of inner leads; a laminated structure having a first chip and a second chip attached thereto; A chip bonding pad and a bonding wire connecting a corresponding inner lead are sealed with a sealing resin, and a single lead frame is used to support the laminated structure and wire bond.
Wire bonding is possible without using an interposer, and a simple and small package can be provided.

In the first aspect of the present invention, a first chip is mounted on a second chip via an appropriate adhesive to form a laminated structure, and the laminated structure is attached to a lead frame. An insulating adhesive tape is provided between the lead frame and the first chip for support.

The inner lead is connected to a first bonding pad and a second bonding pad by a first bonding wire and a second bonding wire, respectively. Hereinafter, the bonding pad of the first chip is referred to as a first bonding pad, and similarly,
The bonding pads on the second chip will be referred to as second bonding pads.

Although there is a large gap between the first bonding pad and the second bonding pad, the present invention uses a supporting element on the second chip to support the second bonding wire, From hanging down to the tip side. Then, these components are sealed with a molding material and integrated to complete a package.

The lead frame has a recess for supporting the laminated structure and for accommodating the laminated structure in order to realize miniaturization. The inner leads extend above the first chip, thereby providing a lead-on-chip (LO
C) The structure is configured.

In another embodiment of the present invention, the inner leads are arranged on the outer edge of the chip. On the first chip, a second chip is attached via an appropriate adhesive to form a laminated structure, and the first chip is attached to the bonding bar fixed from the lead frame via an adhesive. Attached and supported.

In this embodiment, the first bonding pad and the second bonding pad can be arranged on the outer edges of the first chip and the second chip, respectively. A first bonding pad and a second bonding pad are connected to the inner lead by a first bonding wire and a second bonding wire. It should be noted that the laminated structure is attached to the bonding bar of the lead frame by insulating adhesive tape (made of polyimide or other polymer based material). The components described above are sealed with a mold material and completed in a package body.

[0019]

BRIEF DESCRIPTION OF THE DRAWINGS The foregoing features and many advantages of the present invention will become more fully understood and readily appreciated by reference to the following detailed description when taken in conjunction with the accompanying drawings. Will be.

According to the present invention, the laminated chip package can be used whether the first chip and the second chip are the same or different.
Any can be used. First, an example in which the first chip 1 is the same as the second chip 2 will be described. In FIG. 1, a first chip 1 and a second chip 2 are mounted on a lead frame 5, and the first chip 1 is connected via a silver paste, a non-conductive paste or a polyimide base tape. To form a laminated structure 11. Further, the laminated structure 11 is connected to the lead frame 5.
Lead frame 5 and first chip 1
Between them, an insulating adhesive tape (for example, made of polyimide) 15 is provided.

The first bonding pad 12 and the second bonding pad 22 are arranged at the center of the first chip 1 and the center of the second chip 2. First bonding pad 12 and second bonding pad 22
Are connected to the inner lead 51 by a first bonding wire 31 and a second bonding wire 32.

In this example, the second bonding pad 2
Since the distance between 2 and the inner lead 51 is large, the length of the second bonding wire 32 is longer than that of the first bonding wire 31. Therefore, in this example, the support element 4 is placed on the surface of the second chip 2.
Are arranged to support the second bonding wire 32 and prevent the position thereof from being lowered.

In this preferred example, the support element 4 is made of silicone rubber or other low stress flexible material. Then, the above-described components are sealed with the mold material 6 to complete the package. Here, it should be noted that a recess is formed in order to support the laminated structure 11 on the lead frame 5 and realize miniaturization. The inner leads 51 extend over the first chip 1 to form a lead-on-chip (LOC) structure.

In FIG. 2, as a result of the improved bonding technique, the support element 4 is no longer necessary even if the second bonding wire 32 is long. Except that the support element 4 is not provided, the components in FIG. 2 are the same as those in FIG. 1, and a detailed description thereof will be omitted.

Next, an example in which the first chip 1 is different in function and size from the second chip 2 will be described. In FIG.
It is shown that the first chip 1 and the second chip 2 are different depending on the chips having different dimensions. In FIG. 3, the bonding pads of the first chip 1 and the bonding pads of the second chip 2 are respectively arranged at the center of the chip. On the lead frame 5, the first chip 1
And the second chip 2 are mounted, but the first chip 1
Is attached to the second chip 2 via a silver paste, a non-conductive paste, or a polyimide base tape to form a laminated structure 11. Further, in order to attach the laminated structure 11 to the lead frame 5, the lead frame 5
Insulating adhesive tape (made of polyimide or other polymer base material) between the first chip 1 and
15 are provided.

It should be noted that a concave portion is formed to support the laminated structure 11 on the lead frame 5 and to realize miniaturization. First bonding pad 1
The second and second bonding pads 22 are arranged at the center of the first chip 1 and the center of the second chip 2, respectively. The first bonding pad 12 and the second bonding pad 22 are connected to the inner lead 51 by the first bonding wire 31 and the second bonding wire 32.

Since the distance between the second bonding pad 22 and the inner lead 51 is large, the length of the second bonding wire 32 is longer than that of the first bonding wire 31. Therefore, in the present invention, the second
The support element 4 is used on the surface of the chip 420 to support the second bonding wire 32 and prevent it from hanging. In this preferred embodiment, the support element 4 is made of silicone rubber or other low stress flexible material. The above components are sealed with the molding material 6 to complete the package. It should be noted that a concave portion is formed to support the laminated structure 11 on the lead frame 5 and realize miniaturization. The inner leads 51 extend over the first chip 1 to form a lead-on-chip (LOC) structure.

In FIG. 4, as a result of the improved bonding technique, the support element 4 shown in FIG. 3 is no longer necessary even if the second bonding wire 470b is long. Except that the support element 4 is not provided, the components in FIG. 4 are the same as those in FIG. 3, and a detailed description thereof will be omitted.

Next, the first chip 1 differs from the second chip 2 in function and dimensions, and the second chip 2
An example in which the bonding pad of (2) is arranged on the outer edge of the second chip 2 will be described. FIG. 5 shows that the first chip 1 and the second chip 2 are different depending on the chips having different dimensions.

In FIG. 5, the bonding pads of the first chip 1 are arranged at the center of the chip, while the bonding pads of the second chip 2 are arranged at the outer edge of the chip. The first chip 1 and the second chip 2 are mounted on the lead frame 5.
Is attached to the second chip 2 via a silver paste, a non-conductive paste, or a polyimide base tape to form a laminated structure 11. Further, in order to attach the laminated structure 11 to the lead frame 5, the lead frame 5
Insulating adhesive tape (made of polyimide or other polymer base material) 1 between the first chip 1 and
5 are provided.

The first bonding wire 31 and the second bonding wire 31
The first bonding pad 12 and the second bonding pad 22 are connected to the inner leads 51 by the bonding wire 32. Since the second bonding pads 22 are arranged on the outer edge of the second chip 2, no support element 4 is required here, as shown in FIG. Then, the above-described components are sealed with the mold material 6 to complete the package. It should be noted that a concave portion is formed to support the laminated structure 11 on the lead frame 5 and realize miniaturization. The inner leads 51 extend over the first chip 1 to form a lead-on-chip (LOC) structure.

FIG. 6 shows a stacked chip package different from the packages shown in FIGS. 6 differs from the packages shown in FIGS. 1 to 5 in that the inner leads are arranged on the outer edge side of the chip. This example shows that the first chip 1 is dimensionally identical to the second chip 2. The second chip 2 is mounted on the first chip 1 to form a laminated structure 11. The first chip 1 is provided with a silver paste, a non-conductive paste or a polyimide base tape. To the second chip 2.

The first bonding pad 12 and the second bonding pad 22 are arranged on the outer edge of the first chip 1 and the outer edge of the second chip 2, respectively. The first bonding pads 12 and the second bonding wires 32 are formed by the first bonding wires 31 and the second bonding wires 32.
Are connected to the inner leads 51. It should be noted that the laminated structure 11 is attached to the connecting bar 56 of the lead frame 5 by the insulating adhesive tape 25. The insulating adhesive tape 25
Manufactured from a polyimide or other polymer-based material, both sides of the insulating adhesive tape 25 are provided with an adhesive tape (not shown).
Covered by The above components are sealed with the molding material 6 to complete the package.

FIG. 7 shows a stacked chip package different from the packages shown in FIGS. The difference between the stacked chip package shown in FIG. 7 and the packages shown in FIGS. 1 to 5 is that the inner leads 51 are arranged on the outer edge side of the chip, and the bonding bar supports the stacked structure. .

In this example, the first chip 1 is different from the second chip 2, and a stacked structure of chips having different dimensions is shown in the drawing. The second chip 2
The laminated structure 11 is configured by being mounted on the first chip 1, and the first chip 1 is attached to the second chip 2 via a silver paste, a non-conductive paste, or a polyimide base tape. Have been. The bonding bar is attached to the upper surface of the second chip 2 via an adhesive tape 25, and the bonding bar forms a part of the lead frame.

The first bonding pad 12 and the second bonding pad 32 are arranged on the outer edge of the first chip 1 and the outer edge of the second chip 2, respectively. The first bonding pads 12 and the second bonding wires 32 are formed by the first bonding wires 31 and the second bonding wires 32.
Of the inner leads 5
1 connected.

In the plan view of FIG. 8, the second chip of the laminated structure 11 is attached to the connecting bar 56 of the lead frame 5 via the insulating adhesive tape 25 as described above. The insulating adhesive tape 25 is made of a polyimide or other polymer based material, and both sides of the tape 25
Covered by an adhesive tape (not shown). The bonding pads 22 of the second chip 2 are connected to the inner leads 51 by the second bonding wires 32. The above components are sealed with the molding material 6 to complete the package.

As will be appreciated by those skilled in the art, the preferred embodiments of the present invention are not intended to limit the invention,
Rather, they embody the present invention. It should be understood that various modifications and similar structures are included within the spirit and scope of the appended claims, and the claims include all such modifications and similar structures. Should be interpreted in the broadest sense.

[0039]

The multilayer chip package of the present invention is
A first chip is mounted on a lead frame having a plurality of inner leads, and a second chip is mounted on the chip to form a laminated structure. Bonding pads of each chip are connected to corresponding lead frames by bonding wires. Since the connection is made, the laminated structure can be supported by one lead frame, wire bonding can be performed without using an interposer, and a simple and small package can be obtained.

In particular, if the lead frame supporting the laminated structure has a recess for accommodating the laminated structure, the size of the package can be reduced. By attaching the first chip to the lead frame with an insulating adhesive tape and attaching the second chip to the first chip with an adhesive paste or tape, a laminated structure can be easily formed on the lead frame, and Thus, a small package can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a stacked chip package in which two chips are stacked according to an embodiment of the present invention.

FIG. 2 is a sectional view similar to FIG. 1 of the multilayer chip package according to the embodiment of the present invention;

FIG. 3 is a cross-sectional view of a stacked chip package in which chips having two different dimensions are stacked according to the embodiment of the present invention.

FIG. 4 is a sectional view similar to FIG. 3 of the laminated chip package according to the embodiment of the present invention;

FIG. 5 is a diagram showing a stacked chip package in which two chips having different dimensions are stacked, and a bonding pad of the chip is arranged on an outer edge of the chip according to the embodiment of the present invention;

FIG. 6 is a cross-sectional view of a stacked chip package according to an embodiment of the present invention, in which inner leads are provided outside the chip.

FIG. 7 is a sectional view similar to FIG. 6, showing a stacked chip package in which chips having two different dimensions are stacked according to the embodiment of the present invention;

FIG. 8 is a plan view of the multilayer chip package shown in FIG. 6 before resin sealing.

FIG. 9 is a cross-sectional view showing a conventional laminated chip package.

FIG. 10 is a sectional view showing another conventional laminated chip package.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st chip 2 2nd chip 11 Laminated structure 15 Insulating adhesive tape 12,22 Bonding pad 31,32 Bonding wire 4 Supporting element 5 Lead frame 51 Inner lead 6 Molding material

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-8-330508 (JP, A) JP-A-10-200043 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 25/04

Claims (11)

(57) [Claims] 1. A lead frame having a plurality of inner leads, a first chip attached to the lead frame, and a second chip attached to the first chip to form a laminated structure.
A first bonding pad formed on a first chip, a second bonding pad formed on a second chip, and a first bonding pad attached to the first chip. A first bonding wire connected to the inner lead, a second bonding wire attached to the second chip and connecting a second bonding pad to the inner lead, and used to support the second bonding wire. A support member, the inner lead, the first chip, the second chip, the first
And a molding material used for sealing the bonding pad, the second bonding pad, the first bonding wire, the second bonding wire, and the support member. 2. The package according to claim 1, wherein the lead frame has a recess for supporting the laminated structure. 3. The method according to claim 1, wherein the first chip is attached to the lead frame by an insulating adhesive tape, and the second chip is attached to the first chip by a silver paste, a non-conductive paste or a polyimide base tape. 2. The laminated chip package according to 1. 4. The laminated chip package according to claim 3, wherein the insulating adhesive tape is made of polyimide. 5. The stacked chip package according to claim 1, wherein the support member is made of silicon rubber or another low stress flexible material. 6. The laminated chip package according to claim 1, wherein the molding material is made of an epoxy resin. 7. A lead frame having a plurality of inner leads and a connecting bar, a laminated structure comprising a first chip and a second chip, mounted on the connecting bar by a flexible tape, A first bonding pad on the second chip, a second bonding pad on the second chip, and a first bonding wire on the first chip for connecting the first bonding pad to the inner lead A second bonding wire on the second chip for connecting the second bonding pad to the inner lead; and an inner lead, the first chip, the second chip, the first bonding pad, the second bonding wire. A bonding chip, a molding material used to seal the first bonding wire and the second bonding wire, and Cage. 8. The laminated chip package according to claim 7, wherein both sides of the flexible tape are covered with an adhesive tape. 9. The laminated chip package according to claim 7, wherein the flexible tape is made of a polyimide-based material. 10. The stacked chip package according to claim 7, wherein the second chip is attached to the first chip by a silver paste, a non-conductive paste, or a polyimide-based material. 11. The multilayer chip package according to claim 7, wherein the molding material is made of an epoxy resin.