JP3250504B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a plasma CVD method for forming a metal nitride film on a capacitance insulating film by converting a halide into a plasma.

[0002]

2. Description of the Related Art Plasma CVD (chemical vapor deposition) using a halide as a raw material is used for forming a metal nitride. In this plasma CVD, two frequencies are used to improve the coatability and film quality, and the film is formed by changing the power ratio of each frequency, so that a considerable effect is obtained in terms of the coatability, composition control, and stress control. Is up.

Further, by applying two types of pulse modulation to high frequency power, the effect of suppressing generation of dust is enhanced.

[0004]

However, by plasma CVD using two frequencies of 13.56 MHz and 500 kHz, for example, WF ₆ and NH ₃ are used as source gases to form a film on a capacitive insulating film such as Ta ₂ O _5. When WNx is formed, the current-voltage characteristics of the capacitor insulating film have a larger leakage current than when the same electrode is formed by sputtering using a metal target and nitrogen gas.

As described above, there is a problem that a capacitor having an electrode formed by plasma CVD has a larger leak current and lower reliability than a capacitor having an electrode formed by sputtering.

[0006] Deterioration of the leak current characteristic is that a reaction layer is formed at the interface of the metal insulating film due to damage to the capacitive insulating film from plasma in the initial stage of film formation, resulting in a film having a large leak.

In the case of forming a WN film based on the WF ₆ or NH ₃ system, plasma is generated by a high frequency of 13.56 MHz, and radicals and ions are generated. Of these, the WFx radicals together with the N radicals contribute to the formation of a WNx film. On the other hand, the F radical reacts with the Ta ₂ O ₅ capacitance insulating film, and TaF is eliminated.

[0008] by a 500kHz RF power applied simultaneously to F ions are irradiated are accelerated to Ta ₂ O ₅ capacitor insulating film, damage enters the Ta ₂ O ₅ capacitor insulating film.

Due to these factors, the quality of the capacitor insulating film is deteriorated during the film formation, resulting in a film having a large leak.

[0010] Further, a large amount of F is contained in the WNx film, and this F diffuses into the Ta ₂ O ₅ film during the manufacturing process or during operation of the device, which causes a decrease in long-term reliability.

Accordingly, the present invention has been made in view of the above problems, and an object of the present invention is to generate radical species contributing to etching of a capacitance film while maintaining generation of radical species contributing to a film forming reaction. An object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming a film by suppressing ion implantation at a low energy and suppressing ion species generated in plasma into a capacitance film.

[0012]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention comprises forming a metal nitride on an insulating film by using a gas serving as a metal halide and a nitriding agent as a source gas. In plasma CVD, high-frequency power for generating plasma is supplied in pulses, and
In addition to the high frequency for plasma generation, a high frequency for accelerating ions in the plasma is applied, and the ions are applied.
High-speed for high-speed, high-frequency for plasma generation
It is applied at the time of off .

[0013]

Embodiments of the present invention will be described below. First, the principle and operation of the present invention will be described.

In film formation by plasma CVD, the ratio of various radicals and ions generated in the plasma is mainly determined by the electron temperature in the plasma. Further, these radicals and ions have different lifetimes. In the case of continuous discharge, it is difficult to control the dissociation of the source gas. By appropriately selecting the method of applying the high-frequency power, the abundance ratio of radicals and ions in the plasma can be controlled.

In the present invention, by controlling the method of applying high-frequency power and controlling the dissociation stage of the halide, which is the source gas, the ratio of radicals and ions present in the plasma is controlled to form a film. The generation of radicals and ions serving as etching species can be suppressed while ensuring the density of the species.

When plasma is generated by continuous discharge, halogen radicals and ions are generated in the plasma because the dissociation of the halide as a raw material proceeds. The halogen radicals and ions do not contribute to the film formation, and serve as etching species for the capacitance film. Of these, WF x radicals contribute to film formation, while F radicals and F ions
_In order to serve as an etching species for the ₂ O ₅ capacitance film, it is desirable to reduce the density in the plasma.

By the way, F radical and F ion are WF
Since the lifetime is shorter than that of x radicals, W
The density decreases more quickly than Fx radicals.

For this reason, by supplying high-frequency power with appropriate pulses, the density of F radicals and F ions in plasma can be reduced as compared with the case of continuous discharge.

Also, plasma CVD using these two frequencies
In the above, a low frequency one is effective for accelerating ions in the plasma.

Of the ions present in the plasma, the acceleration of F ions promotes the reaction between Ta and F ions in the Ta ₂ O ₅ film, thus affecting the film quality.

On the other hand, when WFx ions, which are film-forming species, are accelerated and irradiated, surface migration of the film-forming species is promoted, and the coverage is improved.

Therefore, the Ta ₂ O ₅ film can be covered even when the stack current has a high aspect ratio or has a unevenness.

Therefore, when the density of F ions is sufficiently reduced by the pulsed plasma and the ions are accelerated by the high-frequency power applied to the substrate side at the timing when the density is reduced, irradiation of F ions is suppressed, and WFx can be irradiated with ions, while preventing damage to the Ta ₂ O _5, it can be deposited WN film good coverage the Ta ₂ O ₅ film.

In a preferred embodiment of the method of manufacturing a semiconductor device according to the present invention, in a plasma CVD for forming a metal nitride on an insulating film by using a gas which is a halide metal and a nitriding agent as a raw material gas, Is supplied in pulses, and a high frequency for accelerating ions in the plasma is applied in addition to the high frequency for plasma generation when the high frequency for plasma generation is turned off.

As described above, in the embodiment of the present invention, since high-frequency power for generating plasma is supplied in pulses, generation of F radicals and F ions, which are etching species in plasma, is suppressed. WF that contributes to film formation
By irradiating the x-ions with acceleration and irradiating the surface of the capacitor insulating film to promote the surface migration and forming the film, it is possible to form a metal nitride film with less damage to the capacitor insulating film and good coverage. It has a function and effect.

[0026]

Next, in order to explain the above-mentioned embodiment of the present invention in more detail, an embodiment of the present invention will be described with reference to the drawings. Prior to the description of embodiments of the present invention, a semiconductor device to which the present invention is applied will be described.

Referring to FIG. 1 schematically showing a cross section of a semiconductor device, a DRAM (Dynamic Random Access Memory) to which the present invention is applied has the following structure.

An N well 4 is provided on the surface of the P-type silicon substrate 41.
2 are formed, and a first P well 4 is formed on the surface of the N well 42.
3a are formed, and an N-type isolation region 45 is formed on the surface around the N-well. On the surface of the P-type silicon substrate 41 excluding the N-well 42, a second P-well 43b is formed. P well 43a and P well 43b
The device is isolated by the N-type isolation region 45 and the field oxide film 46 provided on the surface.

On the surface of the first P well 43a, respective transistors 50 forming memory cells are formed in active regions separated by a field oxide film 46.

FIG. 1 shows only a pair of memory cells. Each transistor 50 has a P-well 4
N-type source / drain region 51 provided on surface 3a
a, 51b, a gate insulating film 52 provided on the surface of the P well 43a, and a P well 4 via the gate insulating film 52.
The gate electrode 55 is formed by stacking a polycrystalline silicon film 53 and a silicide film 54 provided on the surface 3a.

These transistors 50 are covered with a first interlayer insulating film 47. The interlayer insulating film 47 is provided with a contact hole 58 reaching the (one) source / drain region 51a shared by the pair of transistors 50. The bit line 56 provided on the surface of the interlayer insulating film 47 is connected to the source / drain region 51a via the contact hole 58.

The bit line 56 is connected to the second interlayer insulating film 48
Covered by On the interlayer insulating film 48, a capacitance element section 70 surrounded by a broken line in the figure is provided.

That is, the stack-type capacitive element to which the present invention is applied is composed of a capacitive lower electrode 2A, a tantalum oxide film 11A as a capacitive insulating film, and a capacitive upper electrode 3A.

The (other) N-type source of each of the pair of transistors 50 penetrates through the interlayer insulating films 48 and 47.
The pair of capacitive lower electrodes 2A are connected to the respective source / drain regions 51b via the contact holes 57 reaching the drain region 51b.

The upper electrode 3A is formed continuously in common with the respective capacitance elements of the pair of memory cells. The capacitor upper electrode 3A extends on the surface of the second interlayer insulating film 48, and is provided with a capacitor upper electrode 3Aa serving as an extraction portion for connecting to an upper layer wiring.

The capacitance element section 70 is formed of a third interlayer insulating film 49.
Covered by One aluminum electrode 71 of a plurality of aluminum electrodes 71 provided on the surface of interlayer insulating film 49 through contact hole 67 provided in interlayer insulating film 49.
a is connected to the capacitor upper electrode 3Aa. The aluminum electrode 71a has a fixed potential such as a ground potential. The side and bottom surfaces of the contact hole 67 are covered with a titanium nitride film 72, and the contact hole 67 is covered with a tungsten film 73.
Is filled with Also, a titanium nitride film 72 is provided on the bottom surface of the aluminum electrode 71 or the like.

On the other hand, the transistor 60 constituting the peripheral circuit of the memory device includes an N-type source / drain region 51 provided on the surface of the P well 43b, a gate insulating film 52 provided on the surface of the P well 43b, A gate electrode 55 is formed by laminating a polycrystalline silicon film 53 and a silicide film 54 provided on the surface of the P well 43b via a gate insulating film 52.

An aluminum electrode 71b is connected to one of the source / drain regions 51 via a contact hole 68 provided through the interlayer insulating films 47, 48 and 49.
This contact hole 68, like the contact hole 67,
The side and bottom surfaces are covered with a titanium nitride film 72 and filled with a tungsten film 73.

Similarly, other transistors 60 in the peripheral circuit
Gate electrode 55 is connected to aluminum electrode 71c via a contact hole.

Next, an embodiment of the present invention will be described.

FIG. 3 is a cross-sectional view schematically showing main steps of a manufacturing process of the semiconductor device shown in FIG. 1, and is a partially enlarged cross-sectional view of the capacitor element section 70 in FIG. FIG. 2 is a cross-sectional view schematically showing a schematic configuration of an example of a plasma CVD apparatus.

Referring to FIG. 2, the plasma CVD apparatus comprises a vacuum chamber 21, a film forming gas box 22 connected to the chamber 21, and a chamber 2 through an electromagnetic valve 23.
1, a vacuum pump 24, electrodes 25 and 26 installed in the chamber 21, and a vent gas source 28 connected to the chamber 21 via an electromagnetic valve 27.

The electrode 25 is a showerhead, 13.56 to a high frequency power source 3 6 via a matching box 3 4
It is electrically connected so that a high-frequency voltage of MHz can be applied, and is connected to a film forming gas box 22.

[0044] Further, the high-frequency power source 3 6 includes a high-frequency pulse modulation is possible RF signal generator and a high-frequency signal amplifier.

The electrode 26 is inside, the heater 3 8 for adjusting the film formation temperature is installed, a matching box 35
It is connected so as to apply a frequency of a voltage of 1 M Hz from 400kHz to a high-frequency power source 3 7 through.

Referring to FIG. 3A, a second interlayer insulating film 48 is formed, and a contact hole 57 penetrating through the interlayer insulating films 47, 48 is formed. Thereafter, chemical vapor deposition (CV)
A polycrystalline silicon film doped with phosphorus is deposited by the method D) and patterned to form the capacitor lower electrode 2. In addition, as a material for filling the inside of the contact hole 57, a metal material such as a tungsten film may be used. In FIG. 3A, reference numerals 56 and 58 denote bit lines and contact holes.

Referring to FIGS. 3B to 3D, reference numeral 2A denotes a stack electrode made of polysilicon or W containing phosphorus as an impurity, and 11A denotes a capacitive insulating film made of Ta ₂ O ₅ or the like. Is a metal electrode such as WN. Next, a manufacturing method will be described.

First, as shown in FIG. 3B, after depositing, for example, phosphorus-doped polysilicon, W, etc., a stack electrode 2A is formed by, for example, RIE (reactive ion etching).

Next, as shown in FIG.
LPCVD (Low pressure CVD) by (OC ₂ H ₅ ) ₅ + O ₂
A Ta ₂ O ₅ capacitive insulating film 11 on the stack electrode 2A
A is deposited.

Next, as shown in FIG. 3D, for example, WF ₆ + NH ₃ is used as a source gas, for example, at 13.5.
A first high frequency of 6 MHz is applied to 25 showerheads with an on-time of 500 us and an off-time of 500 us.
The WN film is formed so as to cover the capacitor insulating film 11A by a CVD method using plasma pulse oscillation in which the high frequency of 400 kHz is applied when the first high frequency is turned off.

By suppressing the damage and forming a WN electrode with good coverage, a capacitor with little leakage and high heat resistance can be formed.

Next, the effects of the present invention will be described based on the experimental results in the embodiments of the present invention.

FIG. 4 shows the current-voltage characteristics of a capacitor manufactured by the method of this embodiment and the current-voltage characteristics of a capacitor having electrodes formed by a conventional plasma CVD as a comparative example.

FIG. 4 shows that the pulse plasma CV of this embodiment is
The leakage current density at +1.5 V of the capacitor having the electrode formed with D is 3E-16 (3 × 10 ^-16 ) A / c.
and the leak current density at -1.5 V is:
7E-16 (7 × 10 ^-16 ) A / cell.

On the other hand, continuous oscillation plasma CVD
In the capacitor in which the electrodes are formed in the above, the leakage current density at +1.5 V is 3E-12A / cell,
The leakage current density at 1.5V is 3E-13A / ce
11.

Table 1 shows the results of measuring the capacitance of the capacitors on which the electrodes were formed in each system (plasma continuous oscillation system and plasma pulse oscillation system).

In each system, the stack electrode is polysilicon containing phosphorus, and the thickness of the Ta ₂ O ₅ capacitance insulating film is 100 Å (10 nm).

Table 1 shows the capacitance values of Ta ₂ O ₅ capacitors having WN electrodes formed by the respective methods.

As can be seen from Table 1, a capacitor having a WN electrode formed by plasma pulse oscillation has a higher capacitance than a capacitor having a WN electrode formed by plasma continuous oscillation. From these results, it can be seen that the plasma oscillation method reduces damage to the capacitor insulating film during formation of the metal electrode and suppresses deterioration of the capacitor film.

[0060]

[Table 1]

[0061]

As described above, according to the present invention,
In the plasma CVD method, the plate electrode of the capacitor can be formed while suppressing the damage to the capacitor film, and the capacitor having a small leakage current can be formed. This is extremely effective in the capacitor forming process. .

The reason is that, in the present invention, since high-frequency power for generating plasma is supplied in pulses, generation of radicals and ions that do not contribute to film formation in plasma and act as etching species is suppressed while suppressing the formation of plasma. When the density of ions of the etching species decreases, the ions contributing to the film formation are accelerated and irradiated onto the capacitor insulating film, and surface migration is promoted to form the film, thereby damaging the capacitor insulating film. This is because a metal nitride film can be formed with good coverage and good coverage.

[Brief description of the drawings]

FIG. 1 is a view for explaining an embodiment of the present invention, and is a cross-sectional view of a semiconductor memory device.

FIG. 2 is a cross-sectional view illustrating a schematic configuration of an example of a plasma CVD apparatus according to an embodiment of the present invention.

FIG. 3 is a partially enlarged view of a cross section of the capacitive element section in FIG. 1;
It is a figure shown in order of a manufacturing process.

FIG. 4 is a diagram illustrating current-voltage characteristics of a capacitor manufactured according to an example of the present invention and a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 21 Vacuum chamber 22 Film-forming gas box 23 Solenoid valve 24 Vacuum pump 25 Shower electrode 26 Electrode 27 Solenoid valve 28 Venting gas 29 Stack electrode 30 Capacitive insulating film 31 Metal electrode 32 Insulating film 33 Substrate 34 Matching box 35 Matching box 36 High frequency Power supply 37 High-frequency power supply 2 Capacity lower electrode 2A Capacity lower electrode 3A Capacity upper electrode 3Aa Capacity upper electrode 11A Tantalum oxide film 41 P silicon substrate 42 N well 43 P well 43a First P well 43b Second P well 45 N type separation Region 46 Field oxide film 47 Interlayer insulation film 48 Second interlayer insulation film 49 Third interlayer insulation film 50 Transistor 51 N-type source / drain region 51a Source / drain region 51b Source / drain region 52 Gate oxide film 53 Polycrystal Recon film 54 Silicide layer 55 Gate electrode 53 Bit line 57 Contact hole 58 Contact hole 60 Transistor constituting a peripheral circuit 67 Contact hole 68 Contact hole 70 Capacitor element section 71 Aluminum electrode 71a Aluminum electrode 71b Aluminum electrode 71c Aluminum electrode 72 Titanium nitride film 73 tungsten film

Continuation of front page (56) References JP-A-9-312271 (JP, A) JP-A-9-293600 (JP, A) JP-A-9-260306 (JP, A) JP-A-9-137273 (JP, A) JP-A-8-306659 (JP, A) JP-A-3-255624 (JP, A) JP-A-3-243772 (JP, A) JP-A-2-165628 (JP, A) JP 64-5015 (JP, A) JP-A-63-72881 (JP, A) JP-A-63-2319 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/285 H01L 21/285 301 C23C 16/50

Claims (5)

(57) [Claims] In a plasma CVD for forming a metal nitride on an insulating film by using a gas serving as a halide metal and a nitriding agent as a source gas, a high-frequency power for generating plasma is supplied by a pulse, and In addition to high frequency for plasma generation, high frequency for accelerating ions in plasma is applied ,
High frequency for accelerating ions, for generating plasma
The method is applied when the high frequency is turned off . 2. A high-frequency pulse for generating the plasma.
On-time and off-time of 1μsec to 500μsec
2. The method for manufacturing a semiconductor device according to claim 1, wherein the voltage is applied within a range (1 μs <Ta <500 μs) . 3. A plasma CVD method for forming a metal nitride on an insulating film using a gas serving as a halide metal and a nitriding agent as a source gas, wherein a high-frequency power for generating plasma is supplied by a pulse, and In addition to the high frequency for plasma generation, a high frequency for accelerating the film forming seed ions in the plasma is applied when the high frequency for plasma generation is turned off, and the plasma is used as an etching seed without contributing to film formation. While suppressing the generation of acting radicals and ions, the ions contributing to film formation are accelerated and irradiated on the insulating film to promote surface migration to form the metal nitride film. Manufacturing method of a semiconductor device. 4. A source gas is supplied from an electrode (shower head) above a substrate in a plasma CVD apparatus, the gas is mixed in a reaction chamber, and a high frequency power for generating plasma by dissociating the gas is supplied to the source gas. The method according to claim 3 , wherein a pulse is supplied to the electrode (shower head) on the substrate. 5. Using WF _6, NH ₃ gas system to the raw material gas, the tantalum oxide film as the insulating film, according to claim 3 for forming a WN film as a plate electrode, characterized in that
Or the method of manufacturing a semiconductor device according to 4 .