JP3246242B2 - Gate drive device for gate turn-off thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate drive device for a gate turn-off thyristor for controlling the gate turn-off thyristor to be more compact and more reliable.

[0002]

2. Description of the Related Art Before describing a conventional gate turn-off thyristor driving circuit, an on-off control of a gate turn-off thyristor will be described. FIG. 5 shows an example of a circuit using a conventional gate turn-off thyristor 1 and a driving device 2 (hereinafter sometimes simply referred to as a driving device) of the gate turn-off thyristor 1. The connected freewheel diode. The diode 4, the capacitor 5, and the resistor 6 constitute a snubber circuit, 7 is a load, and 8 is a stray inductance contained in the wiring.

FIG. 6 is an equivalent schematic diagram of an internal circuit of a large-capacity gate turn-off thyristor 1, which indicates that many thyristor models such as 20a are connected in parallel as 20b, 20c,... 20n. be able to.
Further, from the gate terminal G to each thyristor model, there exists an impedance by a pattern wiring such as Z1, Z2, Z3. A driving circuit of a gate turn-off thyristor is disclosed in, for example, Japanese Patent Application Laid-Open No. 5-244777. FIG. 7 shows the eleventh embodiment of Japanese Patent Application Laid-Open No. 5-244777.
An example of connection of a gate drive current circuit corresponding to the drive device 2 in which the one shown in the figure is reconfigured into an actual electronic circuit for convenience of explanation is shown.

In FIG. 1, reference numeral 9 denotes a DC power supply for high gate and on-gate currents, 10 a shunt resistor for detecting high gate current, 11 a high gate current control MOSFET,
13 is a control resistor for the MOSFET 11, 14 is a signal circuit for controlling on / off of the high gate current, 15 is a shunt resistor for detecting the on-gate current, 16 is a MOSFET for controlling the on-gate current, 18 is a control resistor for the MOSFET 16, and 19 is a control resistor for the MOSFET 16. This is a signal circuit for controlling on / off of an on-gate current.

FIG. 8 shows waveforms of various parts when the gate turn-off thyristor 1 of FIG. 5 to which the load 7 is connected is turned on. In the figure, (A) is a voltage between the anode and the cathode of the gate turn-off thyristor 1, (B) is an anode current of the gate turn-off thyristor 1, (C) is a current of the snubber capacitor 5, and (D) is a current of the gate turn-off thyristor 1. The gate current, (E), is the gate voltage of the gate turn-off thyristor 1.

Next, the operation in the section X in FIG. 8, that is, the section from when a high gate signal is supplied to the gate turn-off thyristor 1 until it is stabilized will be described. T1 shown in FIG.
(D) in order to cause the apparently large number of thyristors inside the gate turn-off thyristor 1 to transition from the OFF state to the ON state at the same timing at the same timing.
High gate current I of the large current pulse shown in the gate current waveform
When the GM flows and the operation is turned on, the discharge current of the snubber capacitor 5 flows from the anode of the gate turn-off thyristor 1 to the cathode, and the gate turn-off thyristor 1 is turned on and stabilized.

Then, at t, the stray inductance 8
5, the reverse current of the discharge current of the snubber capacitor 5 flows backward from the cathode to the gate or the anode of the gate turn-off thyristor 1 along a current route shown by a dotted line in FIG. The action works. Therefore, the gate turn-off thyristor 1
A large number of thyristors existing inside have an incomplete ON state in which some of the thyristors are ON and some of the thyristors are OFF, so that the capability of the gate turn-off thyristor 1 is reduced or a failure occurs.

Next, the operation in the Y section of FIG. 8 will be described. When the anode current IA at t2 is equal to or less than the latching current of the gate turn-off thyristor 1 (current required to maintain the on-state), the on-gate current IG is required to maintain the on-state (see FIG. 8D). ). However, even if the necessary IG is supplied, as shown in FIG. 6, each gate of a large number of thyristors existing inside the gate turn-off thyristor 1 has different values of impedance ZG depending on the distance from the gate terminal G. In addition, the shunt of the on-gate current IG is not equally distributed, and decreases as the distance from the gate terminal G increases, and a thyristor that cannot maintain the on-state occurs.

In such a state, when the load happens to fluctuate and a pulse-like anode current flows as shown at t3, this anode current concentrates on the on-state thyristor inside the gate turn-off thyristor 1. And
The voltage between the anode and the cathode increases (FIG. 8B). Since the product of the anode-cathode voltage and the anode current causes a thyristor loss, if the anode-cathode voltage increases, the loss increases and the gate turn-off thyristor 1 is damaged. For this reason, in order to reduce the number of thyristors in the off state generated inside the gate turn-off thyristor, the on-gate current IG must be used by increasing it more than necessary.

As described above, the gate turn-off thyristor 1 is turned on, and a gate current for holding the gate turn-off thyristor 1 requires a pulsed high gate current IGM and a continuous on-gate current IG. In FIG. 7, when a high-gate or on-gate signal circuit 14 or 19 outputs an on signal, a voltage is applied between the gates and sources of the MOSFETs 11 and 16 to turn on, and the shunt resistor 1
A gate current flows through the gate turn-off thyristor 1 through 0 or 15. These shunt resistors 10 and 15 include
A voltage (V = I × R) is generated, and a voltage obtained by subtracting the voltage from the DC power supply 9 becomes a voltage between the gate and the source of the MOSFETs 11 and 16, and a current controlled by the voltage between the gate and the source is finally obtained. It becomes the high gate current IGM and the on-gate current IG.

Because of such an operation, the respective high gate current IGM and on-gate current IG are determined by the values of the shunt resistors 10 and 15. Then, as described above, since the value is determined on the basis of the apparently plural thyristor in the gate turn-off thyristor used, the largest current is naturally a large value. Further, since the on-gate current is not a pulse but a continuous current, the average power becomes large. As a result, as shown in FIG. 7, the MOSFET 11 and the shunt resistor 10 for controlling the high gate current, and the MOSFET 16 and the shunt resistor 15 for controlling the on-gate current. Must be provided separately. In the following, the gate current may be referred to as a gate current or a gate drive current, which has the same meaning.

[0012]

As described above, in the prior art, the on-gate current has been increased to a level higher than the required level of the element in order to eliminate breakage and instability in the on state of the gate turn-off thyristor. As a result, the on-gate current value increases, the capacity of the driving device also increases, and M
It is necessary to provide an OSFET and a shunt resistor for each of the high gate and the on-gate, and there is a problem that the size is increased.

Although the MOSFET and the shunt resistor are circuit elements having particularly large dimensions, the necessity of a plurality of these sets also causes the circuit to become large.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and a method of applying a gate signal suitable for downsizing a driving device for keeping a gate turn-off thyristor in a stable ON state, and its application. It is intended to provide a circuit.

[0015]

According to a first aspect of the present invention, a gate drive device for a gate turn-off thyristor has a first middle gate drive current generating circuit that outputs a pulsed gate drive current following a high gate drive current. Things.

In the gate drive device of the gate turn-off thyristor according to the second invention, in addition to the means of the first invention, the high gate drive current control element also serves as the current control element of the first middle gate drive current generation means. .

The gate drive of the gate turn-off thyristor according to the third invention, a timer circuit and a second middle gate drive current generating means and, on gate current output current is level to maintain the gate turn-off thyristor in the ON state And a generating circuit.

According to a fourth aspect of the present invention, in addition to the means of the third aspect,
The high gate drive current control element performs both on-gate current control and second middle gate current control.

According to a fifth aspect, in addition to the means of the third aspect, the timer circuit has a synchronization means.

According to a sixth aspect of the present invention, there is provided a high gate drive current generating circuit, first middle gate drive current generating means,
Those having a second middle gate drive current generating means, and the on-gate current generating circuit output current is les <br/> bell to maintain the gate turn-off thyristor in the ON state.

According to a seventh aspect of the present invention, in addition to the means of the sixth aspect,
The high-gate current control element controls the on-gate current control and the first
And the second middle gate drive current control.

[0022] An eighth aspect of the present invention is in addition to the seventh inventions of means,
A MOSFET having a drain connected to the gate of a gate turn-off thyristor as a current control element;
Collector to the gate of the FET, is appraised jitter in power, MO
And a circuit including a transistor having a base connected to the source of the SFET.

[0023]

The first middle gate drive current generating means according to the first or sixth aspect of the present invention is characterized in that the pulse-like current is generated only when the current of the snubber capacitor is reversed and the gate turn-off thyristor is easily turned off. Since the gate signal is supplied, the gate turn-off thyristor is reliably maintained in the on state.

The third, or the second, fifth and sixth inventions
The middle gate drive current generation means of this type provides a pulse-like gate signal only when the load current increases, so that the gate turn-off thyristor is reliably maintained in the on state, and the on-gate current level is reduced accordingly. There is an action that can be done.

According to the second, fourth or seventh aspect of the present invention, the control element for the high gate drive current is an on-gate current,
Since the first and second middle gate drive currents are also controlled, the size of the gate drive device can be reduced.

The MOSFET used as the control element of the high gate drive current generating circuit according to the eighth aspect of the present invention includes a transistor for controlling the current using a gate input signal. Become

[0027]

【Example】

Embodiment 1 FIG. Hereinafter, an embodiment of the present invention will be described. The waveforms of various parts of the gate turn-off thyristor 1 shown in FIG. 1 when the gate turn-off thyristor 1 is turned on are for explaining the case where the middle gate current according to the present invention is applied to the gate turn-off thyristor 1. When the high gate current IGM flows at the timing of t1 in the same figure and the gate turn-off thyristor 1 operates from the off state to the on state, the discharge current of the snubber capacitor 5 flows and the gate turn-off thyristor 1 is temporarily stabilized in the on state. .

However, it is explained in the conventional example that at time t, a part of the thyristor inside the gate turn-off thyristor 1 is turned off because the reverse current of the snubber capacitor 5 flows from the cathode to the anode of the gate turn-off thyristor 1 at time t. As you did. for that reason,
An off state can be prevented by adding a first middle gate drive current such as IM1 for canceling the reverse current to the gate current of the gate turn-off thyristor 1. That is, the first middle gate drive current IM1 is added at such a timing that the current of the snubber capacitor is reversed, and its magnitude is not as large as the high gate current IGM.

Embodiment 2 FIG. At a timing of t2 in FIG. 1, in a state where an anode current smaller than the latching current of the gate turn-off thyristor 1 flows, an on-gate current is necessary to keep the thyristor on,
Since the anode current is small, an on-gate current IG that is large enough to increase the number of on-state thyristors existing inside the gate turn-off thyristor 1 is not necessary. However, if the load fluctuates as described above and a pulse-like anode current happens to occur as shown at the timing of t3, the number of the ON-state thyristors existing in the gate turn-off thyristor 1 is increased. anode·
It is necessary to suppress an increase in the cathode voltage.

Therefore, when a second middle gate drive current such as IM2 shown in the gate current waveform of FIG. 2D is output in synchronization with the pulsed anode current, a large number of gate currents are present inside the gate turn-off thyristor 1. As a result, the number of thyristors in the ON state increases, and an increase in the anode-cathode voltage can be suppressed. The pulsed anode current as shown in (B) in actual use is substantially fixed because it is generated when two or more other gate turn-off thyristors connected in series are turned off in an inverter circuit or the like. It occurs periodically in a cycle. For this reason, it is efficient to supply the IM2 gate drive current at the same cycle as this cycle.

Embodiment 3 FIG. FIG. 2 shows an example of the configuration of a drive circuit for a gate turn-off thyristor of the present invention. In FIG. 2, reference numeral 2 denotes a gate driving device. This configuration and operation will be described. In the figure, reference numeral 24 denotes a signal corresponding to the timing at which the reverse current of the snubber capacitor 5 is generated upon receiving the high gate signal from the high gate signal circuit 14,
And a timer circuit for generating a periodic timing signal substantially synchronized with the off-timing of the other gate turn-off thyristor 1. 23 is a first middle gate signal IM1
And generates a first middle gate signal IM1 in response to a signal from the timer circuit 24 at which the snubber capacitor 5 generates a reverse current.

Reference numeral 25 denotes a circuit for generating a second middle gate signal IM2, which periodically receives a timing signal substantially synchronized with the off-timing of the other gate turn-off thyristor 1 from the timer circuit 24, and A gate signal IM2 is generated.

The resistors 21 and 26 adjust the intensity (magnitude) of the first middle gate signal IM1 and the intensity (magnitude) of the second middle gate signal IM2, respectively.

A MOSFET 16 generates a gate drive current in response to a gate signal.
OSFET 16 outputs a high gate signal, an on gate signal,
A gate current of four signals of a first middle gate signal IM1 and a second signal IM2 is generated.

When the high gate signal circuit 14 outputs an ON signal, a voltage is applied between the gate and the source of the MOSFET 16 to turn on the MOSFET 16, and a current flows from the power supply 9 through the shunt resistor 15 to the gate turn-off thyristor 1. This shunt resistor 15 has a voltage (V = I ×
R) occurs, and the voltage obtained by subtracting this voltage V from the voltage of the power supply 9 becomes the voltage between the gate and the source of the MOSFET 16,
The current controlled by the gate-source voltage becomes the high gate drive current IGM.

Next, even if the on-gate signal circuit 19 outputs an on signal, the operation mode is the same as that of the high gate drive current IGM. However, if the value of the resistor 18 is larger than the resistance 13, the on-gate drive current IG becomes higher than the high gate drive current IGM.
Less than. And the on-gate drive current IGM
Is smaller than the conventional level (D in FIG. 8).

The ON signal of the high gate signal circuit 14 is sent to the timer circuit 24, and the timer circuit outputs the ON signal of the first middle gate signal IM1 only once for one high gate ON signal at a predetermined timing. appear. The preset timing is a timing at which the current of the snubber capacitor 5 in FIG. 4 reverses (or may be slightly earlier than the reverse rotation).

The timer circuit 24 further generates an ON signal of the second middle gate signal IM2. ON signal of the second middle gate signal IM2 is generated to repeatedly periodically.

The first and second middle gate signals IM
The gate current is also controlled by the MOSFET 16 with respect to the ON signals of 1, 1 and IM2, similarly to the high gate signal IGM.

The first middle gate signal generation circuit 23 and the resistor 21 are first middle gate signal generation means. Second
The middle gate signal generation circuit 25 and the resistor 26 are the second middle gate signal generation means.

The second middle gate drive current IM2 shown in the gate current waveform of FIG. 1 (D) is a current obtained by adding a constant current to the on-gate drive current IG. Even when the anode current is not generated periodically, the output at a certain period has the effect of increasing the number of on-state thyristors existing inside the gate turn-off thyristor 1. This has the same effect as increasing the on-gate drive current IG, but according to the circuit of FIG.
Since the current value of the second middle gate drive current IM2 can be individually set, the appropriate gate current value can be determined by determining the appropriate gate current value for the change in the anode current due to the difference in the load and the difference in the characteristics of the gate turn-off thyristor. An effective gate current can be supplied, and the capacity of the driving device can be reduced.

Embodiment 4 FIG. The sudden increase in the anode current is not always limited to a constant period as described in the first embodiment. That is, during a transition in which the control phase angle is changed according to a voltage change of the power supply or the load, the cycle may temporarily change.

Alternatively, two fluctuations of the same cycle may appear at different timings. In such a case, it is effective to generate a plurality of sets of the second middle gate signal IM2 at different timings or different periods.

FIG. 3 shows a circuit provided with a circuit 28 for generating a third middle gate signal IM3 and an adjustment resistor 27. This circuit can further include fourth and fifth circuits as necessary. In FIG. 3, the timer circuit 24 is shared by the middle gate signal circuits, but can be provided separately.

Embodiment 5 FIG. FIG. 4 shows details of a specific circuit of the MOSFET 16 for more reliably reflecting the signal level of each middle gate signal circuit on the gate current.

The operation will be described. When the middle gate signal circuit 23 outputs an ON signal, a voltage is applied between the gate and the source of the MOSFET 16 to turn on, and the power supply 9 passes through the shunt resistor 15 to turn on the gate turn-off thyristor 1.
Current flows through The shunt resistor 15 has a voltage (V
= I × R), and this voltage is V
When the voltage reaches BE, the base current flows through the transistor 17 to the resistor 22
Through the transistor 17 determined by the resistor 21
Of the collector of the transistor 17
A voltage is generated between the emitters.

The voltage obtained by subtracting (transistor VBE + voltage of resistor 22) (= voltage of shunt resistor 15) from the voltage between the collector and the emitter becomes the voltage between the gate and the source of the MOSFET 16, which is controlled by the voltage between the gate and the source. The current becomes the middle gate current IM1.

Next, even if the on-gate signal 19 (not shown in FIG. 4) outputs an on-signal, the operation mode is the same as that of the middle gate current IM2. The current decreases and the base current also decreases. When the base current decreases, the voltage of the resistor 22 also decreases. Therefore, the voltage obtained by subtracting the voltage of the transistor VBE + the voltage of the resistor 22 from the voltage between the collector and the emitter of the transistor 17 is also obtained (the voltage between the gate and the source of the MOSFET 16).
And finally lower than the middle gate current IM1.

As described above, the gate current can be controlled by changing the value of the small-capacity resistor such as the resistor 21.

[0050]

According to the first aspect of the present invention, after the high gate signal is output, the time when the reverse current is generated in the capacitor of the snubber circuit is reduced.
Since the first middle gate drive current generating means for generating the first middle gate signal is used in the timing, the ON state of the gate turn-off thyristor is more reliably maintained.

According to the third and sixth aspects, the second middle gate drive current generating means and the timer circuit generate the second middle gate drive current at a predetermined cycle after the generation of the high gate current. Accordingly, since the level of the on-gate current is lowered, the required power of the gate signal can be reduced.

According to the second, fourth, and seventh aspects of the invention, the control element for controlling the high gate drive current also controls the on-gate current and the first and second middle gate drive currents. Has the effect of reducing the size.

According to the fifth aspect, the timer circuit outputs the second middle gate drive current generation timing signal in synchronization with the periodic increase in the load current of the gate turn-off thyristor. The time width of the drive current can be shortened, so that the gate current capacity can be reduced and the gate drive device can be downsized.

According to the eighth aspect, a circuit for generating the high gate drive current, the on-gate drive current, and the first and second middle gate drive currents can be simply configured, and the gate drive device can be downsized. be able to.

[Brief description of the drawings]

FIG. 1 is an operation waveform of each part in an ON state of a gate turn-off thyristor according to a first embodiment of the present invention.

FIG. 2 is a circuit configuration diagram of a driving device of the gate turn-off thyristor of FIG.

FIG. 3 is a circuit configuration diagram of a driving device of a gate turn-off thyristor according to another embodiment of the present invention.

FIG. 4 is a detailed circuit explanatory diagram of the driving device of FIG. 2;

FIG. 5 is an explanatory diagram of connection between a circuit using a gate turn-off thyristor and a load.

FIG. 6 is an internal schematic diagram of a gate turn-off thyristor.

FIG. 7 shows a drive circuit diagram of a conventional gate turn-off thyristor.

FIG. 8 shows operation waveforms of various parts of a conventional gate turn-off thyristor in an on state.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Gate turn-off thyristor 2 Driver 5 Snubber capacitor 7 Load 8 Wiring inductance 9 Power supply 10 Shunt resistor 11 MOSF
ET 13 resistor 14 high gate signal circuit 15 shunt resistor 16 MOSF
ET 18 Resistance 19 On-gate signal circuit 21 Resistance 23 Middle gate IM1 signal circuit 24 Timer circuit 25 Middle gate IM2 signal circuit 26 Resistance 27 Resistance

Claims (8)

(57) [Claims] 1. A gate drive apparatus of the gate turn-off thyristor with a snubber circuit including a capacitor and generates a high gate drive current to shift the gate turn-off thyristor from the OFF state to the ON state DOO
Gate turn-off thyristor
A high- gate drive current generating circuit that outputs an on- gate signal for maintaining the on-state of the snubber circuit , wherein a reverse current is generated in the capacitor of the snubber circuit following the generation timing of the high-gate drive current.
A gate drive device for a gate turn-off thyristor , comprising: a first middle gate drive current generating means for supplying a pulsed gate drive current having a lower level than the high gate drive current when the gate drive is performed. 2. The gate of a gate turn-off thyristor according to claim 1, wherein the high gate drive current control element of the high gate drive current generation circuit also functions as a current control element of the first middle gate drive current generation means. Drive. 3. A gate drive device for a gate turn-off thyristor, comprising: a high gate drive current generating circuit for generating a high gate drive current for shifting the gate turn-off thyristor from an off state to an on state; in those with a on-gate current generating circuit for providing an on-gate drive current is between the gate turn-off thyristors continuously, the on-gate current generating circuit of the level of the output current to maintain the gate turn-off thyristor in the oN state < a timer circuit that generates a signal at a substantially constant cycle based on the generation timing of the high gate drive current; and a timer circuit that generates a signal at a substantially constant cycle based on the generated signal of the timer circuit. Gate turn-off thyris The gate drive of the gate turn-off thyristors and having a second middle gate drive current generating means for applying a pulsed gate drive current. 4. The high gate drive current control element of the high gate drive current generation circuit serves also as the on-gate current control element of the on-gate current generation circuit and the second middle gate drive current control element of the second middle gate drive current generation means. 4. A gate drive device for a gate turn-off thyristor according to claim 3, wherein: 5. The timer circuit controls the generation timing of the second middle gate drive current output from the timer circuit to coincide with the timing at which another gate turn-off thyristor connected in series with the gate turn-off thyristor turns off. 4. A gate drive device for a gate turn-off thyristor according to claim 3, further comprising a synchronizing means. 6. A gate drive device for a gate turn-off thyristor having a snubber circuit including a capacitor, a high gate drive current generating circuit for generating a high gate drive current for shifting the gate turn-off thyristor from an off state to an on state, in those with a on-gate current generating circuit gate turn-off thyristor will give on the gate drive current between said gate turn-off thyristor in the oN state continuously, following the generation timing of the high gate drive current, the capacitor of the snubber circuit Thailand where reverse current occurs
A first middle gate drive current generating means for providing a pulsed gate drive current at a lower level than the high gate drive current, and a generation timing of the high gate drive current.
A timer circuit for generating a signal at a substantially constant cycle; and a second middle gate drive current generating circuit for applying a pulsed gate drive current to the gate turn-off thyristor at a substantially constant cycle based on the generated signal of the timer circuit. with a means, the on gate current generating circuit, level of the output current to maintain the gate turn-off thyristor in the oN state
A gate drive device for a gate turn-off thyristor, characterized in that: 7. The high gate drive current control element of the high gate drive current generation circuit includes: an on-gate current control element of the on-gate current generation circuit; a first middle gate drive current control element of the first middle gate drive current generation means; 7. The gate drive device for a gate turn-off thyristor according to claim 6, wherein said gate drive device also serves as a middle gate current control element of said second middle gate drive current generating means. 8. A circuit in which a gate current control element of a high gate drive current generating circuit is connected to a source of one MOSFET from a power supply via a shunt resistor, and a plurality of resistors connected to a gate of the MOSFET. High gate signal, on-gate signal,
A circuit to which a first middle gate signal and a second middle gate signal are supplied; a circuit for connecting a drain of the MOSFET to a gate of a gate turn-off thyristor; a collector to the gate of the MOSFET; an emitter to the power supply; the gate drive of the gate turn-off thyristor according to billed to claim 7 you <br/> characterized in that it is constituted by a circuit including a transistor having a base to a source of the MOSFET is connected.