JP3240788B2 - Image signal binary decision circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a binary discriminating circuit for obtaining a binary discrimination by comparing the magnitude of analog data such as an image reading signal with a threshold value.

[0002]

2. Description of the Related Art An image processing apparatus obtains an image signal by raster-scanning an image originally having a gradation of light and shade, and performs a binarization process on the image data obtained by subjecting the image signal to some sort of filtering. Is used to calculate geometric features such as the length, area, and center of gravity of the line image.

Conventionally, a method of binarizing an image has been performed in the following procedure.

(1) A threshold value (luminance) for binarization is set for an input grayscale image by some method.

(2) The luminance of each pixel of the input image is inspected,
If this is larger than the threshold value, the process is set to "1", and if smaller than this, it is set to "0".

(3) A binarized image is obtained by integrating the processing results for each pixel.

A conventional binarizing circuit for binarizing processing is as follows.
As shown in FIG. 5, a continuous input image reading signal is used as a comparison input, and a comparator using a threshold as a comparison reference is used to obtain continuous binary data at the output of the comparator.

[0008]

In the conventional binarizing circuit, depending on the luminance of the pixel before and after the pixel crosses the threshold value, 1 is required.
There is a possibility that binarization shifted by pixels may be performed. This will be described below.

FIG. 6 shows an example of an error in the binarization process. The horizontal axis indicates the positions of successive pixels, and the vertical axis indicates the luminance of each pixel. In the illustrated example, as a result of comparing the brightness of the pixels from pixel numbers i to j + 1 with the magnitude of the threshold value, pixels i and j + 1
Is "0", and the binarization between pixel numbers i + 1 to j is "1".

When the length in an image is measured based on the binarization result, a portion where "1" s from pixel numbers i + 1 to j continue is the length. Here, when the luminance of the pixel of the pixel number i, j + 1 is infinitely close to the threshold value, the length to be originally measured must be Ir from the pixel number i to j + 1, and the length error is at both ends. This is equivalent to one pixel, resulting in an error of two pixels in total.

A similar problem arises when binary discrimination is required, such as detection of a zero-cross point of an image signal.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a binary discriminating circuit for an image signal for obtaining a binary discrimination by appropriately classifying pixels whose luminance signal is close to a threshold value.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a binary discriminating circuit for comparing the magnitude of an input signal which becomes a luminance signal sequence of a pixel with a set threshold value. A pair of delay means for calculating the luminance values u (i + 1) and u (i-1) of the preceding and succeeding pixels with respect to the luminance value u (i) of the target pixel, and the luminance value u (i) and the luminance value u (i +
1) or a pair of average value calculating means for calculating the average value of u (i-1), respectively, and determining the magnitude of the threshold value for both the luminance value u (i) and the average value obtained by the average value calculating means. A comparison means for comparing, and a logic means for judging the magnitude of the luminance value u (i) from the logical sum of the three comparison results are provided.

According to the present invention, there is provided a binary discriminating circuit for comparing the magnitude of an input signal to be a luminance signal train of a pixel with a set threshold value, wherein the luminance value u (i) of the pixel to be subjected to the binary discrimination is provided.
Luminance values u (i + 1), u (i−
1), a pair of subtraction means for calculating the difference between the luminance value u (i) and the luminance value u (i + 1) or u (i-1), and a weighting factor a for each of the differences. A pair of coefficient means for multiplication, and a pair of addition means for adding the luminance value u (i) to both outputs of the coefficient means, respectively.
Comparing means for comparing the luminance value u (i) and both addition results obtained by the addition means with the threshold value; and determining the magnitude of the luminance value u (i) from the logical sum of the three comparison results. Logic means for performing the operation.

[0015]

The pixel to be discriminated is determined based on how large the average value or the difference between the luminance value of the pixel to be subjected to the binary discrimination and the luminance values of the pixels before and after the pixel is relative to the threshold value. It is determined whether the value is larger than the threshold value.

[0016]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. An input signal which becomes a pixel luminance signal sequence is delayed by one pixel in each of the delay circuits 11 and 12 having a serial configuration. The average value calculation circuit 13 calculates an average value of the input signal and the output signal of the delay circuit 11. Similarly, the average value calculation circuit 14
An average value of the output signal of the delay circuit 11 and the output signal of the delay circuit 12 is obtained.

In the comparators 15 to 17, the same threshold value is set as a comparison reference. The comparator 15 uses the output of the average value calculation circuit 13 as a comparison input, the comparator 16 uses the output of the delay circuit 11 as a comparison input, and the comparator 17 uses the output of the average value calculation circuit 14 as a comparison input.

The logic circuit 18 includes comparators 15 to 1
The binarized data of the input signal is determined from the determination result of step 7.

In this embodiment, assuming that the luminance value of the (i + 1) th pixel of the input signal is u (i + 1), the delay circuit 1
Outputs 1 and 12 are the luminance values of the i-th and (i-1) -th pixels, which are u (i) and u (i-1), respectively.

Therefore, the output of the average value calculation circuit 13 is delayed by one pixel from the luminance value u (i) of the i-th pixel.
The average value is the luminance value u (i-1) of the -1st pixel. Similarly, the output of the average value calculation circuit 14 is the average value of the luminance value u (i) of the i-th pixel and the luminance value u (i-1) of the (i-1) -th pixel advanced by one pixel. .

The comparator 15 determines whether the average value of the luminance value of the i-th pixel and the luminance value of the (i + 1) -th pixel is larger than a threshold value. Conversely, the comparator 17
Determines whether the average value of the luminance value of the i-th pixel and the luminance value of the (i-1) -th pixel is larger than a threshold value. The comparator 16 determines whether or not the luminance value of the i-th pixel is larger than a threshold.

The judgment of the logic circuit 18 on the judgment results of the comparators 15 to 17 is made based on the following logical conditions.

(1) If u (i) ≧ threshold, the judgment result is “1”. (2) u (i) <threshold, and u (i) and u (i +
If the average value of 1) ≧ the threshold value, the determination result is “1”. (3) u (i) <the threshold value, and u (i) and u (i−
When the average value of 1) ≧ the threshold value, the determination result is “1”. (4) The other determination results are “0”. When these binarization determinations are represented by a software configuration, they are as shown in FIG. In the drawing, th indicates a threshold value. As is clear from the figure, the logic circuit 18 performs a logical OR operation on the determination results of the three comparators 15 to 17.

As described above, in this embodiment, when the luminance of the i-th pixel is higher than the threshold value, a binary output of "1" is obtained, and the luminance of the adjacent (i-1) -th or (i + 1) -th pixel is obtained. "1" when the average value with the luminance value is higher than the threshold value
To obtain the binarized output of.

Thus, even when the luminance value is on the boundary of the threshold value and the binarized output becomes unstable, an accurate judgment output can be obtained by referring to the luminance values of adjacent pixels.

The output delay due to the binarization determination is only one pixel, and does not adversely affect the entire image processing.

FIG. 3 is a circuit diagram showing another embodiment of the present invention. 1 is different from FIG.
Instead of 3 and 14, a subtraction circuit, a coefficient circuit and an addition circuit are provided.

The subtraction circuit 19 calculates the (i + 1) th luminance value u
The luminance value u (i) of the i-th pixel is subtracted from (i + 1). The subtraction circuit 20 calculates the (i-1) -th luminance value u (i-1)
From the luminance value u (i) of the i-th pixel.

The coefficient circuit 21 obtains a luminance value obtained by multiplying the subtraction result of the subtraction circuit 19 by the detection weight coefficient a. Similarly,
The coefficient circuit 22 obtains a luminance value obtained by multiplying the subtraction result of the subtraction circuit 20 by the detection weight coefficient a.

The addition circuit 23 adds the i-th luminance value u (i) to the operation result of the coefficient circuit 21, and
To the comparison input of. Similarly, the addition circuit 24 adds the i-th luminance value u (i) to the operation result of the coefficient circuit 22 and uses the result as the comparison input of the comparator 17.

Therefore, the output of the adder circuits 23 and 24 is used for determining the binarization as the luminance value of the adjacent pixel by multiplying the difference from the luminance value of the adjacent pixel by the coefficient a.

According to this embodiment, the proximity of the threshold value of u (i) to the threshold value can be adjusted by the detection weight coefficient a.

For example, when the coefficient a = 0.5, u
When (i) is closer to the threshold value than u (i-1) or u (i + 1), the binarization determination output becomes "1". When the coefficient a = 0.33, the difference between the threshold and u (i) is 1 / compared to the difference between the threshold and u (i-1) or u (i + 1).
2 or less.

This means that if the input signal image is sharp, a = 0.5 is set, and if the image is totally blurred, a = 0.33 is set. The flexibility in the image processing for can be increased.

FIG. 4 shows the binarization determination in this embodiment in a software configuration.

The above embodiments show the case of binarizing an image signal. However, when the threshold value is set to zero, the circuit can be applied as a zero-crossing point detecting circuit of the image signal by the same operation. The zero-crossing point detection circuit is also used in image processing, such as for edge image detection by the second derivative processing of an image signal.

[0037]

As described above, according to the present invention, how large the average value or difference between the luminance value of the pixel to be determined and the luminance values of the pixels before and after it is relative to the threshold value. Since it is determined whether or not the pixel to be determined is larger than the threshold value, it is possible to prevent erroneous binarization determination and obtain a stable binarization determination.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a software configuration diagram of an embodiment.

FIG. 3 is a circuit diagram showing another embodiment of the present invention.

FIG. 4 is a software configuration diagram of another embodiment.

FIG. 5 shows an example of a conventional binarization circuit.

FIG. 6 shows an example of an error in the binarization process.

[Explanation of symbols]

 11, 12 delay circuits 13, 14, average value calculation circuits 15, 16, 17 comparators 18, logic circuits 19, 20 subtraction circuits 21, 22, coefficient circuits 23, 24 addition circuits

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 1/40-1/409 G06T 1/00

Claims (2)

(57) [Claims] A binary discriminating circuit for comparing the magnitude of an input signal, which becomes a luminance signal train of a pixel, with a set threshold value, the luminance value u (i) of a pixel before and after the luminance value u (i) of the pixel to be subjected to the binary discrimination A pair of delay means for calculating the luminance values u (i + 1) and u (i-1), and the luminance value u (i) and the luminance value u (i +
1) or a pair of average value calculating means for calculating the average value of u (i-1), respectively, and determining the magnitude of the threshold value for both the luminance value u (i) and the average value obtained by the average value calculating means. An image signal binary discriminating circuit comprising: comparing means for comparing; and logical means for judging the magnitude of a luminance value u (i) from the logical sum of the three comparison results. 2. A binary discriminating circuit for comparing the magnitude of an input signal that forms a luminance signal sequence of a pixel with a set threshold value, the luminance value of a pixel before and after the luminance value u (i) of the pixel to be subjected to the binary determination. A pair of delay means for obtaining the luminance values u (i + 1) and u (i-1), and the luminance value u (i) and the luminance value u (i +
1) or a pair of subtraction means for calculating the difference between u (i-1), a pair of coefficient means for multiplying the difference by a weighting coefficient a, and the luminance value u (i) on both outputs of the coefficient means, respectively. And a luminance value u
(I) comparing means for comparing the two addition results obtained by the adding means with a threshold value, and logic means for determining the magnitude of the luminance value u (i) from the logical sum of the three comparison results. An image signal binary discriminating circuit comprising: