JP3239889B2 - Semiconductor device having repair fuse and laser trimming method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a repair fuse and a laser trimming method thereof. The present invention can be suitably applied to, for example, a semiconductor memory device having a redundant circuit.

[0002]

2. Description of the Related Art In recent years, a large-capacity semiconductor memory device generally includes a redundant circuit having spare memory cells in order to improve the production yield. When the memory cell array has a defect, the memory cell of the redundant circuit (that is, the redundant memory cell) is used instead of the memory cell corresponding to the defect (hereinafter, referred to as a defective memory cell), so that the defect is eliminated. Will be repaired.

To use a redundant memory cell, it is necessary to electrically disconnect a defective memory cell from a memory cell array and electrically connect the redundant memory cell to the memory cell array. Such switching of the electrical connection,
This is performed by electrically and mechanically cutting a wiring portion (so-called repair fuse) for switching a redundant circuit provided in the semiconductor memory device.

In a process of repairing a defect in a memory cell array (so-called rescue process), redundancy analysis is performed based on a test result in which each of a plurality of bit lines and word lines is judged to be good or bad, and cutting is performed. Identify the fuse to be used. Then, by using a processing device called a laser repair device to irradiate the specified fuse with a laser beam, the fuse is blown (ie,
Trimming).

Hereinafter, a method of repairing a memory cell in a semiconductor memory device having a redundant circuit will be briefly described.

FIGS. 10 and 11 show a general configuration of a semiconductor memory device having a redundant circuit.

As shown in FIG. 11, the semiconductor memory device has a memory cell array 410 having a plurality of memory cells.
A redundant memory cell row 425 corresponding to one memory cell row of the memory cell array 410;
And a redundant memory cell column 426 corresponding to one memory cell column. The redundant memory cell row 425 and the redundant memory cell column 426 constitute a redundant circuit.

Note that the actual memory cell array 410 is
Although a large number of memory cells are provided, for the sake of simplicity, the description will be made assuming that the memory cell array 410 has memory cells in four rows and four columns. In the following, only the redundant memory cell row 425 will be described, and description of the memory cell column 426 will be omitted.

As shown in FIGS. 10 and 11, the first cell corresponding to “Y address = 0” in memory cell array 410
Are connected to the output terminal of the AND circuit 431. The second memory cell row 422 corresponding to “Y address = 1” in the memory cell array 410
It is connected to the output terminal of the ND circuit 432. The third memory cell row 423 corresponding to “Y address = 2” of the memory cell array 410 is connected to the output terminal of the AND circuit 433. The fourth memory cell row 424 corresponding to “Y address = 3” in the memory cell array 410
It is connected to the output terminal of D circuit 434.

The first, second, third, and fourth memory cell rows 421, 422, 423, 424 have corresponding AND gates.
The output signals B1 of the circuits 431, 432, 433, 434,
Selected when the signal value of B2, B3, B4 is "0",
Functions as a memory cell row. On the other hand, output signals B1, B
When the signal values of 2, 2, 3 and B4 are "0", the corresponding first, second, third and fourth memory cell rows 421, 4
22, 423, 424 are electrically disconnected from the memory cell array 410.

The redundant memory cell row 425 is connected to the AND circuit 4
43 output terminals. Redundant memory cell row 4
25 is selected when the signal value of the output signal B5 of the AND circuit 443 is “1”, and is electrically connected to the memory cell array 410.

The AND circuit 431 includes an inverted signal of the selection signal A0, an inverted signal of the selection signal A1, and a NOT circuit 44.
5 and an inverted signal of the output signal D1. AN
The selection signal A0, the inverted signal of the selection signal A1, and the inverted signal of the output signal D1 of the NOT circuit 445 are input to the D circuit 432. The AND circuit 433 includes an inverted signal of the selection signal A0, the selection signal A1, and the NOT circuit 445.
And an inverted signal of the output signal D1. AND
The circuit 434 includes a selection signal A0, a selection signal A1,
An inverted signal of the output signal D1 of the OT circuit 445 is input.

An EX-OR (Exclusive Or) circuit 441 has one input terminal to which a selection signal A0 is input and the other input terminal to have a repair fuse 451 and a resistor 461.
Are commonly connected. The selection signal A1 is input to one input terminal of the EX-OR circuit 442,
One terminal of the repair fuse 452 and one terminal of the resistor 462 are commonly connected to the other input terminal. NOT
One terminal of each of the repair fuse 452 and the resistor 462 is commonly connected to an input terminal of the circuit 444.

The AND circuit 443 includes an EX-OR circuit 4
41, an output signal C2 of the EX-OR circuit 442, and an output signal D2 of the NOT circuit 444. The output signal B5 of the AND circuit 443 is input to the NOT circuit 445.

The other terminals of the fuses 451, 452, 453 are connected to a power supply line (voltage value: V _CC )
The other terminals of 1, 462, 463 are grounded.

The semiconductor memory device shown in FIGS.
It works as follows.

As described above, when the value of the output signal B5 of the AND circuit 443 is "1", the redundant memory cell row 425
Is selected. In this case, the value of the output signal (that is, the redundant signal) D1 of the NOT circuit 445 becomes “0”.
The signal value “1” is input to the AND circuits 431, 432, 433, and 434. Therefore, by changing the combination of the values (“0” or “1”) of the selection signals A0 and A1, any one of the output signals B1, B2, B3, and B4 of the AND circuits 431, 432, 433, and 434 is changed. The value can be "1". This is the memory cell row 42
This means that one of 1, 422, 423, and 424 can be unselected. Thus, the selection signal A
0, A1 deselected memory cell rows 421, 4
One of 22, 423, and 424 is electrically disconnected from the memory cell array 410. At the same time, the selected redundant memory cell row is electrically connected to the memory cell array 410.

On the other hand, when the value of output signal B5 of AND circuit 443 is "0", redundant memory cell row 425 is not selected. In this case, since the value of the output signal (that is, the redundant signal) D1 of the NOT circuit 445 is “1”, the signal value “0” is input to the AND circuits 431, 432, 433, and 434. Therefore, the AND circuits 431, 432, 4
The values of the output signals B1, B2, B3, B4 of 33, 434 are all "0". Therefore, all of the memory cell rows 421, 422, 423, and 424 are selected,
Functions as a memory cell row.

Fuse 453 is cut off when redundant memory cell row 425 of the redundant circuit is selected.
Fuse 451 is blown corresponding to the case where the value of selection signal A0 is "0". The fuse 452 is connected to the selection signal A1.
Is disconnected in response to the value of “0”.

For example, as shown in FIGS. 10 and 11, the memory cell corresponding to “X address = 2, Y address = 2” in the memory cell array 410 is a defective memory cell 1
Assume 27. In this case, the defective memory cell 12
7 to select a memory cell row 423 containing
, The value of the selection signal A0 is set to “0”,
The value of the selection signal A1 is set to “1”. Further, since the value of the selection signal A0 is “0”, the fuse 451 is blown. Further, fuse 453 is blown to select redundant memory cell row 425. Fuse 451,
With the disconnection of 453, the signal value “0” is input to the EX-OR circuit 441 and the NOT circuit 444. Fuse 452
Is not disconnected, the signal value “1” is input to the EX-OR circuit 442.

As a result, the EX-OR circuits 441 and 442
Output signal C1, C2 becomes "1", and the value of output signal D2 of NOT circuit 444 also becomes "1". Furthermore, A
The value of the output signal B5 of the ND circuit 443 becomes “1”, and A
The value of the output signal B3 of the ND circuit 443 becomes “1”. Also, the output signals B of the AND circuits 441, 442, 444
The values of 1, B2, and B4 become “0”. Therefore, redundant memory cell row 425 is electrically connected to the memory cell array, and memory cell row 423 is electrically disconnected from memory cell array 410.

When the values of the selection signals A0 and A1 have another combination, the redundant memory cell row 425 is not selected, and none of the memory cell rows 421, 422, 423, and 424 is disconnected.

Circuit design that enables use of redundant memory cells instead of defective memory cells as described above is generally performed by circuit designers of semiconductor memory devices.

Next, a conventional semiconductor device having a repair fuse will be described.

FIG. 12 shows a conventional semiconductor device.

The conventional semiconductor device 500 shown in FIG. 12 includes a semiconductor substrate 501 on which a plurality of repair fuses 550 that can be blown by irradiation of a laser beam are formed. Actually, hundreds to thousands of repair fuses are formed, but in FIG.
Only the fuses 550 are shown.

On the semiconductor substrate 501, a plurality of fuses 550 made of a patterned conductor layer are formed via a first insulating layer (not shown). These fuses 550 have a striped planar shape,
They are arranged parallel to each other and at equal intervals. Both ends of the fuse 550 are electrically connected to an internal circuit (not shown) including a redundant circuit included in the semiconductor device 500.

On the first insulating layer, all the fuses 55
A second insulating layer (not shown) is formed so as to cover 0. This second insulating film functions as a protective film for the fuse 550.

A substantially rectangular opening 505 is formed on the second insulating layer.
A third insulating layer (not shown) having the following is formed. The longitudinal direction of the opening 505 (the direction parallel to the X axis) is
It is orthogonal to the longitudinal direction of 50 (direction parallel to the Y axis). This opening 505 functions as a window for laser beam irradiation.

The pitch a 'and the width b' of each fuse 550 are the same. The pitch a ′ of the fuse 550 is set to a value obtained by adding the allowable error h ′ of the alignment of the laser beam 570 to the diameter d ′ of the irradiation area 560 of the laser beam 570. Therefore, a relationship of “a ′ = d ′ + h ′” is established among the pitch a ′ and the width b ′ of the fuse 550 and the diameter d ′ of the irradiation region 560. The width g ′ of the opening 505 is equal to the width of the fuse 550.
Are set in accordance with the pitch a ′ and the width b ′ and the number of the fuses 550.

The width b ′ of the fuse 550 is, for example, 1 μm
It is. The diameter d ′ of the irradiation area 560 is, for example, 4 μm
It is. The length c ′ of the opening 505 is, for example, 6 μm.
It is.

In the semiconductor device 500 shown in FIG.
The plurality of fuses 550 are selectively cut by irradiating a laser beam 570 to the inside of the fuse 6. For example, when cutting the two fuses arranged second and fifth from the left, first, the second fuse 55
The laser beam 570 is irradiated toward the center 551 of the fuse 550, and subsequently, the center 5 of the fifth fuse 550 from the left.
The laser beam 570 is irradiated toward 51. As a result, as shown in FIG. 12, the portions of the second and fifth fuses 550 from the left irradiated with the laser beam 570 are melted and removed, and the fuses 55 are removed.
0 is disconnected.

[0033]

Generally, when a fuse is blown by irradiating a laser beam, the melted portion of the fuse tends to solidify again and a residual portion tends to be formed. In the conventional semiconductor device 500, when two adjacent fuses 550 are blown, the remaining portions of the blown fuses 550 come into contact with each other, and a short circuit may occur between the fuses 550.

Such a short circuit between the fuses 550 is prevented by widening the pitch a 'of the fuses 550. However, if the pitch a 'of the fuse 550 is increased,
The area occupied by the plurality of fuses 550 (hereinafter, the area occupied by the plurality of fuses 550)
This increases the area occupied by the fuse).

Japanese Patent Application Laid-Open No. 6-120349 discloses a technique for preventing a short circuit between fuses caused by the remaining portion of a blown fuse by alternately shifting the irradiation position of a laser beam in the longitudinal direction of the fuse. Is disclosed.

On the other hand, in recent years, reduction in chip size and higher integration of semiconductor devices have been progressing more and more, and it is required to reduce the area occupied by fuses as much as possible.
In order to meet such a demand, there is a method of miniaturizing a fuse or narrowing a pitch between adjacent fuses.

However, in the conventional semiconductor device 500, when the fuse 550 is miniaturized, the width b 'of the fuse 550 is also reduced, and the fuse 550 is
The efficiency of absorbing 70 energy is reduced. Therefore, in order to reliably blow the fuse 550, it is necessary to increase the diameter of the laser beam 570 and increase the energy of the laser beam 570. When such a laser beam 570 is used, there is a possibility that the portion other than the blown portion of the fuse 550 may be destroyed, and there is a problem that the semiconductor device 500 is damaged. Therefore, it is difficult to reduce the area occupied by the fuse by miniaturizing the fuse 550.

On the other hand, if the pitch a 'of the fuses 550 is narrowed, the adjacent fuses 550 may be erroneously cut. Therefore, various techniques for narrowing the fuse pitch while preventing erroneous cutting of the fuse have been conventionally proposed.

For example, in a "semiconductor device having a plurality of fuses" disclosed in Japanese Patent Application Laid-Open No. 7-273200, a plurality of fuses are covered with a reflector capable of reflecting a laser beam, and irradiation target positions of the respective fuses are covered. Are provided on the adjacent fuses so that the laser beam irradiation windows are staggered.

In the "redundant circuit fuse" disclosed in Japanese Patent Application Laid-Open No. 5-29467, laser beam irradiation windows formed continuously in a zigzag pattern are provided on a plurality of fuses.

According to the techniques disclosed in JP-A-7-273200 and JP-A-5-29467, the pitch of the fuse can be reduced. However, the technique disclosed in Japanese Patent Application Laid-Open No. 7-273200 requires a new manufacturing process for providing a reflection plate, and thus has a problem of increasing manufacturing costs.

In the technique disclosed in JP-A-5-29467, it is necessary to shield the periphery of the irradiation window from the laser beam. Therefore, a layer for reflecting a laser beam must be provided.
As in the technique disclosed in Japanese Patent Publication No. 200, there is a problem that the manufacturing cost increases.

The present invention has been made in view of the above-mentioned problems of the prior art. That is, an object of the present invention is to provide a semiconductor device having a repair fuse capable of reducing the pitch of fuses and reducing the area occupied by fuses while preventing short-circuit between adjacent fuses and preventing damage to the semiconductor device. An apparatus and a laser trimming method thereof are provided.

Another object of the present invention is to provide a semiconductor device having a repair fuse capable of reducing the fuse pitch without increasing the manufacturing cost, and a laser trimming method therefor.

[0045]

(1) A semiconductor device according to a first aspect of the present invention comprises a semiconductor substrate and a semiconductor substrate formed on the semiconductor substrate and arranged substantially in parallel with each other at a pitch a and having a width. b, a plurality of fuses for repair, and a plurality of the fuses formed so as to cover the plurality of fuses, the plurality of fuses can be exposed and a laser beam supplied from outside can be applied to each of the plurality of fuses. A layer having an opening to be formed, an irradiation region having the same diameter d is formed corresponding to each of the desired fuses inside the opening, and the irradiation region corresponds to the corresponding fuse. The irradiation area corresponding to each of the fuses is arranged along a virtual zigzag shape inside the opening. Between the pitch a, the width b, the diameter d, and the tolerance h.

(Equation 9) Is established.

(2) In the semiconductor device according to the first aspect of the present invention, the pitch a and the width b of each of the plurality of fuses are determined so as to satisfy the relationship of the above formula.
At the same time, inside the opening of the layer covering the plurality of fuses, so that the irradiation regions corresponding to each of the fuses are arranged along a virtual zigzag shape,
The laser beam is applied to the desired fuse.

Therefore, the pitch a of the fuse
Is set equal to or smaller than the diameter d of the irradiation area. Further, the irradiation area corresponding to the desired fuse (that is, the fuse to be blown) does not overlap with the fuse adjacent to the fuse. This means that adjacent fuses are not damaged.

Therefore, the pitch of the fuses can be reduced while preventing short-circuit between adjacent fuses and damage to the semiconductor device, and the area occupied by the fuses can be reduced. Further, since it is not necessary to provide a reflector and a reflective layer as in the technology disclosed in Japanese Patent Application Laid-Open Nos. 7-273200 and 5-29467, the fuse pitch can be reduced without increasing the manufacturing cost. it can.

(3) As described above, Japanese Patent Application Laid-Open
Japanese Patent Laid-Open No. 120349 discloses a technique in which a laser beam irradiation position is alternately shifted in the longitudinal direction of a fuse, similarly to the semiconductor device of the present invention. However, the technique disclosed in Japanese Patent Application Laid-Open No. Hei 6-120349 is intended only to prevent a short circuit between adjacent fuses. Therefore, the present invention is clearly different from the present invention in which the fuse pitch is reduced to reduce the area occupied by the fuses.

(4) In a preferred example of the semiconductor device according to the first aspect of the present invention, each of the plurality of fuses has a reference point at the center of a portion exposed from the opening, and the center of the irradiation region is Each of the illuminated areas is arranged to have an offset distance e from the reference point of the corresponding fuse, and the offset distance e
But

(Equation 10) Satisfy the relationship. In this case, since the adjacent irradiation regions do not overlap each other, there is an advantage that damage to the semiconductor device due to double irradiation of the laser beam can be prevented.

In another preferred example of the semiconductor device according to the first aspect of the present invention, the opening is substantially rectangular. In this example, the opening has a length c along the plurality of fuses and a width g in a direction orthogonal to the plurality of fuses, and the length c is substantially equal to (1.87 × d). More preferably, it is the same or less than (1.87 × d).

(5) A semiconductor device according to a second aspect of the present invention includes a semiconductor substrate and a semiconductor substrate formed on the semiconductor substrate.
A plurality of repair fuses having a width a and arranged substantially in parallel with each other at a pitch a, and a laser formed to cover the plurality of fuses and exposing the plurality of fuses and supplied from outside; A layer having an opening through which a beam can be irradiated to each of the plurality of fuses, wherein a first and a second irradiation region having the same diameter d are provided in each of the desired fuses inside the opening. And the first and second irradiation regions have an alignment tolerance h with respect to the corresponding fuse, and correspond to each of the fuses within the opening. The first irradiation area is arranged along a virtual first zigzag shape, and the second irradiation area corresponding to each of the fuses is a virtual second zigzag shape. Be arranged along the shape,
Moreover, between the pitch a, the width b, the diameter d and the tolerance h

[Equation 11] Is established.

(6) In the semiconductor device according to the second aspect of the present invention, the same effect as in the semiconductor device according to the first aspect of the present invention can be obtained for substantially the same reason as described in the above (2). Further, the desired fuse can be more reliably blown, and even when the fuse is hardly blown, the success rate of the blow can be ensured.

(7) In a preferred example of the semiconductor device according to the second aspect of the present invention, each of the plurality of fuses has a reference point at the center of a portion exposed from the opening, and Each of the first irradiation areas is arranged such that a center has a first offset distance e from the reference point of the corresponding fuse, and a center of the second irradiation area is from the reference point of the corresponding fuse. Each of the second irradiation areas is arranged to have a second offset distance f, and the first offset distance e is

(Equation 12) Is satisfied, and the second offset distance f is f
= N × e (where n is a positive constant).
Also in this case, since the adjacent irradiation regions do not overlap each other, there is an advantage that damage to the semiconductor device due to double irradiation of the laser beam can be prevented.

In another preferred example of the semiconductor device according to the second aspect of the present invention, the positive constant n is set to 3.

In still another preferred example of the semiconductor device according to the second aspect of the present invention, the opening is substantially rectangular. In this example, the opening has a length c along the plurality of fuses.
And a width g in a direction orthogonal to the plurality of fuses, and the length c is more preferably substantially the same as (3.73 × d) or less than (3.73 × d).

(8) In the laser trimming method according to the third aspect of the present invention, a semiconductor substrate and a plurality of semiconductor devices formed on the semiconductor substrate and arranged substantially in parallel with each other at a pitch a and having a width b. A laser trimming method for a semiconductor device, comprising: a repair fuse; and a layer formed over the plurality of fuses and having a plurality of openings exposing the plurality of fuses. Irradiating each of the desired fuses with an error h, thereby forming an irradiation region having the same diameter d inside the opening corresponding to each of the desired fuses. Inside, the laser beam is moved such that the irradiation area corresponding to each of the fuses is arranged along a virtual zigzag shape. Between the pitch a, the width b, the diameter d, and the tolerance h.

(Equation 13) Is established.

(9) In the laser trimming method according to the third aspect of the present invention, the same effect as the semiconductor device according to the first aspect of the present invention can be obtained for substantially the same reason as described in the above (2).

(10) In a preferred example of the laser trimming method according to the third aspect of the present invention, each of the plurality of fuses has a reference point at a center of a portion exposed from the opening, and a center of the irradiation region is provided. Are respectively arranged such that they have an offset distance e from the reference point of the corresponding fuse, and the offset distance e is

[Equation 14] Satisfy the relationship. Also in this case, since the adjacent irradiation regions do not overlap each other, there is an advantage that damage to the semiconductor device due to double irradiation of the laser beam can be prevented.

In another preferred example of the laser trimming method according to the third aspect of the present invention, the opening is substantially rectangular.
In this example, the opening has a length c along the plurality of fuses and a width g in a direction orthogonal to the plurality of fuses, and the length c is substantially equal to (1.87 × d). More preferably, it is the same or less than (1.87 × d).

In still another preferred example of the laser trimming method according to the third aspect of the present invention, the irradiation region arranged on one side with respect to a reference line connecting the respective reference points of the plurality of fuses. The laser beam is moved along one straight line so that each of the irradiation regions is formed, and further, each of the irradiation regions arranged on the other side with respect to the reference line is formed. Move the beam along the other straight line. In this case, there is an advantage that the time required for laser trimming can be reduced.

(11) In a laser trimming method according to a fourth aspect of the present invention, a semiconductor substrate and a plurality of semiconductor substrates formed on the semiconductor substrate and arranged substantially in parallel with each other at a pitch a and having a width b. A fuse for repair,
A layer having an opening exposing the plurality of fuses formed over the plurality of fuses, the laser trimming method for a semiconductor device, comprising: Irradiating each of the fuses, thereby forming first and second illuminated regions having the same diameter d inside the opening corresponding to each of the desired ones of the fuses. Inside, the first irradiation area corresponding to each of the fuses is arranged along a virtual first zigzag shape, and the second irradiation area corresponding to each of the fuses is arranged.
The laser beam is moved so that the irradiation area is arranged along the virtual second zigzag shape, and furthermore, between the pitch a, the width b, the diameter d, and the tolerance h.

(Equation 15) Is established.

(12) In the laser trimming method according to the fourth aspect of the present invention, the same effect as the semiconductor device according to the first aspect of the present invention can be obtained for substantially the same reason as described in the above (2). Further, similarly to the semiconductor device according to the second aspect of the present invention, the desired fuse can be more reliably cut, and the success rate of the blow can be ensured even when the fuse is hard to be blown.

(13) In a preferred example of the laser trimming method according to the fourth aspect of the present invention, each of the plurality of fuses has a reference point at a center of a portion exposed from the opening, and the first irradiation area is provided. Are arranged at a first offset distance e from the reference point of the corresponding fuse, and the reference point of the fuse corresponds to the center of the second irradiated area. Each of the second irradiation areas is arranged so as to have a second offset distance f from, and the first offset distance e is

(Equation 16) Is satisfied, and the second offset distance f is f
= N × e (where n is a positive constant).
Also in this case, since the adjacent irradiation regions do not overlap each other, there is an advantage that damage to the semiconductor device due to double irradiation of the laser beam can be prevented.

In another preferred example of the laser trimming method according to the fourth aspect of the present invention, the positive constant n is set to 3.

In still another preferred example of the laser trimming method according to the fourth aspect of the present invention, the opening is substantially rectangular. In this example, the opening has a length c along the plurality of fuses and a width g in a direction orthogonal to the plurality of fuses.
It is more preferable that the length c is substantially equal to (3.73 × d) or less than (3.73 × d).

In still another preferred example of the laser trimming method according to the fourth aspect of the present invention, the first fuse disposed on one side with respect to a reference line connecting the respective reference points of the plurality of fuses. Alternatively, the laser beam is moved along one straight line so that each of the second irradiation regions is formed, and the first or second irradiation device is disposed on the other side with respect to the reference line. The laser beam is moved along the other straight line so that each of the regions is formed. Also in this case, there is an advantage that the time required for laser trimming can be reduced.

[0068]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[First Embodiment] (Structure of Semiconductor Device) FIGS. 1 and 2 show a first embodiment of the present invention.
1 shows a semiconductor device according to an embodiment. This semiconductor device
This is a semiconductor memory device including a redundant circuit.

The semiconductor device 10 shown in FIGS. 1 and 2 includes the semiconductor substrate 1 on which a plurality of repair fuses 50 that can be blown by irradiation with a laser beam are formed. Each of these fuses 50 functions as a repair fuse for electrically connecting a redundant circuit (both not shown) to the memory cell array. In practice,
Although hundreds to thousands of fuses are formed in the semiconductor device 10, only six fuses 50 are shown in FIGS. 1 and 2 to simplify the description.

A plurality of fuses 50 made of a patterned conductor layer are formed on the semiconductor substrate 1 with the first insulating layer 2 interposed therebetween. These fuses 50 have a stripe-shaped planar shape and are arranged in parallel with each other at equal intervals. Both ends of the fuse 50 are connected to an internal circuit (not shown) including a redundant circuit.
Is electrically connected to

On the first insulating layer 2, all the fuses 5
The second insulating layer 3 is formed so as to cover 0. The second insulating layer 3 functions as a protective film for the fuse 50.

A third insulating layer 4 having a substantially rectangular opening 5 is formed on the second insulating layer 3. The longitudinal direction of the opening 5 (the direction parallel to the X axis) is the longitudinal direction of the fuse 50 (Y
(Direction parallel to the axis). This opening 5
Functions as a window for laser beam irradiation.

In the semiconductor device 10, the adjacent fuse 5
0, a laser beam (not shown) is applied to the fuse 50.
By irradiating each of the desired fuses 50 with a laser beam while being shifted in the longitudinal direction (that is, while being shifted along the Y axis), each of the desired fuses 50 is blown. That is, as shown in FIG. 1, the laser beam irradiation area 60 corresponding to each of the fuses 50 is offset along the Y axis with respect to each of the centers 51 of the fuses 50, and the adjacent laser beam irradiation area The 60 offset directions are opposite to each other. In other words, the irradiation area 60 is arranged zigzag along the X axis.

In the semiconductor device 10, on the premise of such laser beam irradiation, the respective pitches (ie, fuse pitches) a of the fuses 50 and the respective widths (ie, fuse widths) b of the fuses 50 are set. I have.

Here, assuming that the diameter of the irradiation area 60 is d and the allowable error of the laser beam alignment is h, the fuse pitch a is set so that the following equation (1) is established. Is set.

[0077]

[Equation 17]

The above equation (1) indicates that the fuse pitch a is smaller than the diameter d of the irradiation area 60. Further, it indicates that the irradiation area 60 corresponding to the desired fuse 50 (that is, the fuse 50 to be blown) does not overlap with the fuse 50 adjacent to the fuse 50. This means that adjacent fuses 50 are not damaged. Therefore, by setting the fuse pitch a so that the above equation (1) is satisfied, short circuit between the adjacent fuses 50 is prevented and the semiconductor device 1
The fuse pitch a can be reduced while preventing damage to zero, and the area occupied by the fuse 50 can be reduced.

The fuse width b and the length c of the opening 5 are:
It is determined in consideration of a design standard required for the semiconductor device 10.

The diameter d of the irradiation area 60 is set to a value at which the plurality of fuses 50 having the fuse width b can be reliably blown.

Here, as shown in FIG.
Has a reference point 51 at the center of the portion exposed from the opening 5. Further, the center 61 of the irradiation area 60 and the reference point of the corresponding fuse 50 (that is, the corresponding fuse 5
The distance from the center of 0 (zero) 51 is defined as an offset distance e. In the semiconductor device 10, it is preferable that the laser beam is irradiated so as to satisfy the following expression (2).

[0082]

(Equation 18)

This is because, by setting the offset distance e so that the formula (2) is satisfied, the adjacent irradiation areas 60 do not overlap, and damage due to double irradiation of the laser beam can be prevented.

The diameter d and the offset distance e of the irradiation area 60 are set by a method described later.

An example of each parameter is shown below.

Fuse pitch a: 2.5 μm Fuse width b: 1.0 μm Laser beam irradiation area diameter d: 4.0 μm Laser beam alignment tolerance h: 3.1 μm

The length c of the opening 5 is, for example, 6 μm. The width g of the opening 5 is set to a size corresponding to the fuse pitch a and the fuse width b and the number of fuses 50 to be formed.

(Laser Trimming Method and Laser Repair Apparatus) Next, a laser trimming method for the semiconductor device 10 will be described. First, the laser repair device of FIG. 3 used for the laser trimming method will be described.

The laser repair device 100 shown in FIG. 3 includes a laser beam generating device 110, a positioning device 120, and a laser control mechanism 130. A tester 200 is installed outside the laser repair device 100.

The laser control mechanism 130 includes an input unit 131
And the fusing condition control unit 132 and the offset control unit 133
, A fuse data analysis unit 134, a positioning device control unit 135, a laser beam generation device control unit 136, an output unit 137, and a system control unit 139.

The input unit 131 receives the fuse data FD supplied from the fuse data file 210 in the tester 200 and sends the fuse data FD to the blow condition control unit 132 and the offset control unit 13
3 and the fuse data analyzer 134.

The fusing condition controller 132 sets the size and energy of the laser beam based on the input fuse data FD. Then, the set laser beam size and energy are output to the laser beam generator controller 136 as fusing condition data CCD.

The offset control unit 133 determines the offset distance e based on the input fuse data FD, and outputs it to the positioning device control unit 135 as offset distance data OSD.

The fuse data analysis unit 134 analyzes the input fuse data FD and calculates a laser beam irradiation position. Then, the calculated laser beam irradiation position is output to the positioning device control unit 135 as laser beam irradiation position data LPD.

The positioning device control section 135 controls a positioning device control signal PC for controlling the positioning device 120 based on the input laser beam irradiation position data LPD.
S is generated and output to the output unit 137.

The laser beam generator control section 136 generates a laser beam generator control signal LCS for controlling the laser beam generator 110 based on the input laser beam irradiation position data LPD, and outputs it to the output section 137. I do.

The output unit 137 outputs the input positioning device control signal PCS to the positioning device 120 and outputs the input laser beam generation device control signal LCS to the laser beam generation device 110.

The system control unit 139 includes an input unit 131,
Fusing condition control section 132, offset control section 133, fuse data analysis section 134, positioning device control section 135,
Laser beam generator control section 136 and output section 137
Control signals CS1, CS2, CS
3, CS4, CS5, CS6 and CS7 are output.

The laser beam generator 110 irradiates a laser beam having the beam size and energy set by the fusing condition controller 132 based on the input laser beam generator control signal LCS.

The positioning device 120 includes the semiconductor device 10
Is placed. Positioning device 120 moves semiconductor device 10 based on positioning device control signal PCS.
Thereby, the relative position of the semiconductor device 10 with respect to the laser beam 70 is adjusted so that the desired fuse 50 is irradiated with the laser beam 70.

Next, a laser trimming method for repairing the memory cell array of the semiconductor device 10 will be described.

First, the semiconductor device 10 to be measured is
The performance of the wafer on which is formed is measured. This performance measurement is performed by a tester 200 which is an apparatus for measuring electrical characteristics.
And a probe card (not shown) for making an electrical connection necessary for making the electrical measurement, and a prober (not shown) for sequentially index-moving a chip for measuring an electrical characteristic. Will be

Particularly, a DRAM (Dynamic Random-Access Me
In a large-capacity memory such as mory), all the memory cells rarely become non-defective, and an analysis (that is, a redundancy analysis) in which a defective cell determined in preliminary measurement is replaced with a redundant circuit is usually performed. Then, whether or not the memory can be repaired is determined from the result of the redundancy analysis, and the result information as to whether or not the memory can be rescued is generated.

The tester 200 uses the obtained electrical measurement results to determine which fuse of which chip should be blown (that is, memory rescue information including information on whether or not the memory can be rescued and information on the location of a defective cell). Is generated in which the fuse data file 210 is described.

FIGS. 4 and 5 show an example of the fuse data file 210. FIG. In FIG. 4, "W **" is a wafer number, "C **" is a chip address, and "F ***".
"*" Indicates a fuse number, "/ E" indicates the end of data, and Fig. 5 shows a file describing a x-coordinate and a y-coordinate of each fuse in a chip (a so-called fuse table file). ).

The fuse data file 210 thus generated is supplied from the tester 200 to the laser repair device 100 by file transfer. Then, laser trimming of the semiconductor device 10 is performed using the laser repair device 100, and a desired fuse 50 is blown.

Conditions for reliably cutting the fuse 50 (hereinafter referred to as laser beam irradiation conditions) include the beam size and energy of the laser beam 70 and the depth of focus. These three parameters are determined by performing tests at a plurality of levels using a test wafer, and the fusing condition data CCD by the fusing condition control unit 132 is used.
Used to generate

When the offset distance e is set by the offset control unit 133, the adjacent laser beam irradiation regions 60 do not overlap each other. Two conditions must be satisfied: no contact with fuses and circuit wiring. Further, the offset distance e is limited by the length c of the opening 5 formed in the semiconductor device 10.

As can be understood from FIG. 4, in order to satisfy the above conditions, if the offset distance e is reduced, the fuse pitch a increases, and if the offset distance e is increased, the fuse pitch a decreases. Become. However, the theoretical minimum limit of the fuse pitch a is
It is given by the following formula.

[0110]

[Equation 19]

In this manner, based on the set laser beam irradiation conditions and the offset distance e, for example, as shown in FIG. 6, the laser beam 70 is irradiated to the two fuses 50, and the fuses 50 are blown.

As shown in FIG. 1, in the semiconductor device 10 according to the first embodiment of the present invention, the center 61 of the irradiation region 60 is based on a straight line connecting the reference point 51 of the fuse 50 (ie, the center of the fuse 50). The laser beam 70 is emitted so as to be alternately shifted along the Y axis while maintaining the offset distance e. Therefore, the center 6 of the irradiation area 60
Numerals 1 are arranged in a zigzag manner based on a straight line connecting the centers 51 of the fuses 50.

The semiconductor device 1 according to the first embodiment of the present invention
When the design criterion at 0 is expressed by an equation, the following equation (3) holds.

[0114]

(Equation 20)

Here, d = 4.0 μm, h = 0 μm, b
= 1.0 μm is substituted into the above equation (3) to obtain the equation (4).

[0116]

(Equation 21)

From the above equation (4), it can be seen that the minimum limit value of the fuse pitch a is 2.5 μm.

On the other hand, in the conventional semiconductor device 500 of FIG. 12, the laser beam 570 is irradiated so that the center 561 of the irradiation area 560 coincides with the center 551 of the fuse 550. Therefore, the center 561 of all the irradiation areas 560
Are arranged on a straight line connecting the center 551 of the fuse 550 and are not arranged in a zigzag manner.

When the design criterion in the conventional semiconductor device 500 is expressed by an equation, the following equation (5) holds.

[0120]

(Equation 22)

Here, d ′ = 4.0 μm, h ′ = 0 μm
Is substituted into the above equation (5), the equation (6) is obtained.

[0122]

(Equation 23)

From the above equation (6), the fuse pitch a ′
Is found to be 4 μm. That is,
In the semiconductor device 10 according to the first embodiment of the present invention, the minimum limit value of the fuse pitch a is
This is ５ of the minimum limit value of the fuse pitch a ′ at 0.

In the semiconductor device 10 according to the first embodiment of the present invention, since the irradiation regions 60 are arranged in a zigzag, there is a concern that the throughput may be deteriorated as compared with the conventional semiconductor device 500. However, fuse 5
After scanning the laser beam 70 on one straight line along the X-axis on one side with respect to a straight line connecting the center 51 of 0, scan the laser beam 70 on another straight line along the X-axis on the other side. Thereby, the deterioration of the throughput is easily suppressed. Furthermore, since the movement speed of the positioning device 120 of the laser repair device 100 usually has a sufficient margin,
Throughput degradation can be minimized.

Further, as the irradiation regions 60 are arranged in a zigzag manner, the longitudinal dimension (ie, length) of the fuse 50 becomes larger than that of the conventional semiconductor device 500. As a result, even if the fuse pitch a is reduced, there is a concern that the area occupied by the fuse 50 will increase as compared with the conventional semiconductor device 500. However, fuse 5
If 0 is equal to or greater than the predetermined number, the area occupied by the fuses 50 becomes smaller than the area occupied by the fuses 550 in the conventional semiconductor device 500.

FIG. 7 shows an occupied area S of the fuse 50 when 14 fuses 50 are formed in the semiconductor device 10 according to the first embodiment of the present invention.

In FIG. 7, since the effective length C of the fuse 50 corresponds to the length c of the opening 5, the following equation (7) is used.
Is established.

C = A (1 + sin 60 °) (7)

Here, since B = 7.5 A, the occupied area S of the fuse 50 is given by the following equation (8).

S = 7.5 A ² × (1 + 0.867) = 13.995 A ² (8)

In this case, the effective length C of the fuse 50
(That is, the length c of the opening 5) is 1.87 times the diameter d (= A) of the irradiation area 60. If the fuse pitch a is increased, the offset distance e can be reduced, so that the length c of the opening 5 can also be reduced. That is, the length c of the opening 5 is approximately 1.87 times or less the diameter d of the irradiation area 60.

FIG. 8 shows an occupied area S ′ of the fuse 550 when 14 fuses 550 are formed in the conventional semiconductor device 500.

In FIG. 8, C ′ = A ′, B ′ = 14
Since it is A ', the occupied area S' of the fuse 550 is given by the following equation (9).

S ′ = 14A ′ ² (9)

Note that FIGS. 7 and 8 assume that the widths b and b 'of the fuses 50 and 550 are zero for ease of understanding.

(Estimated Results of Occupied Area) Calculations were performed with the diameters d and d 'of the laser beam irradiation area being 5.0 μm and the fuse widths b and b ′ being 0.3 μm. When 550 is formed, the occupation area S of the fuse 50 of the semiconductor device 10 according to the first embodiment of the present invention is smaller than the occupation area S ′ of the fuse 550 of the conventional semiconductor device 500. Actually, since the fuses 50 and 550 are formed in units of several hundreds to several thousands, the effect of reducing the area S occupied by the fuses 50 by the semiconductor device 10 according to the first embodiment of the present invention is further increased. .

As described above, in the semiconductor device 10 and the laser trimming method thereof according to the first embodiment of the present invention, the fuse pitch a, the fuse width b, and the irradiation area 60
The fuse pitch a is set such that the relationship of the above equation (1) is established between the diameter d of the above and the tolerance h of the alignment. Further, between the fuse pitch a, the diameter d of the irradiation area 60 and the offset distance e, the above equation (2)
The laser beam is applied to the zigzag so that the relationship of

Therefore, the laser beam 70 is irradiated such that the fuse pitch a becomes smaller than the laser beam irradiation diameter d and the laser beam irradiation area 60 does not overlap the fuse 50. Therefore, the adjacent fuse 5
The fuse pitch a can be reduced while preventing short circuit between zeros and damage to the semiconductor device 10, and the area S occupied by the fuse 50 can be reduced. In addition, Japanese Patent Application Laid-Open
Since there is no need to provide a reflector and a reflector layer as in the prior art disclosed in Japanese Unexamined Patent Publication No. 273200 and Japanese Patent Laid-Open No. 5-29467, the fuse pitch a can be reduced without increasing the manufacturing cost. Further, since the adjacent irradiation areas 60 do not overlap, damage due to double irradiation of the laser beam 70 can be prevented.

(Second Embodiment) FIG. 9 shows a semiconductor device according to a second embodiment of the present invention.

The semiconductor device 10A of FIG. 9 is the same as the semiconductor device according to the first embodiment of the present invention except that two laser beam irradiation regions are formed for one fuse. Therefore, in FIG. 9, the same components as those of the semiconductor device of the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

In the semiconductor device 10A, the offset distance e
Are arranged along the X-axis, and a laser beam irradiation region 90b having an offset dimension f (= 3e) is arranged along the X-axis.

The effective length of the fuse 50 (that is,
The width c of the opening 50 is about twice that of the semiconductor device 10 according to the first embodiment of the present invention, and the irradiation regions 90a and 90
It is set to be approximately 3.73 times or less of the diameter d of Ob.

When laser trimming the fuse 50 in the semiconductor device 10A, a predetermined fuse 50 is irradiated with a laser beam 70 forming an irradiation area 90a, and further, a laser beam 7 forming an irradiation area 90b.
0 is illuminated. As a result, as shown in FIG. 9, the predetermined fuse 50 is blown at the two irradiation regions 90a and 90b.

Semiconductor device 1 according to the second embodiment of the present invention
The same effects as those of the semiconductor device 10 and the laser trimming method according to the first embodiment of the present invention can be obtained in the laser trimming method OA and its laser trimming method. Furthermore, the fuse 50 can be more reliably blown, and even when the fuse 50 is difficult to blow, the success rate of fusing can be ensured.

Note that the present invention is not limited to the first and second embodiments, but may be applied to, for example, a device other than a semiconductor memory device.

[0146]

As described above, according to the present invention,
The pitch of the fuses can be reduced and the area occupied by the fuses can be reduced while preventing a short circuit between adjacent fuses and preventing damage to the semiconductor device. Further, the pitch of the fuse can be reduced without increasing the manufacturing cost.

[Brief description of the drawings]

FIG. 1 is a schematic plan view of a principal part showing a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a schematic cross-sectional view of a main part taken along line X1-X1 in FIG.

FIG. 3 is a block diagram illustrating a configuration of a laser repair device used in the laser trimming method according to the first embodiment of the present invention.

FIG. 4 is a diagram illustrating an example of a fuse data file used in the laser trimming method according to the first embodiment of the present invention.

FIG. 5 is a view showing an example of a fuse table file used in the laser trimming method according to the first embodiment of the present invention.

FIG. 6 is a schematic plan view of a main part showing a laser trimming method according to the first embodiment of the present invention.

FIG. 7 is a schematic plan view illustrating an area occupied by fuses of the semiconductor device according to the first embodiment of the present invention.

8 is a diagram for comparison with FIG. 7, and is a schematic plan view showing the area occupied by fuses in a conventional semiconductor device.

FIG. 9 is a schematic plan view of a main part showing a semiconductor device according to a second embodiment of the present invention;

FIG. 10 is a schematic diagram showing a general configuration of a semiconductor memory device having a redundant circuit.

11 is a diagram showing a configuration of a memory cell array and a redundant circuit of the semiconductor memory device of FIG. 10;

FIG. 12 is a schematic plan view of a main part showing a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 first insulating layer 3 second insulating layer 4 third insulating layer 5 opening of third insulating layer 5A opening of third insulating layer 10 semiconductor device 10A semiconductor device 50 fuse 51 fuse 51 center of fuse (reference point) 60 laser Beam irradiation area 61 Center of irradiation area 70 Laser beam 90a, 90b Laser irradiation area 91 Center of irradiation area 100 Laser repair device 110 Laser beam generation device 120 Positioning device 130 Laser control device 131 Input unit 132 Fusing condition control unit 133 Offset control unit 134 Fuse data analysis unit 135 Positioning unit control unit 136 Laser beam generator control unit 137 Output unit 139 System control unit 200 Tester 210 Fuse data file a Fuse pitch b Fuse width c Length of opening in third insulating layer d Irradiation Range of diameter e offset distance f offset distance g third tolerance alignment of width h laser beam opening of the insulating layer

Claims (20)

(57) [Claims] A semiconductor substrate, a plurality of repair fuses formed on the semiconductor substrate and arranged substantially in parallel with each other at a pitch a and having a width b, and covering the plurality of fuses. And a layer having an opening formed so as to expose the plurality of fuses and allow a laser beam supplied from the outside to be applied to each of the plurality of fuses. The inside of the openings has the same diameter d. Are formed corresponding to each of the desired fuses, and the irradiation region has an alignment tolerance h with respect to the corresponding fuse, and inside the opening, The irradiation area corresponding to each of the fuses is arranged along a virtual zigzag shape, and the pitch a, the width b, the diameter d, and [Number 1] between the serial tolerance h A semiconductor device characterized by the following relationship: 2. A method according to claim 1, wherein each of the plurality of fuses has a reference point at a center of a portion exposed from the opening, and a center of the irradiation area has an offset distance e from the reference point of the corresponding fuse. Each of the irradiation areas is arranged at a distance, and the offset distance e is given by 2. The semiconductor device according to claim 1, wherein the following relationship is satisfied. 3. The semiconductor device according to claim 1, wherein said opening is substantially rectangular. 4. The opening has a length c along the plurality of fuses and a width g in a direction perpendicular to the plurality of fuses, and the length c is (1.87 × d). 4. The semiconductor device according to claim 3, wherein the values are substantially the same or less than (1.87 × d). 5. A semiconductor substrate, a plurality of repair fuses formed on the semiconductor substrate and arranged substantially in parallel with each other at a pitch a and having a width b, and covering the plurality of fuses. And a layer having an opening formed so as to expose the plurality of fuses and allow a laser beam supplied from the outside to be applied to each of the plurality of fuses. The inside of the openings has the same diameter d. Are formed corresponding to each of the desired fuses, and the first and second irradiation regions have an alignment tolerance h with respect to the corresponding fuse. Inside the opening, the first irradiation area corresponding to each of the fuses is arranged along a virtual first zigzag shape, and The second irradiation area corresponding to each of the doses is arranged along a virtual second zigzag shape, and the distance between the pitch a, the width b, the diameter d, and the tolerance h is as follows: Equation 3] A semiconductor device characterized by the following relationship: 6. A fuse according to claim 6, wherein each of the plurality of fuses has a reference point at a center of a portion exposed from the opening, and a center of the first irradiation area is a first offset distance from the corresponding reference point of the fuse. e, each of the first irradiation regions is arranged so as to have an e, and the center of the second irradiation region is located at a second position from the reference point of the corresponding fuse.
Each of the second irradiation areas is arranged to have an offset distance f, and the first offset distance e is given by Is satisfied, and the second offset distance f is f
6. The semiconductor device according to claim 5, wherein a relationship of: n × e (where n is a positive constant) is satisfied. 7. The semiconductor device according to claim 6, wherein said positive constant n is set to 3. 8. The semiconductor device according to claim 5, wherein said opening is substantially rectangular. 9. The opening has a length c along the plurality of fuses and a width g in a direction orthogonal to the plurality of fuses, and the length c is (3.73 × d). 9. The semiconductor device according to claim 8, wherein the values are substantially the same or less than (3.73 × d). 10. A semiconductor substrate, a plurality of repair fuses formed on the semiconductor substrate, arranged substantially in parallel with each other at a pitch a and having a width b, and covering the plurality of fuses. A laser trimming method for a semiconductor device, comprising: a formed layer having openings for exposing a plurality of the fuses, wherein a laser beam is irradiated to each of the desired fuses with an alignment tolerance h. And forming an irradiation area having the same diameter d inside the opening corresponding to each of the desired ones of the fuses. Inside the opening, the irradiation area corresponding to each of the fuses The laser beam is moved so that is arranged along a virtual zigzag shape, and the pitch a, the width b, and the diameter And Equation 5] between the tolerance h A laser trimming method characterized by the following relationship: 11. Each of the plurality of fuses has a reference point at a center of a portion exposed from the opening, and a center of the irradiation region has an offset distance e from the reference point of the corresponding fuse. Each of the irradiation areas is arranged at a distance, and the offset distance e is given by The laser trimming method according to claim 10, wherein the following relationship is satisfied. 12. The laser trimming method according to claim 10, wherein the opening is substantially rectangular. 13. The opening has a length c along the plurality of fuses and a width g in a direction orthogonal to the plurality of fuses, wherein the length c is (1.87 × d). 13. The laser trimming method according to claim 12, wherein the laser trimming is approximately the same or less than (1.87 x d). 14. The laser beam is directed to one straight line so that each of the irradiation regions arranged on one side with respect to a reference line connecting the respective reference points of the plurality of fuses is formed. And moving the laser beam along the other straight line so that each of the irradiation areas arranged on the other side with respect to the reference line is formed. The laser trimming method according to any one of the above. 15. A semiconductor substrate, a plurality of repair fuses formed on the semiconductor substrate and arranged substantially in parallel with each other at a pitch a and having a width b, and covering the plurality of fuses. A laser trimming method for a semiconductor device, comprising: a formed layer having openings for exposing a plurality of the fuses, wherein a laser beam is irradiated to each of the desired fuses with an alignment tolerance h. And forming a first and a second irradiation region having the same diameter d inside the opening corresponding to each of the desired ones of the fuses. Are arranged along a virtual first zigzag shape, and the second irradiation regions corresponding to each of the fuses are virtual. So as to be arranged along two zigzag, the laser beam is moved, moreover, Equation 7] between the pitch a, the width b, the diameter d and the tolerances h A laser trimming method characterized by the following relationship: 16. A fuse according to claim 16, wherein each of the plurality of fuses has a reference point at a center of a portion exposed from the opening, and a center of the first irradiation region is a first offset distance from the corresponding reference point of the fuse. e to have the first
Each of the irradiation areas is arranged, and each of the second irradiation areas is arranged such that the center of the second irradiation area has a second offset distance f from the reference point of the corresponding fuse, and The offset distance e is Is satisfied, and the second offset distance f is f
The laser trimming method according to claim 15, wherein a relationship of = n * e (where n is a positive constant) is satisfied. 17. The laser trimming method according to claim 16, wherein the positive constant n is set to 3. 18. The opening according to claim 15, wherein the opening is substantially rectangular.
18. The laser trimming method according to any one of 17. 19. The opening has a length c along the plurality of fuses and a width g in a direction orthogonal to the plurality of fuses, and the length c is (3.73 × d). 19. The laser trimming method according to claim 18, wherein the laser trimming is approximately the same or less than (3.73 x d). 20. The method according to claim 20, wherein each of the first and second irradiation regions arranged on one side with respect to a reference line connecting the respective reference points of the plurality of fuses is formed. The laser beam is moved along one straight line, and the laser beam is moved to the other side so that each of the first or second irradiation regions arranged on the other side with respect to the reference line is formed. The laser trimming method according to claim 16, wherein the laser trimming method moves along a straight line.