JP3235568B2 - Image rejection mixer circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image rejection mixer circuit and a method for removing an image component generated when a high frequency signal and a local signal are mixed and converted into an intermediate frequency signal (IF signal).

[0002]

2. Description of the Related Art A high frequency signal and a local signal are mixed,
As an image rejection mixer circuit for removing an image component generated at the time of detection, see, for example,
Various image rejection mixer circuits have been proposed in JP-A-90015, JP-A-2-58033, JP-A-5-191153 and JP-A-9-64648.

FIG. 4 shows an example of a conventional image rejection mixer circuit.

The conventional image rejection mixer circuit includes a first phase shifter 51 and a second phase shifter 52 for giving a 90-degree phase difference to a local signal transmitted from a local signal transmitter 50, and a first phase shifter 52. A first mixer circuit 53 and a second mixer circuit 54 for mixing the output signal from the phase shifter 51 and the second phase shifter 52 with a radio frequency (RF) signal, respectively.
And a third phase shifter 55 and a fourth phase shifter 56 for providing a phase difference of 90 degrees to the output signal IF1 from the first mixer circuit 53.
And a fifth phase shifter 57 and a sixth phase shifter 58 for providing a phase difference of 90 degrees to the output signal from the second mixer circuit 54, and an intermediate signal from the third phase shifter 55 and the fourth phase shifter 56. Frequency signal I
F11 and IF12, a first adder 59, and an intermediate frequency signal I from a fifth phase shifter 57 and a sixth phase shifter 58.
A second adder 60 for adding F22 and IF21; output signals IF3 and IF3 from the first adder 59 and the second adder 60 ;
And a third adder 61 for adding the IF and IF4 .

[0005] The image rejection mixer circuit operates as follows.

The local signal transmitted from the local signal transmitter 50 passes through a first phase shifter 51 and a second phase shifter 52, and is given a phase difference of 90 degrees. The local signal provided with the phase difference of 90 degrees is mixed with the RF signal in the first mixer circuit 53 and the second mixer circuit 54, and is converted into intermediate frequency (IF) signals IF1 and IF2, respectively.

The intermediate frequency signal IF1 is supplied to a third phase shifter 55
And the fourth intermediate frequency signal IF11
And IF12. The phase difference between the intermediate frequency signals IF11 and IF12 is 90 degrees.

Similarly, the intermediate frequency signal IF2 passes through a fifth phase shifter 57 and a sixth phase shifter 58, and is converted into intermediate frequency signals IF22 and IF21. Intermediate frequency signal I
The phase difference between F22 and IF21 is 90 degrees.

The intermediate frequency signals IF11 and IF12 are added in a first adder 59, and an intermediate frequency signal IF3
Generate Similarly, the intermediate frequency signals IF22 and IF22
21 are added in the second adder 60 to generate an intermediate frequency signal IF4.

Further, these intermediate frequency signals IF3 and IF3
And IF4 are finally added in a third adder 61 to generate a desired intermediate frequency signal IF.

The intermediate frequency signals IF3 and IF4 are equivalent in amplitude, and have the same phase in the desired signal and the opposite phase in the image signal. For this reason, the image signal can be removed by adding the intermediate frequency signals IF3 and IF4.

[0012]

In practice, however, there is a phase error in the third to sixth phase shifters 55 to 58 due to variations in the manufacturing process. Since the phase error and the amplitude error are proportional, the intermediate frequency signals IF3 and IF4 are not equivalent in amplitude, and both amplitudes are in an unbalanced state.

For this reason, even if the intermediate frequency signals IF3 and IF4 are added in the third adder 61, it is impossible to completely remove the image signal.

The present invention has been made in view of the above-mentioned problems in the conventional image rejection mixer circuit, and eliminates the deviation of the amplitude of the intermediate frequency signal caused by the phase error in the phase shifter. It is an object of the present invention to provide an image rejection mixer circuit capable of effectively suppressing an image signal, and a method of removing an image signal capable of achieving the same object. Aim.

[0015]

In order to achieve the above object, according to the present invention, a first phase shifter and a second phase shifter for providing a local signal with a phase difference of 90 degrees are provided. Transition
The output signal from the phase shifter and the second phase shifter is mixed with the high-frequency signal.
A first mixer circuit and a second mixer circuit for mixing;
Give a 90 degree phase difference to the output signal from one mixer circuit
The third and fourth phase shifters and the output from the second mixer circuit
Fifth phase shifter and sixth phase shifter for providing 90 degree phase difference to force signal
Adds the output signals of the phase shifter and the third and fourth phase shifters
And the outputs of the fifth and sixth phase shifters
A second adder for adding signals, a third phase shifter and a fourth phase shifter
Compare the phase of each output signal of the
A first phase detector for extracting the phase error component, a fifth phase shifter and
And the phase of each output signal of the sixth phase shifter.
A second phase detector for extracting a phase error component of the force signal;
The phase error component extracted by one phase detector and the second
Add the phase error component extracted by the phase detector
Based on the output signal from the third adder
The amplitude of the output signal from the first adder and the second adder.
A first gain controller and a second gain controller to be controlled;
Adding the output signals from the gain controller and the second gain controller
And a fourth adder .

The image rejection mixer circuit may be configured as a third phase shifter or a third phase shifter.
The output signal from the sixth phase shifter is the first phase detector and the second
Align the amplitude of the output signal before it is input to the phase detector
It is preferable to further include a limiter amplifier.

According to a third aspect of the present invention, the third module
The arithmetic unit can be composed of two adders.

The image rejection mixer circuit is
As described in claim 4, the output from the third adder
It is preferable to further include an amplifier for amplifying the signal .

Further , as described in claim 5,
Of each output signal from the first and second gain controllers.
A full-wave detection circuit that detects the amplitude difference, and adds the amplitude difference
Sum and feed back the value to the third adder or amplifier
And a container.

According to a sixth aspect, the local signal has a phase of 90 degrees.
The first process to give a difference and given a 90 degree phase difference
A second filter that mixes the local signal and the high-frequency signal
Gives a 90 degree phase difference to the mixed signal
The third step and the third of the output signals in the third step
Fourth process of extracting phase error components from a group of output signals
A fifth step of adding the phase error component, and a fifth step.
In the third step, based on the addition result
Control the amplitude of the second group of output signals
In a sixth step, the amplitude is controlled in the sixth step.
And a seventh step of adding the output signals
A method for removing a signal is provided.

This image signal removing method is described in claim 7.
As noted, between the third and fourth steps
In step 3, the amplitude of the output signal in the third step is made uniform.
Preferably, the method further includes an eighth step.

Further , the present method is described in claim 8.
As described above, between the fifth process and the sixth process,
The ninth step of amplifying the output signal in the fifth step
Can be prepared. Further, the method comprises:
As described, the output signal in the sixth step
Detect the amplitude difference, add those differences, and change the value to the fifth
It is preferable to further include a tenth step of returning to the step or the ninth step .

Further, as described in claim 9,
A full-wave detection circuit for detecting an amplitude difference between the output signals from the first gain controller and the second gain controller, and an adder for adding the amplitude differences and feeding back the value to a third adder or an amplifier It is preferable to further include:

According to a tenth aspect of the present invention, the first step of providing the local signal with a phase difference of 90 degrees, the second step of mixing the local signal provided with the phase difference of 90 degrees with the high frequency signal, and mixing are performed. The third step of providing a 90-degree phase difference to the output signal , and the output signal of the third step
A fourth step of taking out a phase error component from the output signal of the first group, and a fifth step of adding the phase error component based on the addition result of the fifth step, the output signal at the third step a sixth step of controlling the amplitude of the second group of output signals of the out, the output amplitude at the sixth step is controlled
And a seventh step of adding the signals.

This image signal removing method is described in claim 11.
As described in above, it is preferable that the method further includes, between the third step and the fourth step, an eighth step of adjusting the amplitude of the output signal in the third step.

[0026] The method according to claim 12, wherein the fifth step and the sixth step include:
The method may further include a ninth step of amplifying the output signal in the fifth step. Further, the method comprises:
As described in 3, the tenth process of detecting the amplitude difference of the output signal in the sixth process, adding those differences, and returning the value to the fifth process or the ninth process is described. It is preferable to further provide.

The intermediate frequency signals IF3 and IF4 in the conventional image rejection mixer circuit shown in FIG.
_AIF3 and _AIF4 are represented by the following equations.

[0028] In _{A IF3 = A D sinω D t} -A I cosω I t (1) A IF4 = A D sinω D t + A I cosω I t (2) the above equation, A _D: the desired (desire) signal amplitude ω _D : angular frequency of desired (desire) signal A _I : amplitude of image signal ω _I : angular frequency of image signal By adding both sides of the above equations (1) and (2), A _IF = A _IF3 + A _IF4 = 2A _D sin .omega _D t becomes, it is understood that the image signal can be removed.

However, actually, as described above,
Due to various factors such as a process variation of the mixer and the phase shifter and a gain error, the intermediate frequency signals IF3 and IF3
The amplitudes A _IF3 and A _{IF4 of 4} are as follows.

[0030] In _{A IF3 = sinω D t-cosω} I t (3) A IF4 = A Dx sin (ω D t + Δφ) + A Ix cos (ω I t + Δφ) (4) the above equation, [Delta] [phi: phase error A _Dx, A _Ix : Amplitude error These phase error and amplitude error are represented by the intermediate frequency signal IF3.
Represents the amplitude and phase errors of the intermediate frequency signal IF4 with reference to

[0031] When the above equation (3) and both sides of (4) adding _{respectively, A IF = A IF3 + A} IF4 = 2sinω D t + A Dx sin (ω D t + Δφ) + A Ix cos (ω I t + Δφ) -cosω I t ( 5) _{([a Ix cos (ω I} t + Δφ on the right side of the 5)) -
term of cos .omega _I t] indicates that the image component is generated, term representing the image component can be expressed as follows.

[0032] _{A Ix cos (ω I t +} Δφ) -cosω I t
= (A _Ix ² + 1-2A _I cos Δφ) ^1/2 · cos (ω _I t
+ Δφ) Therefore, to remove this image component, A _Ix ² + 1-2A _I cos Δφ = 0 (6) That is, the following equation should be satisfied. cos Δφ = (A _Ix ² +1) / 2A _I Δφ = cos ⁻¹ [(A _Ix ² +1) / 2A _I ] (7) The image rejection mixer circuit according to the present invention has an intermediate configuration such that equation (7) holds. By correcting the amplitude and phase of the frequency signal, the image signal component is effectively removed.

[0033]

FIG. 1 is a circuit diagram showing a first embodiment of an image rejection mixer circuit according to the present invention.

The image rejection mixer circuit according to the present embodiment includes a first phase shifter 11 for providing a local signal transmitted from a local signal transmitter 10 with a phase difference of 90 degrees.
A second phase shifter 12, a first mixer circuit 13 and a second mixer circuit 14 for mixing output signals from the first phase shifter 11 and the second phase shifter 12 and a high frequency (RF) signal, respectively; 9 is added to the output signal IF1 from the first mixer circuit 13.
Third phase shifter 15 and fourth phase shifter 1 for providing a phase difference of 0 degree
6, a fifth phase shifter 17 and a sixth phase shifter 18 for giving a phase difference of 90 degrees to the output signal from the second mixer circuit 14, and a third phase shifter 15 and a fourth phase shifter 16 A first adder 19 that adds the intermediate frequency signals IF11 and IF13; and a second adder 20 that adds the intermediate frequency signals IF23 and IF21 from the fifth phase shifter 17 and the sixth phase shifter 18. I have.

The image rejection mixer circuit according to this embodiment further includes third to sixth phase shifters 15 to 1
8 are provided with four limiter amplifiers 21, 22, 23, and 24 for making the amplitudes of the intermediate frequency signals from 8 the same. That is, the first limiter amplifier 21 equalizes the amplitude of the intermediate frequency signal IF12 from the third phase shifter 15, and the second limiter amplifier 22 adjusts the amplitude of the intermediate frequency signal IF12 from the fourth phase shifter 16.
14, the third limiter amplifier 23 adjusts the amplitude of the intermediate frequency signal IF24 from the fifth phase shifter 17,
The fourth limiter amplifier 24 equalizes the amplitude of the intermediate frequency signal IF22 from the sixth phase shifter 18.

Further, the image rejection mixer circuit according to the present embodiment includes a first phase detector 25 and a second phase detector 26. Each output signal from the first limiter amplifier 21 and the second limiter amplifier 22 is transmitted to the first phase detector 25, and each output signal from the third limiter amplifier 23 and the fourth limiter amplifier 24 is converted to the second phase detector 26. Sent to. The first phase detector 25 compares the phase of each output signal from the first limiter amplifier 21 and the second limiter amplifier 22 and extracts a phase error component of the output signal. Similarly, the second phase detector 26 compares the phases of the output signals from the third limiter amplifier 23 and the fourth limiter amplifier 24, and extracts the phase error components of those output signals.

The output signal representing the phase error component extracted by the first phase detector 25 and the output signal representing the phase error component extracted by the second phase detector 26 are provided by a third adder 27 and a fourth adder 28. , And are added in adders 27 and 28, respectively.

The image rejection mixer circuit according to the present embodiment includes an amplifier 29 and a third adder 27.
Each output signal from the fourth adder 28 is input to an amplifier 29 and amplified.

Further, the image rejection mixer circuit according to this embodiment includes a first gain control amplifier (AGC amplifier) 30 and a second gain control amplifier 31, and these first gain control amplifier 30 and second gain control amplifier The control amplifier 31 includes a third adder 27 amplified by the amplifier 29.
And an output signal IF3 from the first adder 19 and the second adder 20 based on the output signal from the fourth adder 28 and
The amplitude of IF4 is controlled respectively.

The fifth adder 32 adds the output signals from the first adder 19 and the second adder 20 whose amplitudes are controlled.

The image rejection mixer circuit according to this embodiment having the above-described structure operates as follows.

The local signal transmitted from the local signal transmitter 10 passes through the first phase shifter 11 and the second phase shifter 12, and is given a phase difference of 90 degrees. For example, a 45-degree phase shifter is used as the first phase shifter 11, and the second phase shifter 12
Is used as a phase shifter of -45 degrees. Alternatively, a 0-degree phase shifter is used as the first phase shifter 11 and the second phase shifter 12
May be used as a 90-degree phase shifter. The local signal provided with the phase difference of 90 degrees is mixed with a high frequency (RF) signal in the first mixer circuit 13 and the second mixer circuit 14, and each of the intermediate signal (IF) signal IF
1 and IF2.

The intermediate frequency signal IF1 is supplied to the third phase shifter 15
, And are converted into intermediate frequency signals IF11 and IF12, and at the same time, are passed through the fourth phase shifter 16 and converted into intermediate frequency signals IF13 and IF14. The phase difference between the intermediate frequency signals IF11 and IF13 and the phase difference between the intermediate frequency signals IF12 and IF14 are each 90 degrees.

Similarly, the intermediate frequency signal IF2 passes through the fifth phase shifter 17, and the intermediate frequency signals IF24 and IF2
3 and, at the same time, pass through the sixth phase shifter 18 and are converted into intermediate frequency signals IF22 and IF21. The phase difference between the intermediate frequency signals IF24 and IF22 and the phase difference between the intermediate frequency signals IF23 and IF21 are each 90 degrees.

The intermediate frequency signals IF11 and IF13 are added in the first adder 19 and the intermediate frequency signal IF3
Generate Similarly, the intermediate frequency signals IF23 and IF23
21 is added in the second adder 20 to generate an intermediate frequency signal IF4.

The intermediate frequency signal IF12 output from the third phase shifter 15 and the intermediate frequency signal IF14 output from the fourth phase shifter 16 pass through the first limiter amplifier 21 and the second limiter amplifier 22, respectively, and have an amplitude. Are input to the first phase detector 25. The first phase detector 25 compares the phases of the intermediate frequency signals IF12 and IF14, and extracts the phase error components of the intermediate frequency signals IF12 and IF14 as DC components.

Similarly, the intermediate frequency signal IF24 output from the fifth phase shifter 17 and the intermediate frequency signal IF22 output from the sixth phase shifter 18 pass through the third limiter amplifier 23 and the fourth limiter amplifier 24, respectively. Then, after the amplitudes are made uniform, they are input to the second phase detector 26. The second phase detector 26 includes intermediate frequency signals IF24 and IF22.
Of the intermediate frequency signals IF24 and IF22
Is extracted as a DC component.

The DC components extracted by the first phase detector 25 and the second phase detector 26 are added by the third adder 27 and the fourth adder 28, respectively, and then amplified by the amplifier 29. You.

The output V1 of the amplifier 29 based on the output signal from the third adder 27 is sent as a control signal to the first gain control amplifier 30, and the first gain control amplifier 30 performs the first addition based on the control signal. The amplitude of the intermediate frequency signal IF3 output from the device 19 is controlled.

Similarly, the output V2 of the amplifier 29 based on the output signal from the fourth adder 28 is applied to the second gain control amplifier 31
The second gain control amplifier 31 controls the amplitude of the intermediate frequency signal IF4 output from the second adder 20 based on the control signal.

The intermediate frequency signals IF5 and IF6 whose amplitudes have been controlled by the first gain control amplifier 30 and the second gain control amplifier 31 are added in the fifth adder 32 to generate a desired intermediate frequency signal IF. You.

In the conventional image rejection mixer circuit shown in FIG. 4, the third to sixth phase shifters 55, 5
Due to the phase errors at 6, 57 and 58, the amplitudes of the intermediate frequency signals IF3 and IF4 are not equivalent, and therefore at the third adder 61 these intermediate frequency signals I
Even if F3 and IF4 are added, the desired intermediate frequency signal I
F could not always be obtained.

On the other hand, according to the image rejection mixer circuit according to the present embodiment, the first and second phase detectors 25 and 26, the third and fourth adders 27 and 2
8, the amplitudes of the intermediate frequency signals IF3 and IF4 become equal due to the operation of the first and second gain control amplifiers 30 and 31. Therefore, by adding these intermediate frequency signals IF3 and IF4 in the fifth adder 32,
The image signal can be removed, and only the desired intermediate frequency signal IF can be extracted.

In the image rejection mixer circuit according to the present embodiment, each of the limiter amplifiers 21 and
The 22, 23 and 24 and the amplifier 29 are not always necessary, and even if these elements are not provided, even if the degree is different, basically the same effects as described above can be obtained.

FIG. 2 is a circuit diagram showing a second embodiment of the image rejection mixer circuit according to the present invention.

The image rejection mixer circuit according to the present embodiment has a feedback circuit 40 in addition to the configuration of the image rejection mixer circuit according to the first embodiment.
Is further provided.

The feedback circuit 40 includes the first gain control amplifier 30
A first full-wave detection circuit 33 for detecting the intermediate frequency signal IF5 output from the second amplifier and detecting the amplitude difference, and an intermediate frequency signal IF6 output from the second gain control amplifier 31 for detecting the amplitude difference. And a sixth adder 35 that adds the amplitude differences detected by the first full-wave detection circuit 33 and the second full-wave detection circuit 34 and feeds back the addition result to the amplifier 29. Become.

According to the image rejection mixer circuit of this embodiment, the intermediate frequency signals IF5 and IF6
Are detected, the differences are added, and the result is fed back to the amplifier 29, so that the lock time can be reduced.

FIG. 3 is a flowchart showing one embodiment of a method for removing an image signal according to the present invention.

First, in step 100, a local signal is given a phase difference of 90 degrees.

This is, for example, as shown in FIG. 1, a 45-degree phase shifter as the first phase shifter 11 and a second phase shifter 1.
This is done by using a -45 degree phase shifter as 2.

Next, in step 101, the local signal provided with the phase difference of 90 degrees and the high frequency (RF) signal are mixed, and the intermediate frequency signals IF1 and IF2 are mixed.
Respectively.

This mixing is performed using, for example, the first mixer circuit 13 and the second mixer circuit 14 shown in FIG.

Next, at step 102, a phase difference of 90 degrees is given to the intermediate frequency signals IF1 and IF2.

For example, as shown in FIG. 1, the intermediate frequency signal IF1 is passed through the third phase shifter 15 and the fourth phase shifter 16, and the intermediate frequency signal IF2 is shifted into the fifth phase as shown in FIG. This is performed by passing through a device 17 and a sixth phase shifter 18.

Next, in step 103, the amplitudes of the intermediate frequency signals provided with a phase difference of 90 degrees are made uniform.

For example, as shown in FIG. 1, the intermediate frequency signals IF12, IF14, IF24, IF output from the third to sixth phase shifters 15, 16, 17, 18 respectively.
22 is a first to fourth limiter amplifiers 21, 22, 23,
24, the amplitudes of the intermediate frequency signals can be made uniform.

Next, in step 104, the phase error component of each intermediate frequency signal is extracted.

For example, as shown in FIG. 1, the intermediate frequency signals IF12 and IF14 output from the third phase shifter 15 and the fourth phase shifter 16 and passed through the first limiter amplifier 21 and the second limiter amplifier 22. To the first phase detector 25, so that the intermediate frequency signals IF12 and I
The phase error component of F14 can be extracted. Similarly, output from the fifth phase shifter 17 and the sixth phase shifter 18,
By inputting the intermediate frequency signals IF24 and IF22 that have passed through the third limiter amplifier 23 and the fourth limiter amplifier 24 to the second phase detector 26, the phase error components of the intermediate frequency signals IF24 and IF22 can be extracted.

Thereafter, in step 105, the phase error components extracted in step 104 are added.

The addition of the phase error component is performed, for example, by using FIG.
As shown in (1), the output signals from the first phase detector 25 and the second phase detector 26 are output by the third adder 27 and the fourth adder 28. Next, in step 106, each output signal from the third adder 27 and the fourth adder 28 as a result of the addition is amplified.

The output signals from the third adder 27 and the fourth adder 28 are amplified, for example, by inputting the output signals from the third adder 27 and the fourth adder 28 to the amplifier 29. Will be

Next, in step 107, the amplitude of the output signal in step 102 is controlled based on the amplified output signals.

In this step 107, for example,
As shown in FIG. 1, the output signal from the amplifier 29 is input as a control signal to the first gain control amplifier 30 and the second gain control amplifier 31, and is output from the first adder 19 based on the control signal. The amplitudes of the intermediate frequency signal IF3 and the intermediate frequency signal IF4 output from the second adder 20 are controlled.

Further, in step 108, the amplitude difference of each intermediate frequency signal whose amplitude is controlled is detected, the amplitude difference is added, and the added value is fed back to the amplification process in step 106. Alternatively, the added value may be fed back to the process of adding the phase error component in step 105.

According to the image signal removing method according to the present embodiment, steps 103, 104, 105, 106,
With 107, the amplitudes of the intermediate frequency signals IF3 and IF4 become equal. Therefore, in step 108, by adding these intermediate frequency signals IF3 and IF4, it is possible to remove the image signal and extract only the desired intermediate frequency signal IF.

[0077]

According to the present invention, it is possible to correct a phase error generated in each phase shifter due to a variation in a manufacturing process of a semiconductor device or a change in an intermediate frequency.
As a result, it is possible to eliminate the deviation of the amplitude of the intermediate frequency signal caused by the phase error. As a result, the image signal can be effectively suppressed, and only the desired intermediate frequency signal can be extracted.

Further, since the image signal can be efficiently removed, the necessity of using a filter such as a band-pass filter or a low-pass filter can be eliminated.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an image rejection mixer circuit according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the image rejection mixer circuit according to the present invention.

FIG. 3 is a flowchart illustrating an image signal removing method according to an embodiment of the present invention.

FIG. 4 is a circuit diagram of a conventional image rejection mixer circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Local signal transmitter 11 1st phase shifter 12 2nd phase shifter 13 1st mixer circuit 14 2nd mixer circuit 15 3rd phase shifter 16 4th phase shifter 17 5th phase shifter 18 6th phase shifter Apparatus 19 First adder 20 Second adder 21 First limiter amplifier 22 Second limiter amplifier 23 Third limiter amplifier 24 Fourth limiter amplifier 25 First phase detector 26 Second phase detector 27 Third adder 28 Second Four adder 29 Amplifier 30 First gain control amplifier 31 Second gain control amplifier 32 Fifth adder 33 First full wave detection circuit 34 Second full wave detection circuit 35 Sixth adder 40 Feedback circuit

Claims (9)

(57) [Claims] A first phase shifter and a second phase shifter for providing a 90-degree phase difference to a local signal; and an output signal and a high-frequency signal from the first phase shifter and the second phase shifter. A first mixer circuit and a second mixer circuit for mixing; a third phase shifter and a fourth phase shifter for providing a phase difference of 90 degrees to an output signal from the first mixer circuit; A fifth phase shifter and a sixth phase shifter that provide a phase difference of 90 degrees to the output signal; a first adder that adds each output signal of the third phase shifter and the fourth phase shifter; A second adder that adds the output signals of the fifth phase shifter and the sixth phase shifter, and compares the phases of the output signals of the third phase shifter and the fourth phase shifter, and compares them. A first phase detector for extracting a phase error component of the output signal; and a phase of each output signal of the fifth phase shifter and the sixth phase shifter. A second phase detector for comparing and extracting phase error components of those output signals, and adding the phase error component extracted by the first phase detector and the phase error component extracted by the second phase detector. A third adder, and a first gain controller and a second gain control that control the amplitude of the output signal from the first adder and the second adder based on the output signal from the third adder. An image rejection mixer circuit comprising: a mixer; and a fourth adder for adding output signals from the first gain controller and the second gain controller. 2. Before the output signals from the third to sixth phase shifters are input to the first and second phase detectors, the amplitudes of the output signals are made uniform. The image rejection mixer circuit according to claim 1, further comprising a limiter amplifier. 3. The image rejection mixer circuit according to claim 1, wherein said third adder comprises two adders. 4. The apparatus according to claim 1, further comprising an amplifier for amplifying an output signal from said third adder.
The image rejection mixer circuit according to any one of claims 1 to 3. 5. A full-wave detection circuit for detecting an amplitude difference between output signals from the first gain controller and the second gain controller, adding the amplitude differences, and adding the value to the third addition. The image rejection mixer circuit according to any one of claims 1 to 4, further comprising: an adder that feeds back to the amplifier or the amplifier. 6. A first step of providing a 90-degree phase difference to a local signal, a second step of mixing a local signal provided with a 90-degree phase difference and a high-frequency signal, A third step of providing a phase difference of 90 degrees, a fourth step of extracting a phase error component from a first group of output signals of the output signals in the third step, and a fifth step of adding the phase error component And a sixth step of controlling the amplitude of a second group of output signals of the output signals in the third step based on the addition result in the fifth step, and the amplitude in the sixth step A seventh step of adding the controlled output signals. 7. The method according to claim 6, further comprising, between the third step and the fourth step, an eighth step of adjusting the amplitude of the output signal in the third step. Image signal removal method. 8. The method according to claim 6, further comprising, between the fifth step and the sixth step, a ninth step of amplifying the output signal in the fifth step. 8. The method for removing an image signal according to item 7. 9. A tenth step of detecting an amplitude difference between output signals in the sixth step, adding the differences, and feeding back the value to the fifth step or the ninth step. The method according to any one of claims 6 to 8, further comprising: