JP3232594B2 - Synchronous circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronizing circuit which can cope with a video signal having a feature such as a narrow pulse width of a vertical synchronizing signal.

[0002]

2. Description of the Related Art A conventional synchronization circuit separates a synchronization signal from a video signal, integrates the separated synchronization signal, and outputs the integrated output.
The vertical synchronizing signal is obtained by comparing with a threshold value .

However, in recent years, for example, a video signal for copy guard is configured to have a narrow pulse width of a vertical synchronizing signal. In order to process such a video signal by a conventional synchronizing circuit, a threshold value is set to be higher than usual. Had to be set low.

[0004]

SUMMARY OF THE INVENTION However, the thread
If the shuffle value is set low, there is a disadvantage that jitter tends to occur for a signal having a lot of noise such as a weak electric field.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a synchronizing circuit which can cope with a video signal having characteristics such as a narrow pulse width of a vertical synchronizing signal and which does not deteriorate noise resistance.

[0006]

Means for Solving the Problems] synchronization circuit according to the present invention for achieving the above object includes a sync separation circuit for separating a synchronizing signal in the video signal, an integrating circuit for integrating the separated signals, the integration A first level comparator for comparing the output with a first threshold value to obtain a vertical synchronizing signal; and a second level comparator for comparing the integrated output with a first threshold value lower than the first threshold value .
A second level comparator to obtain a vertical synchronizing signal by comparing with the second threshold sucrose hold value, corresponding to the first and second input
Counting circuit that counts up or down
And the output of the first level comparator as the first input
Up-counts pulses that are lower in frequency than the vertical sync signal.
Count as the second input,
Outputs a low signal when the default value is equal to or less than a predetermined value.
Up / down card that outputs a high signal when the
Und circuit and the synchronization separated by the synchronization separation circuit.
A horizontal synchronization presence / absence detection circuit for detecting whether or not there is a horizontal synchronization signal in the signal ; an output of the horizontal synchronization presence / absence detection circuit;
In response to the signal output of the
The output of the first level comparator or the second level comparator
Selection means for selecting and outputting as a vertical synchronization signal.
The horizontal synchronization presence / absence detection circuit detects no horizontal synchronization signal.
Output from the up / down counting circuit
Irrespective of the high signal / low signal of
The output of the first level comparator is selected and the horizontal synchronization is selected.
The presence / absence detection circuit detects the presence of a horizontal synchronization signal, and
When the first level comparator outputs a vertical synchronizing signal
A previous high signal at the output of the up / down count circuit
Serial selecting means selects the output of the first level comparator, wherein
A horizontal synchronization presence / absence detection circuit detects presence of a horizontal synchronization signal, and
First, the first level comparator does not output a vertical synchronizing signal.
The low signal of the up / down count circuit output
The selection means causes the output of the second level comparator to
Is selected .

[0007]

[Function] When a normal video signal is input, high level comparison is performed.
The first level comparator, which is a comparator, outputs the vertical synchronizing signal, and separates the vertical synchronizing signal at the second threshold value, which is a normal threshold value. Also, the pulse width of the vertical synchronizing signal is narrow. Is input, the first level comparator does not output the vertical synchronization signal, and the horizontal synchronization presence / absence detection circuit detects the presence of the horizontal synchronization signal. Separate the signal,
When a video signal with much noise such as a weak electric field is input, the first level comparator outputs a vertical synchronization signal, but the horizontal synchronization presence / absence detection circuit detects the absence of the horizontal synchronization signal. Separate vertical sync signal by value.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 7 show one embodiment of the present invention.

FIG. 1 is a circuit block diagram of the synchronous circuit. In FIG. 1, a video signal input from an input terminal t is guided to a sync separation circuit 1, where the sync signal is separated using an amplitude difference. The separated synchronization signal is supplied to an integrating circuit 2 and a differentiating circuit 3, respectively.
The integration output of the integration circuit 2 is a first level which is a high-level comparator.
Bell comparator 4 and second level comparison which is a low level comparator
To the respective + input terminals of the container 5.

A normal input terminal of the high-level comparator 4 is
The first threshold, which is the threshold voltage
Voltage , low-level comparator voltage-
Lower than this to the input terminal threshold voltage Der
Second threshold voltages are applied,
The output of each of the comparators 4 and 5 is led to each selection terminal of the changeover switch SW.

The differentiated output of the differentiating circuit 3 is supplied to a horizontal synchronizing presence / absence detecting circuit 6, and the horizontal synchronizing presence / absence detecting circuit 6 detects whether or not there is a locked horizontal synchronizing signal based on the presence / absence of a constant period differential pulse. Then, if there is a locked horizontal synchronizing signal, the H signal is output to the inverting circuit 7 if not, and the output inverted by the inverting circuit 7 is led to one input terminal of the OR circuit 8. .

On the other hand, the output of the high-level comparator 4 is led to the up terminal of the up / down counter 9, and a pulse (VP) having the same cycle as the normal vertical synchronizing signal is supplied to the down terminal of the up / down counter 9 for two minutes. The frequency-divided output of the １ ／ frequency divider 10 is guided. The up / down counter 9 outputs an L signal to the other input terminal of the OR circuit 8 when the count value is the minimum value, and outputs an H signal when the count value is not the other value.

The output of the OR circuit 8 is used as a switch signal of a switch SW. The switch SW selects the output of the high-level comparator 4 when the signal is H, and selects the output of the low-level comparator 5 when the signal is L. I do.

The operation of the above configuration will be described below.

When a normal video signal is input, as shown in FIG. 2, the integrated output of the integrating circuit 2 exceeds a normal threshold value (V _H ), so that the high-level comparator 4 outputs the vertical synchronizing signal. Is output every vertical cycle. Then, as shown in FIG. 3, since the count value of the up / down counter 9 becomes the highest value, an H signal is output. Further, since a horizontal synchronizing signal having a fixed period is obtained from the differentiating circuit 3, the inverting circuit 7
Output a signal. Accordingly, since the OR circuit 8 outputs the H signal and the changeover switch SW selects the high-level comparator 4, the vertical synchronizing signal is separated by a normal threshold value.

When a video signal having a characteristic that the pulse width of the vertical synchronizing signal is narrow is input, as shown in FIG. 4, the integration output of the integration circuit 2 generally does not exceed a normal threshold value (V _H ). , The high-level comparator 4 hardly outputs a vertical synchronizing signal. Then, as shown in FIG. 5, since the count value of the up / down counter 9 also becomes substantially the minimum value, the L signal is output. However, since the horizontal synchronizing signal is the same as a normal video signal and the differentiating circuit 3 outputs a horizontal synchronizing signal of a fixed period, the inverting circuit 7 outputs an L signal.
Accordingly, the OR circuit 8 outputs the L signal and the changeover switch SW
Low Suresshuho order but to select a low-level comparator 5 side
The vertical synchronization signal is separated by the threshold value . As shown in FIG. 4, the low-level comparator 5 can also synchronize a special signal to separate the vertical synchronization signal.

When a video signal having a lot of noise such as a weak electric field is input, as shown in FIG. 6, the integration output of the integration circuit 2 exceeds a normal threshold value (V _H ). A vertical synchronization signal is output every vertical cycle. Then, as shown in FIG. 7, an H signal is output because the count value of the up / down counter 9 maintains the almost maximum value. In addition, the horizontal synchronizing signal is not stable in such a video signal, and the horizontal synchronizing signal of a constant cycle cannot be obtained from the differentiating circuit 3 due to the influence of noise, and the inverting circuit 7 outputs the H signal. Therefore, since the OR circuit 8 outputs the H signal and the changeover switch SW selects the high-level comparator 4 side, a normal switch is used .
The vertical synchronization signal is separated by the threshold value . As shown in FIG. 6, if separation is performed with a low threshold value , an error due to noise occurs, but such error does not occur and the noise resistance does not deteriorate.

In this embodiment, the output of the up / down counter 9 is switched between the minimum value of the count value and the other values. However, the output may be divided based on the intermediate value of the count value. It is also determined by the number of bits of the up / down counter 9.

The means for judging the presence or absence of the horizontal synchronizing signal and detecting the vertical synchronizing signal are not limited.

[0020]

As described above, according to the present invention, the vertical synchronizing signal is configured to be separable by two-step threshold values , and when a special signal such as a narrow pulse width of the vertical synchronizing signal is input. Only the low threshold value separates the vertical sync signal so that not only the normal video signal but also the special signal can be synchronized. In addition, the non-special signal is sync-separated with the normal threshold value for noise resistance. This also has the effect of not deteriorating.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of a synchronous circuit (embodiment).

FIG. 2 is an output waveform diagram of each section in a normal video signal (Example).

FIG. 3 is an output waveform diagram of each section in a normal video signal (Example).

FIG. 4 is an output waveform diagram of each unit in a special signal (Example).

FIG. 5 is an output waveform diagram of each unit in a special signal (Example).

FIG. 6 is an output waveform diagram of each part in a video signal having much noise (Example).

FIG. 7 is an output waveform diagram of each part in an image signal having much noise (Example).

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Sync separation circuit, 2 ... Integration circuit, 4 ... High level comparator
The first level comparator is, is 5 ... lower level comparator
Second level comparator , 6... Horizontal synchronization presence / absence detection circuit, SW
... Changeover switch.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N ^5/ 04-5/12

Claims (1)

(57) [Claims] 1. A and sync separation circuit for separating a synchronizing signal in the video signal, an integrating circuit for integrating the separated signals, first to obtain the vertical sync signal by comparing the integrated output with a first threshold value A level comparator, wherein the integrated output is lower than the first threshold value.
A second level comparator to obtain a vertical synchronizing signal by comparing the second-threshold value, up in response to the first and second input or the down count
A counting circuit for performing the first level comparator.
The output is counted up as the first input,
A pulse having a lower frequency than the period signal as the second input.
When the count value is down to the specified value or less
The low signal is output to the
And an up / down counting circuit for outputting a signal, and a horizontal synchronization with a synchronization signal separated by the synchronization separation circuit.
A horizontal synchronization presence / absence detection circuit for detecting whether or not there is a signal ; an output of the horizontal synchronization presence / absence detection circuit;
The first level ratio according to the signal output of the
Comparator or the output of the second level comparator to select
Selection means for outputting as a synchronization signal, wherein the horizontal synchronization presence / absence detection circuit detects the absence of a horizontal synchronization signal.
The output of the up / down count circuit
Irrespective of the A signal / low signal, the selecting means
1. The output of the level comparator of No. 1 is selected, and the horizontal synchronization presence / absence detection circuit detects the presence of the horizontal synchronization signal
And the first level comparator outputs a vertical synchronizing signal.
Output, the output of the up / down count circuit
The selector outputs the output of the first level comparator according to the signal
And the horizontal synchronization presence / absence detection circuit detects the presence of a horizontal synchronization signal.
And the first level comparator outputs a vertical synchronizing signal.
If the output is not applied,
The selection means is operated by the second level comparator in response to a low signal.
A synchronous circuit characterized by selecting the output of the synchronous circuit.