JP3230995B2 - Viterbi decoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Viterbi decoder used in the field of digital broadcasting and digital communication, and more particularly to a Viterbi decoder for soft-decision of data modulated into multi-level QAM in terrestrial broadcasting and CATV.

[0002]

2. Description of the Related Art Conventionally, digital television broadcasting has been directed to DirectTV in the United States and to DVB in countries around the world mainly in Europe.
Digital satellite broadcasting based on (digital video broadcasting) is being put to practical use. These are systems using convolutional codes and using the QPSK system for modulation.

On the other hand, in CATV, a system that does not use a convolutional code is predominant, and terrestrial digital broadcasting in which a convolutional code is considered to be essential has not yet been realized. By the way, digital satellite broadcasting using QPSK has already been realized, and a large number of FEC (forward error correction) decoders corresponding to the digital satellite broadcasting have been produced.
It is available at low cost. The input to the QPSK Viterbi decoder converts the data of the real axis and the data of the imaginary axis into eight values (3
Bits) or 16 values (4 bits), it is possible to make a soft decision sufficiently.

At present, terrestrial digital broadcasting is being studied in various countries. These consider the use of multi-level coded modulation using coded modulation. For digital terrestrial broadcasting, a transmission method using a single carrier using the 8VSB method has been studied in the United States, and a multicarrier transmission method using OFDM has been studied in Europe and Japan.

[0005] Even in the case of the OFDM modulation method, it is assumed that QPSK, 16QAM, 64QAM or the like is used as the primary modulation, and the FEC part after OFDM demodulation can be considered as a single carrier.

[0006] Even in the case of CATV, if the transmission capacity per channel is to be increased in the future, it is essential to use a convolutional code. In the future, one television must be capable of receiving digital satellite broadcasting, terrestrial broadcasting, CATV, and the like.

In the case of these multilevel modulation systems, for example, 64
For QAM, the input to the Viterbi decoder must be at least 8
Bits are considered necessary. Therefore, the input of the Viterbi decoder developed for multi-level modulation has at least 8 inputs.
Seems a bit necessary.

At present, development of a Viterbi decoder for multi-level QAM transmission is underway, but it is generally difficult to obtain it. If there is no Viterbi decoder created for multi-level modulation, the multi-level modulation data is hard-decided, and is converted into a bit string from a symbol and then input to the Viterbi decoder.

In this case, even if the Viterbi decoder for binary modulation for QPSK or the like supports the soft decision, the information necessary for the soft decision is already missing before that. Therefore, the Viterbi decoder can only make hard decisions, resulting in a reduction in coding gain.

[0010]

As described above, since a conventional Viterbi decoder capable of supporting a multi-level modulation scheme is under development, it has been applied to a modulation / demodulation apparatus of a multi-level modulation scheme in digital terrestrial broadcasting. It is strongly desired that a highly versatile one can be used.

In view of the above circumstances, it is an object of the present invention to provide a simple Viterbi demodulation circuit for multi-level modulation such as 64QAM to which a redundant bit has been added by a convolutional code. An object of the present invention is to provide a Viterbi decoding device which can be easily used.

[0012]

To solve the above problems, the present invention is configured as follows. (1) A signal of n bits (n is a natural number) per symbol
Is multi-level modulated, and multi-level demodulated data obtained by receiving and demodulating the multi-level modulated signal is input for each symbol , and Viterbi
In a Viterbi decoder for decoding, one symbol
For each input signal level of the multilevel demodulated data,
Thus, for each bit of the signal of n bits per symbol,
Using the specified conversion table, the multi-level demodulated data
To each bit of the signal of n bits per symbol.
Data conversion means for converting the data into corresponding metric data, and the n data converted by the data conversion means .
Viterbi decoding means for sequentially decoding Viterbi metric data in units of two metrics .

(2) On the transmitting side, for input data
The bit string obtained by performing the convolutional encoding process is represented by 2
k (k is a natural number) bits (b ₀ , b ₁ ,..., b _2k-2 ,
b _2k-1 ), with one symbol and even index
A set of k bits (b ₀ ,..., B _2k-2 ) is defined by a predetermined rule.
Is assigned to the real axis value on the complex plane based on
Is a set of k bits (b ₁ ,..., B _2k-1 )
Assign to the imaginary axis value on the complex plane based on predetermined rules
By shining, the 2 ^2k value quadrature amplitude modulated signal, received
The demodulated data obtained by signal demodulation is one symbol
Input to the Viterbi decoding device that performs Viterbi decoding
The demodulated data input for each symbol,
2 k bits per symbol (b ₀ , b ₁ ,..., B _2k-2
, B _2k-1 ) conversion table specified for each bit of the signal
2k (b ₀ , b ₁ ,..., B _2k-2 , b
_2k-1 ) 2k metric data corresponding to bits
(M ₀ , m ₁ , ..., m _2k-2 , m _2k-1 )
Data conversion means and before the data is converted by the data conversion means.
2k metric data in 2 metric units
And Viterbi decoding means for performing next Viterbi decoding .

(3) In the configuration of (2), the data
The conversion means converts the demodulated data input for each symbol.
The real axis value is indexed based on a predetermined conversion table.
The k bits (b ₀ ,..., B _2k−2 ) whose number is even
K metric data (m ₀ ,..., _{M 2k-2) corresponding to}
), And the symbol
The imaginary axis value of the demodulated data is calculated based on a predetermined conversion table.
The k bits (b ₁ , b ₁ ,
, B _2k-1 ), and k pieces of metric data (m ₁
,..., _{M 2k-1} ). (4) In the configuration of (2) or (3), the transmitting side
And the k-bit set whose index is even is duplicated.
Rules for assigning to real axis values on the elementary plane and the index
The set of k bits whose odd number is an imaginary number on a complex plane
The rules for assigning to axis values are the same,
The conversion means converts the demodulated data input for each symbol.
The real axis value is calculated using the k-bit index whose index is even.
Corresponding to bit b _2i-2 (i is a natural number less than or equal to k)
Conversion table when converting to metric data m _2i-2
And the imaginary value of the demodulated data input for each symbol
Is the bit of the k bits whose index is odd.
Be converted to metric data m _2i-1 which correspond to and b _2i-1
The conversion table is the same as the conversion table. (5) In any one of the configurations (2) to (4),
Punctured convolution on the receiving side
And the Viterbi decoding means performs
The 2k metric data converted by the data conversion means.
After depuncturing the data, each data is
It is characterized in that Viterbi decoding is sequentially performed on a per-clock basis.

(6) The configuration according to any one of (1) to (5)
, The Viterbi decoding means is constituted by an integrated circuit.
It is characterized by being performed. That is, according to the present invention, Viterbi decoding of multi-level modulated digital data such as 64QAM to which redundant bits are added by a convolutional code is performed by a general-purpose 2
The purpose of the present invention is to make it easy to use a Viterbi decoding circuit for value modulation.

That is, a multi-level QAM using a Viterbi decoding circuit developed for digital satellite broadcasting, which is currently advanced, is used.
Performs Viterbi decoding of transmission. Accordingly, in the case of multi-level QAM transmission, for example, 64 QAM, which requires 8 bits as an input, according to the present invention, a 3-bit to 4-bit Viterbi decoder can sufficiently cope with the problem.

More specifically, the present invention employs a technique of treating bit pairs on the real axis and imaginary axis of data that has been convolutionally coded and then subjected to multilevel QAM modulation as QPSK so-called binary data. That is, one symbol of 64QAM is Q
It is converted into three symbols as PSK. In this conversion, the received 64QAM symbol is converted into each symbol as QPSK so that each bit as QPSK is 3 bits or more so that soft decision can be made as QPSK data.

At this time, it is possible to freely set a metric for making a soft decision by a conversion method. Further, according to the present invention, it is possible to share the FEC decoder corresponding to the satellite, the ground, and the CATV.

[0019]

Embodiments of the present invention will be described below in detail with reference to the drawings. The terrestrial digital TV broadcasting system being studied in Europe and Japan is the OFDM system. However, except for the OFDM modulation / demodulation unit, the FEC part can be considered as a single carrier. Therefore, in this embodiment, the OFDM modulation / demodulation unit is omitted for convenience of explanation. It should be noted that this method can be applied to a single carrier system other than OFDM.

First, a convolutional encoder used in the present invention will be described with reference to FIG. In FIG. 8, reference numerals 21 to 26 denote delay circuits (1-Bit Delay) each of which delays input data by one bit. These are connected in series, and the input data sequence (Input) is sequentially held one bit at a time to delay.

Of the data held in each of the delay circuits 21 to 26, the output data of the delay circuits 21, 22, 23, and 26 and the 4 bits of the input data at the same point are all added to the adder 2
7 and subjected to a convolution operation by addition to become data (X Output) on the real axis.

Similarly, delay circuits 22, 23, 25, 26
And the four bits of the input data at the same time are supplied to the adder circuit 28, where the convolution operation by addition is performed.
It becomes data (Y Output) on the imaginary axis.

In the present invention, the convolutional encoder shown in FIG. 8 is used. However, it may be different from the convolutional encoder shown in FIG. However, the convolutional encoder for QPSK and the convolutional encoder for multi-level modulation data need to generate the same data.

For the punctured pattern, Q
Viterbi decoding at a code rate supported by the PSK Viterbi decoder is also possible for multi-level modulation. FIG.
The configuration of the embodiment of the present invention will be described with reference to FIG. In the present embodiment, a case of a symbol transmitted by 64QAM will be described.

FIG. 1 shows the configuration of a Viterbi decoder according to an embodiment of the present invention.
In the symbol of M, the real part (Re) 8 bits are ROM
The imaginary part (Im) 8 bits are supplied to the ROMs 12, 14, and 16, and supplied to the ROMs 12, 14, and 16. Each of the ROMs 11 to 16 is provided with a conversion table for converting the input demodulated data into binary soft decision data.
The data is converted into bit data y0, y1, y2, y3, y4, y5 and output.

The outputs of the ROMs 11 to 16 are both supplied to a multiplexing circuit (MUX) 17 and are selectively output in a predetermined order by time-division multiplexing for three bits each of a real part and an imaginary part. This output data sequence is a data sequence converted as QPSK, and is soft-decided by the QPSK Viterbi decoder 18.

That is, in the configuration of this embodiment, 64Q
The AM symbol is converted into Q for each bit by the reception level.
Convert to data as PSK. However, at this stage, in order to perform a soft decision, conversion is performed as 3 bits per bit.

Next, the Viterbi decoder 1 used in the present invention
8 will be described. FIG. 2 is an example of QPSK mapping. In this example, eight levels are used for both the real axis and the imaginary axis as the soft decision level. Explaining in the real axis direction, the position of the constellation is that the point corresponding to "bit 1" is 1
And 2, a point corresponding to “bit 0” is located between 5 and 6.

FIG. 3 shows the metrics used in the present invention. The metric of 3 bits and 8 levels is sufficient, the metric for "bit 0" monotonically decreases as the reception level increases, and the metric for "bit 1" monotonically increases as the reception level increases. This is a reference example of one metric for QPSK, and one using a different metric can also be used in the present invention.

The present invention decodes a multilevel modulated signal using such a Viterbi decoder 18 for QPSK. The method will be described. FIG. 4 shows an example of 64QAM mapping employed in the DVB system. still,
Each symbol of 64QAM is (y0, y1, y2, y
3, y4, y5), and the real axis direction is y0, y
2, y4, and the imaginary axis direction indicates y1, y3, y5. This one symbol is decomposed into bits, and how 1 and 0 are distributed for each bit is shown in FIGS. 5 (a) to 5 (c). From this figure, it can be seen that the arrangement of 1,0 differs for each bit.

Next, referring to FIGS. 6A to 6C,
Consider mapping when the input of 64QAM is 8 bits. 6A to 6C, the horizontal axis represents the input mapping data of 64QAM, and the vertical axis represents QP.
The criterion of soft decision for each bit converted for SK is shown. In addition, the reason why two are shown on the vertical axis, such as y0 and y1, is that the mapping in the real axis and the imaginary axis direction are equal in the mapping of FIG. Therefore, in the case of this example, the number of ROMs can be reduced to half by sharing the ROMs 11 to 16 shown in FIG. 1 with the real axis and the imaginary axis.

Returning to FIG. 6, the method of soft decision will be described. Here, the real number axis is considered. For example, 64
If the signal level of the QAM symbol is 150, y0
Is converted to 0 as the level of the binary signal, y2 is 7, y
4 is converted to 4. The signal thus converted is Q
It can be considered as data as PSK, and Viterbi decoding can be realized using the characteristics of FIG. That is, a pair of a real axis and an imaginary axis reproduced using the transformation of FIG. 6, (y0,
By inputting y1), (y2, y3), and (y4, y5) to the Viterbi decoder 18 of QPSK, Viterbi decoding of the multi-level modulation signal can be performed.

Next, consider the overall metric of the multi-level coded modulation configured in the above-described manner. The metric for “bit 0” is the same as in FIGS. 6A, 6B, and 6C, but the metric for “bit 1” is the inverse of FIG. This is shown in FIGS. 7 (a), (b) and (c).
Will be shown.

As described above, according to the embodiment of the present invention, it is possible to use a Viterbi decoder of an LSI developed for QPSK, and thereby, it is possible to use multi-level digital transmission which is expected to increase in the future. Can be supplied at an early stage and at a low price.

In this embodiment, 64Q is used with reference to FIG.
Although AM data is converted to QPSK data, Viterbi decoding is possible even if conversion other than that shown in FIG. 6 is performed. Also,
In the present embodiment, 64 QAM is shown, but 16 QA
The same applies to M, 32QAM, and 256QAM.

In this embodiment, the multi-level modulation signal is 2
Although a ROM is used as a method of converting the signal into a value signal, the signal can be created by a logic circuit. In the present embodiment, the Viterbi decoding in which all bits are convolved has been described. However, the present invention can also be applied to trellis-coded modulation data that uses unconvolved bits.

[0037]

As described above, according to the present invention, a simple Viterbi demodulation circuit for binary modulation can be obtained by performing Viterbi decoding of digital data modulated by multi-level modulation such as 64QAM to which redundant bits have been added by a convolutional code. It is possible to provide a Viterbi decoding device that can be easily used. As a result, QPSK
LSI circuits developed for
It becomes possible to supply a decoder for multilevel digital transmission, which is considered to increase in demand, at an initial stage at a low price.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram showing a configuration of a Viterbi decoder according to an embodiment of the present invention.

FIG. 2 is a diagram showing a constellation of a general QPSK modulation scheme.

FIG. 3 is a diagram showing metrics for performing general QPSK Viterbi decoding.

FIG. 4 is a diagram showing a signal arrangement of 64QAM used in the embodiment of the present invention.

FIG. 5 is a diagram showing a signal arrangement in FIG. 4 for each bit.

FIG. 6 is a diagram showing conversion from a symbol level of a 64QAM signal used in the embodiment of the present invention to binary data, and also showing a metric for “bit 0”.

FIG. 7 is a diagram showing metrics for “bit 1” used in the embodiment of the present invention.

FIG. 8 is a block circuit diagram showing a configuration of a convolutional encoder used in the embodiment of the present invention.

[Explanation of symbols]

11, 12, 13, 14, 15, 16 ROM 17 Multiplexer 18 Viterbi decoder for QPSK 21, 22, 23, 24, 25, 26 1-bit delay circuit 27, 28 Adder

──────────────────────────────────────────────────続 き Continued on the front page (72) Tomohiro Kimura 5-2-8 Akasaka, Minato-ku, Tokyo Inside the Next Generation Digital Television Broadcasting System Research Laboratories (72) Inventor Sadaji Kageyama Minato-ku, Tokyo 5-2-2, Akasaka, Research Institute for Next-Generation Digital Television Broadcasting Systems, Ltd. (72) Inventor Kenichiro Hayashi 5-2-2-8, Akasaka, Minato-ku, Tokyo Research on next-generation digital television broadcasting systems (72) Inventor Yasuo Harada 5-2-2, Akasaka, Minato-ku, Tokyo Inside the Next Generation Digital Television Broadcasting System Research Laboratories Co., Ltd. (56) References JP-A-6-326742 (JP, A) (58) Fields investigated (Int. . ^7, DB name) H03M 13/41 H04J 11/00 H04L 27/00 H04L 27/22 H04L 27/38

Claims (6)

(57) [Claims] 1. A method in which n (n is a natural number) bits per symbol
Bets signal multi-level modulation, multilevel demodulated data obtained by receiving and demodulating said multilevel modulated signal inputted every one symbol, in the Viterbi decoding apparatus for performing Viterbi decoding, is input for each symbol The signal level of the multi-level demodulated data
Of the n-bit signal per symbol
Using a conversion table defined for each packet,
Key data is stored in each bit of an n-bit signal per symbol.
Data conversion means for converting the n-number of metric data corresponding to Tsu bets, the n Cytometry converted by the data converting means
And a Viterbi decoding means for sequentially decoding Viterbi data in units of two metrics . (2)On the transmitting side, the input data
The bit string obtained by performing the coding
(K is a natural number) bits (b ₀ , B ₁ , ..., b _2k-2 , B
_2k-1 ) For each symbol, and the index is even
K bits (b ₀ , ..., b _2k-2 ) Pair based on the prescribed rules
Is assigned to the real axis value on the complex plane, and the index is
The odd k bits (b ₁ , ..., b _2k-1 ) Set
To the imaginary axis value on the complex plane based on the rule of
By the way, 2 ^2k Value quadrature amplitude modulated signal
The demodulated data obtained by tuning
In a Viterbi decoding device for performing Viterbi decoding, The demodulated data input for each symbol is
2k bits per bol (b ₀ , B ₁ , ..., b _2k-2 , B
_2k-1 ) Is a conversion table defined for each bit of the signal.
Using 2k (b ₀ , B ₁ , ..., b _2k-2 , B
_2k-1 ) 2k metric data corresponding to bits
(M ₀ , M ₁ , ..., m _2k-2 , M _2k-1 ) To convert to
Data conversion means, The 2k methods converted by the data conversion means
Rick data is sequentially Viterbi decoded in units of 2 metrics.
To Viterbi decodingmeansViterbi, comprising:
Decoding device. 3. The data conversion means according to claim 2, wherein
The input real axis value of the demodulated data is converted to a predetermined conversion data.
The k bits whose index is even, based on
K metrics corresponding to the number (b ₀ ,..., B _2k-2 )
Data (m ₀ ,..., _{M 2k-2} )
The imaginary axis value of the demodulated data input for each symbol
Index is odd based on conversion table
K bits corresponding to the k bits (b ₁ ,..., B _2k-1 )
Metric data (m ₁ , ..., m _2k-1 )
The Viterbi decoding device according to claim 2, wherein: 4. On the transmitting side, the index is an even number
Allocate the set of k bits to a real axis value on a complex plane
Rules and the k-bit index is odd.
Rules for assigning sets of pairs to imaginary axis values on the complex plane
Are the same, and the data conversion means outputs the input data for each symbol.
The real axis value of the key data,
Bit b _2i-2 of k bits (i is a natural number less than or equal to k)
When converting to metric data m _2i-2 corresponding to
Conversion table and the demodulated data input for each symbol
Of the k bits whose index is odd
Metric data m _2i-1 corresponding to bit b _2i-1 in
The feature is that the conversion table when converting to is the same
The Viterbi decoding device according to claim 2 or 3, wherein 5. The convolutional encoding process on the transmitting side is
Punctured convolutional coding processing, wherein the Viterbi decoding means performs conversion by the data conversion means.
Depuncturing the 2k metric data
After that, each data is sequentially restored in Viterbi in units of 2 metrics.
5. The method according to claim 2, wherein
Viterbi decoding device. 6. The Viterbi decoding means comprises an integrated circuit.
The method according to any one of claims 1 to 5, wherein
A Viterbi decoder according to the above.