JP3228123B2 - Power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply for rectifying an AC voltage and converting the rectified voltage into a DC voltage.

[0002]

2. Description of the Related Art Generally, in order to rectify an AC power supply and convert it into a DC power supply, a bridge rectifier that outputs a rectified DC voltage by inputting an AC voltage is connected to an output terminal of each bridge rectifier. It is composed of a correction circuit that brings the waveform of the connected full-wave rectification closer to the DC waveform.

A circuit constituting a power supply device according to the prior art and waveforms thereof will be described with reference to FIGS.

First, a capacitor input type rectifier shown in FIGS. 16 and 17 is known as a power supply circuit according to a first prior art.

[0005] This capacitor input type rectifier circuit
A pair of input terminals of a bridge rectifier 2 is connected to both ends of a commercial power supply 1 having a commercial frequency (for example, 50 Hz).
A smoothing capacitor 3 is connected to a pair of output terminals of the bridge rectifier 2.

However, in this capacitor input type rectifier circuit, waveforms such as the input voltage and the input current to the capacitor 3 shown in FIG. 17 are obtained, and the charging / discharging of the smoothing capacitor 3 causes conduction near the peak value of the input voltage. The current flows as an angle, and this portion contains higher-order harmonics such as the third and fifth orders, which causes a problem that the current increases.

For this reason, a second prior art is shown in FIG.
And a choke coil input type rectifier circuit shown in FIG.

In this choke coil input type rectifier circuit, a smoothing capacitor 3 is connected to a pair of DC terminals of a bridge rectifier 2, and a choke coil is connected between a high voltage side of the smoothing capacitor 3 and an output terminal of the bridge rectifier. 4 are connected.

In the choke coil input type rectifier circuit, waveforms such as an input voltage and an input current to the capacitor 3 shown in FIG. 19 are obtained. When the choke coil 4 is connected, the impedance component of the choke coil 4 is changed. Thus, the charging current to the smoothing capacitor 3 is limited, the conduction angle is widened, the peak of the current is suppressed, and harmonics can be reduced. However, in order to greatly suppress the generation of harmonics, the inductance of the choke coil 4 needs to be set to a considerably large value, and there is a problem in size and weight.

Therefore, as a third prior art, a boost type active filter circuit shown in FIGS. 20 and 21 is known.

In this step-up active filter circuit, a coil 5 is connected between the input side of the bridge rectifier 2 and the commercial power supply 1 and a capacitor 6 is connected between a pair of input terminals of the bridge rectifier 2. And the capacitor 6
The coil 5 forms an L-type low-pass filter circuit. On the other hand, on the output side of the bridge rectifier 2, a transistor 7 serving as a switching element, a series circuit including a diode 8 and a smoothing capacitor 3 connected between an emitter and a collector of the transistor 7, and a collector of the transistor 7 And a choke coil 4 connected between the output terminal of the bridge rectifier 2 and the choke coil 4.
The switching operation of the transistor 7 is controlled as a step-up chopper converter.

In this boost type active filter circuit, waveforms such as the input voltage and the input current to the capacitor 3 shown in FIG. 21 are obtained, and the smoothing capacitor 3, the diode 8, the choke coil 4, and the transistor 7 provide the input voltage. The current value can be controlled in the entire period, and harmonics can be suppressed to increase the power factor.

[0013]

By the way, in each of the above-mentioned prior arts, the boost type active filter circuit according to the third prior art can make the input current close to a sine wave to suppress a harmonic. However, the output voltage of this boost type active filter circuit is high, which requires redesign of the converter on the load side, and the voltage value is higher than other circuits, requiring switching elements and capacitors with high withstand voltage. The problem is that the cost increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and an object of the present invention is to provide a power supply device capable of converting an AC voltage into a DC voltage with suppressed harmonic components.

[0015]

[0016]

[0017]

[Means for Solving the Problems ] To solve the above-mentioned problems.
For, the power supply device according to a first aspect of the present invention, the bridge rectifier outputs a DC voltage rectified by an AC voltage is applied to the load side, a switching element coils, the low voltage side to the high voltage side A series circuit in which a coil, a smoothing capacitor, and a switching element are connected in series between output terminals of the bridge rectifier, and a control signal of a pulse waveform applied to the switching element of the series circuit is a pulse width having a fixed frequency. A control circuit for controlling by modulation; a first current detection resistor connected between the bridge rectifier and a low voltage side of the series circuit for detecting a current output from the bridge rectifier; Connected between the first side and the second side for detecting a current flowing through the load.
And a first reference voltage for setting a first reference voltage based on a detection signal detected by the second current detection resistor and a detection signal detected by the first current detection resistor. A setting circuit, a second reference voltage setting circuit for setting a second reference voltage based on a detection signal detected by the second current detection resistor, and a detection signal detected by the first current detection resistor And a comparison circuit receiving an input of the first reference voltage set by the first reference voltage setting circuit and outputting a comparison signal to the control circuit, wherein the control circuit generates a basic triangular wave A triangular wave generator compares a basic triangular wave output from the triangular wave generator with a second reference voltage set by a second reference voltage setting circuit, thereby providing a pulse set by the second reference voltage. A reference pulse width modulation circuit that outputs a reference pulse having a width, a reference pulse width modulation circuit and a comparison signal that is connected to the output side of the comparison circuit, and a comparison signal output from the comparison circuit and a comparison signal output from the reference pulse width modulation circuit. And a control signal output circuit for outputting a control signal set by a reference pulse to the switching element.

With the above configuration, in the first reference voltage setting circuit, the current output from the bridge rectifier is detected as a detection signal by the first current detection resistor, and the current flowing through the load is detected by the second current detection resistor. These signals are detected as signals, and a first reference voltage is set based on these detection signals. In the second reference voltage setting circuit, the current flowing through the load is detected as a detection signal by the second current detection resistor, and the second reference voltage is set based on the detection signal. When the rectified waveform output from the bridge rectifier is higher than the voltage between both ends of the smoothing capacitor, it is a period during which the smoothing capacitor is being charged. A comparison signal set according to the first reference voltage is output. On the other hand, the reference pulse width modulation circuit uses the basic triangular wave output from the triangular wave generator and the second triangular wave.
And a reference pulse set by the reference voltage. The control signal output circuit outputs a pulse wave control signal to the switching element based on the comparison signal output from the comparison circuit and the reference pulse output from the reference pulse width modulation circuit. Thereby, the charging current when charging the smoothing capacitor, that is, the peak value at the time of rising of the input current is regulated, and the conduction angle is determined. Further, when the load fluctuates, the fluctuation is
The current is detected by the current detection resistor of
The second reference voltage and the second reference voltage are reset, and a control signal is set from each of the reference voltages to set a peak value and a conduction angle at the rising of the input current with respect to a load change.

According to a second aspect of the present invention, the control signal output circuit is configured to output the control signal when any one of the comparison signal output from the comparison circuit and the reference pulse output from the reference pulse width modulation circuit is input. Is configured from an OR circuit that allows the output of.

With the above configuration, the OR circuit outputs the control signal to the switching element when one of the comparison signal and the reference pulse is ON, so that the smoothing capacitor is formed by the rectified waveform output from the bridge rectifier. In the charging period, the switching element performs the switching operation by the reference pulse, regulates the peak value at the time of rising of the input current, and sets the conduction angle.

According to a third aspect of the present invention, a filter capacitor is connected to both ends of the series circuit.

According to the above configuration, a control signal is output from the control signal output circuit to the switching element, and the charging current (input current) to the smoothing capacitor is turned on / off by a reference pulse by the control signal. Smooth the current.

According to a fourth aspect of the present invention, a diode is connected in parallel to the coil and the smoothing capacitor constituting the series circuit.

With the above configuration, when the switching element is opened, a closed circuit is formed by the coil, the smoothing capacitor, and the diode, thereby preventing the energy stored at both ends of the coil from being applied to the switching element. The switching element is protected, and the energy of the coil is regenerated to the smoothing capacitor to reduce energy consumption.

[0025]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

In the embodiment, the same components as those of the above-described prior art are denoted by the same reference numerals, and description thereof will be omitted.

First, a first embodiment will be described with reference to FIGS. 1 to 7. FIG. 1 shows an outline of this embodiment, and FIG. 2 shows an actual circuit diagram.

In FIG. 1, reference numeral 11 denotes a series circuit connected between output terminals of the bridge rectifier 2. The series circuit 11 includes a coil 12, a smoothing capacitor 13, and a field effect transistor serving as a switching element from the high voltage side. 14 (hereinafter,
FET 14) are sequentially connected in series.
The output terminal of the PWM IC 23 described later is connected to the gate terminal 4.

Numeral 15 denotes a diode connected in parallel with the coil 12 and the smoothing capacitor 13 located on the high voltage side of the series circuit 11. The diode 15 is connected so that the high voltage side becomes the anode side, and the FET 14 is opened. The diode 15, the coil 12, the smoothing capacitor 1
3 constitutes a closed circuit to prevent the energy stored in the coil 12 from being directly applied to the FET 14,
This is to protect the ET14.

Numeral 16 denotes a filter capacitor connected in parallel with the series circuit 11.
Constitutes a low-pass filter together with a choke coil 38 described later connected between the commercial power supply 1 and the bridge rectifier 2, and smoothes the current i flowing through the FET 14 as shown in the fifth and sixth stages in FIG. To form a waveform like the input current I.

Reference numeral 17 denotes a circuit between the output terminals of the bridge rectifier 2.
DC-D serving as a load connected in parallel with the series circuit 11
The DC-DC converter 17 includes a primary winding of a transformer 18 and a switching transistor 19 connected in series. Diodes 20 and 20 and a choke coil 21 are connected to the secondary winding of the transformer 18. And a smoothing capacitor 22, and a driven part (not shown) is connected to the output side, and a DC voltage with suppressed pulsation is applied to the driven part. In the DC-DC converter 17 in FIG. 2, the secondary side of the transformer 18 is omitted.

Reference numeral 23 denotes a pulse width modulation IC (hereinafter referred to as PWM).
The PWM IC 23 has a frequency f
A triangular wave generator 24 that outputs a basic triangular wave VA of 0 (for example, 50 to 100 kHz), the triangular wave generator 24 is connected to an inverting input terminal, and a second inverting input terminal described later is connected to a non-inverting input terminal.
And a PWM comparator 25 for generating a reference pulse VB whose pulse width is modulated by the input basic triangular wave VA and the second reference voltage V2, one input terminal of which is connected to the PWM comparator 25 and the other of which is connected to the other. And an OR circuit 26 as a control signal output circuit whose output terminal is connected to a comparison circuit 29 connected to the outside and an output terminal is connected to the gate terminal of the FET 14. Further, in this embodiment, TL494 manufactured by Texas Instruments is used, and FIG. 3 shows the configuration of the TL494. The TL494 includes a reference voltage generator, an oscillator,
It is composed of a pause period adjustment unit, two error amplifiers, a PWM comparator, an output unit, and the like.

The OR circuit 26 turns ON / OFF the FET 14 according to the input reference pulse VB from the PWM comparator 25 and the comparison signal VC from the comparison circuit 29.
A control signal VD having a pulse waveform for performing the OFF control is formed.

The PWM comparator 25 is configured as a reference pulse width modulation circuit, and the pulse width of the reference pulse VB of the PWM comparator 25 is the same as the basic triangular wave VA.
And a second reference voltage V2 serving as a threshold level. For example, as shown in FIG. 4, when the second reference voltage V2 has a high voltage value, the waveform has a long pulse width like the reference pulse VB in the middle stage, and when the second reference voltage V2 'has a low voltage value, , The waveform has a short pulse width like the reference pulse VB 'shown in the lower part. In this modulation method, the basic triangular wave V
The frequency f of A becomes the frequency of the reference pulse VB and the frequency f
Is fixed.

Reference numeral 27 denotes a current detection resistor having a resistance value R1. The current detection resistor 27 is connected between the output terminal of the bridge rectifier 2 and the low voltage side of the series circuit 11, and as shown in FIG. The value of the current flowing through the detection resistor 27 is represented by a resistance voltage V
Detected as R1.

A first power supply 28 has a first reference voltage V 1 and is connected to an inverting input terminal of a comparison circuit 29.

Reference numeral 29 denotes a comparison circuit provided outside the PWM IC 23. The non-inversion input terminal of the comparison circuit 29 is connected between the first power supply 28, the current detection resistor 27, and the bridge rectifier 2, and The input terminal is connected to the ground, and the output terminal is connected to the other input terminal of the OR circuit 26.

Reference numeral 30 denotes a second power supply. The second power supply 30 has a second reference voltage V2 and is connected to a non-inverting input terminal of the PWM comparator 25.

FIG. 2 shows a specific example of the configuration of the comparison circuit 29.
1, an input resistor 32 connected to a non-inverting input terminal of the OP amplifier 31, a negative feedback resistor 33 connected between an output terminal and a non-inverting input terminal of the OP amplifier 31, and an input resistor 32 34, 35 connected in parallel to the input side of
One resistor 34 is connected to the ground via the first power supply 28, and the other resistor 35 is connected to the current detection resistor 27.
And the output terminal of the bridge rectifier 2. The inverting input terminal of the OP amplifier 31 is connected to the minus power supply terminal of the OP amplifier 31 and the output side of the current detection resistor 27, and 0 V is applied to the inverting input terminal.

As shown in FIG. 6, a non-inverting input terminal of the OP amplifier 31 is connected to a first reference voltage output from the first power supply 28 to the resistance voltage VR1 detected by the current detection resistor 27. The middle detection voltage VE added by the voltage V1 and the voltage ΔV set by the resistance values of the resistors 34 and 35.
Is entered. Further, the output voltage VC of the OP amplifier 31
And the voltage .DELTA.V0 set by the resistors 32 and 33. Apparently, when the output voltage VC of the OP amplifier 31 is the DC power supply VCC, -ΔV
When the input current rises, that is, when the resistance voltage VR1 detected by the current detection resistor 27 falls, the sum of the voltage ΔV and the voltage ΔV0 becomes the detection voltage. On the other hand, when the input current falls, the OP amplifier 3
Since the output voltage VC of 1 is 0 V, the voltage .DELTA.V0 becomes 0 V, and the detection voltage VE at this time becomes .DELTA.V. As a result, a pulse signal serving as the lower comparison signal VC can be obtained, and the comparison signal VC is turned on when the FET 14 is turned on.
A time tA and a switching time tB at which the FET 14 repeatedly performs a switching operation are set.

The resistor 36 in FIG. 2 is a PWM IC 2
3 and a capacitor 37 are connected to the fifth pin, respectively.
The frequency of the triangular wave generator 24 is set by the capacitance 7.

Further, a choke coil 38 may be connected between the commercial power supply 1 and the bridge rectifier 2, and a capacitor 39 may be connected between the input terminals of the bridge rectifier 2.

On the other hand, the eighth pin of the PWM IC 23 and the FE
A resistor 40A is connected to the gate of T14, and a resistor 40B is connected between the C connection point between the resistor 40A and the twelfth pin and the DC power supply VCC. A DC voltage from a separate DC power supply VCC is applied to the twelfth pin of the PWM IC 23 and the resistor 40B.

The power supply device according to the present embodiment is configured as described above. Next, the operation will be described with reference to FIGS.

First, as shown in the upper part of FIG. 5, an input voltage V of 50 Hz is input from the commercial power supply 1, and a DC-DC
After full-wave rectification, the converter 17 receives an output voltage V0 shown in the middle stage by the smoothing capacitor 13 and the filter capacitor 16. At this time, in the present embodiment, since the load on the DC-DC converter 17 is constant, it is possible to obtain the input current I in which the peak value at the time of rising is suppressed as shown in the lower part by the control described later.

Since the present device is configured as a capacitor input type rectifier circuit, when the voltage across the smoothing capacitor 13 is higher than the rectified output voltage Vi, the DC-D
The smoothing capacitor 13 discharges and supplies electric charge to the C converter 17. On the other hand, when the output voltage V0 is
3 becomes higher than the voltage across the smoothing capacitor 13.
Start charging. The time required for charging the smoothing capacitor 13 generally corresponds to the conduction angle.

When the switching transistor 19 of the DC-DC converter 17 is turned on, charge is supplied from the filter capacitor 16 and the output voltage V0 to the DC-DC converter 17, and when the transistor 19 is turned off, the filter capacitor 16 is turned on. Is charged by the output voltage V0. On the other hand, simultaneously with this operation, when the FET 14 is turned on, the filter capacitor 16 and the output voltage V0
Thereby, the smoothing capacitor 13 is charged.

When the FET 14 is turned off, the diode 15, the coil 12, the smoothing capacitor 13
By charging the energy stored in the coil 12 to the smoothing capacitor 13, the energy stored in the coil 12 is prevented from being applied to the FET 14, and the FET 14 is protected. The energy stored in the coil 12 can be charged in the smoothing capacitor 13 and energy can be wasted.

Next, the setting of the comparison signal VC will be described. As shown in FIG. 6, the current detection resistor 27 detects the current output from the bridge rectifier 2 as a resistance voltage VR1 (upper stage), and detects the detected resistance voltage VR1. To the first reference voltage V1
ΔV set by the resistors 34 and 35, and the output voltage VC of the OP amplifier 31 and the voltage ΔV0 set by the resistors 32 and 33 are added to obtain a detection voltage VE (middle stage).
The detection voltage VE is input to the non-inverting input terminal of the OP amplifier 31. Then, the OP amplifier 31 compares the detection voltage VE with 0 V to set a comparison signal VC (lower stage), and inputs the comparison signal VC to the fourth pin of the PWM IC 23.
Further, the comparison signal VC sets the switching time tB which is the output range of the control signal VD output to the gate of the FET 14.

Further, since the control signal VD also sets the start of the switching time tB, it is possible to regulate the peak value of the input current I when it rises. That is,
When the input voltage V becomes higher than the voltage on both ends of the smoothing capacitor 13, a charging current is generated to charge the smoothing capacitor 13. While the input current is being generated, the FET 14 is repeatedly turned on / off to reduce the peak value of the charging current. Then, the start of the switching time tB is caused by the input voltage V exceeding the voltage between both ends of the smoothing capacitor 13 and the input current starts to flow. The peak value at the time of rising can be determined. As described above, the peak value at the time of rising of the input current can be controlled by the control signal VD.

On the other hand, in the PWM comparator 25 in the PWM IC 23, the basic triangular wave VA whose frequency is set by the resistor 34 and the capacitor 37 and the second
A reference pulse VB having a predetermined duty ratio is formed by the second reference voltage V2 output from the power supply 30 of FIG.
When the value of the second reference voltage V2 is increased, the reference pulse VB
Becomes longer, and when the second reference voltage V2 is made lower, the pulse width of the reference pulse VB becomes shorter.

In the OR circuit 26, the control signal VD (fourth stage) is set by the input reference pulse VB (third stage in FIG. 7) and the comparison signal VC (second stage). VD is output to the gate of FET14.

Here, when a charging current flows through the smoothing capacitor 13, energy is accumulated, and the voltage between the terminals of the smoothing capacitor 13 increases. When the pulse width of the reference pulse VB is long, the peak value of the charging current increases, and the energy charged in the smoothing capacitor 13 per pulse increases, and the energy increases the voltage between terminals of the smoothing capacitor 13. Let it. As described above, the voltage between the terminals of the smoothing capacitor 13 is increased for each pulse. As the difference between the output voltage V0 and the terminal voltage of the smoothing capacitor 13 decreases, the peak value of the charging current decreases, and as a result, the input current also decreases. Become. Therefore, the switching operation is completed when the detection voltage VE changed by the input current becomes 0V.

When the pulse width of the reference pulse VB is short, the peak value of the charging current is low, and the energy charged in the smoothing capacitor 13 per pulse is small, and
The time required for the voltage between the terminals of the smoothing capacitor 13 to rise little at each pulse and for the voltage between the terminals of the smoothing capacitor 13 to become equal to the input voltage V is longer than when the pulse width of the reference pulse VB is longer. It costs. Therefore, the conduction angle t0 by the reference voltage V2 is set by the pulse width of the reference pulse VB.

Although the intermittent current i flows between the drain and the source of the FET 14 as shown in the fifth stage in FIG. 7, the low-pass filter is formed by the coil 38 located on the input side and the filter capacitor 16 connected to the subsequent stage. , The input current I having a substantially trapezoidal shape averaged by the low-pass filter can be obtained, and the peak value of the input current I at the time of rising can be regulated.

Thus, in this embodiment, by controlling the FET 14 in the range of the conduction angle t0 by using the PWM control, it is possible to prevent the occurrence of the peak value at the beginning of the flow of the input current I and to use the capacitor input type. Compared to the rectifier circuit, the peak value of the input current I at the time of rising can be kept low, the whole waveform can be made substantially trapezoidal, the harmonics can be suppressed and the power factor can be increased, A power supply device can be configured.

Therefore, the output voltage V0 is not boosted even for the booster type active filter circuit, and it is not necessary to use components having a high withstand voltage, and the components can be composed of general-purpose components, thereby reducing the cost. Can be.

FIGS. 8 to 15 show a second embodiment according to the present invention. The feature of this embodiment is that a current applied to the load is applied between the load and the low voltage side of the series circuit. Is connected, and a first reference voltage and a second reference voltage are set by a signal from the current detection resistor so that the input current can follow a load change.

In this embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. FIG. 8 shows an outline of the present embodiment, and FIG. 9 shows an actual circuit diagram. Further, the current detection resistor 27 described in the first embodiment becomes the first current detection resistor 27 in the present embodiment.

In FIG. 8, reference numeral 41 denotes a second current detecting resistor having a resistance value R 2, and the second current detecting resistor 41 is connected between the low voltage side of the series circuit 11 and the DC-DC converter 17. Have been.

Reference numeral 42 denotes an integrating circuit. The integrating circuit 42 connects and connects a resistor 43 and a capacitor 44 in an L-shape.
And outputs an integrated signal Va by averaging the resistance voltage VR2 detected by the current detection resistor 41.

Reference numeral 45 denotes an amplifier circuit. The amplifier circuit 45 includes an OP amplifier 46 and an OP amplifier 4 as shown in FIG.
6, a resistor 47 connected between the inverting input terminal and ground.
And a negative feedback resistor 48 connected between the inverting input terminal and the output terminal of the OP amplifier 46. The integrating circuit 42 is connected to the non-inverting input terminal. Then, the amplification factor of the amplifier circuit 45 becomes a, and the amplified signal Vb output from the output terminal becomes as shown in Expression 1.

[0063]

Vb = a × Va

Reference numeral 49 denotes a first reference voltage setting circuit.
The reference voltage setting circuit 49 is connected to the output side of the amplifier circuit 45 and outputs the first reference voltage V1 input to the comparison circuit 29.

Reference numeral 50 denotes a second reference voltage setting circuit.
The reference voltage setting circuit 50 is connected to the output side of the amplifier circuit 45, and the second reference voltage V input to the PWM IC 23.
2 is output.

Here, the first reference voltage setting circuit 49
As shown in FIG. 9, an OP amplifier 51, an input resistor 52 connected between a non-inverting input terminal of the OP amplifier 51 and the amplifier circuit 45, a non-inverting input terminal of the OP amplifier 51 and a ground. Between the resistor 53 connected between the
A battery 55 having a voltage value Vc and a resistor 54 connected in series between the inverting input terminal of
And a negative feedback resistor 56 connected between the inverting input terminal and the output terminal. Here, the first reference voltage setting circuit 4
Assuming that the voltage output from 9 is the first reference voltage V1, the first reference voltage V1 by the first reference voltage setting circuit 49 can be set as in the following equation (2).

[0067]

## EQU2 ## V1 = Vb-Vc = a.times.Va-Vc

The second reference voltage setting circuit 50
Are a resistor 57 having a resistance value R3 and a resistor 5 having a resistance value R4 connected in series between the amplified signal Vb and the ground.
8, a battery 59 having a voltage value Vd, a resistor 60 having a resistance value R5 and a resistor 61 having a resistance value R6 connected in series between the resistors 57 and 58 and the ground. Here, when the voltage output from the second reference voltage setting circuit 50 is a second reference voltage V2, the second reference voltage V2
2 is assumed as in Equation 3.

[0069]

V2 = c × Va−Vd where c: constant

Here, since Vb = a × Va, Equation 3
Can be transformed as shown in Equation 4.

[0071]

(Equation 4)

As a result, the second reference voltage setting circuit 50
The middle resistors 57, 58, 60, and 61 are configured such that c / (a + c) is composed of the resistors 57 and 58, and (a + c) / a is the resistance 60,
61 may be used.

The plus output terminals of the OP amplifiers 31, 46 and 51, the 12th pin of the PWM IC 23 and the resistor 40B are connected to a separate DC power supply VCC.

In the power supply device according to the present embodiment thus configured, control when the DC-DC converter 17 does not fluctuate can be performed in the same manner as in the first embodiment described above. The peak value at the time of rising can be suppressed, the harmonics can be reduced, and the DC power can be converted to a pulsation with less pulsation.

Further, in this embodiment, the DC-
The second detecting the input current I flowing to the DC converter 17
Is connected to the first reference voltage setting circuit 49 after converting the resistance voltage VR2 detected by the current detection resistor 41 into an amplified signal Vb via the integrating circuit 42 through the amplifying circuit 45. Output the first reference voltage V1 and the second reference voltage setting circuit 50 outputs the second reference voltage V2.

Here, as shown in FIGS. 10 and 11, when the DC-DC converter 17 has a certain load, the second current detection resistor 41 detects the resistance as a resistance voltage VR20 corresponding to this load. And the resistance voltage V
R20 becomes an amplified signal Vb0 via the integration circuit 42 and the amplification circuit 45.

Then, the first reference voltage V 10 set by the first reference voltage setting circuit 49 is
An integrated signal Va0 obtained by integrating the resistance voltage VR20 detected in step 1.
Is set by substituting into Equation 2. Also,
The non-inverting input terminal of the OP amplifier 31 constituting the comparison circuit 29 has a resistance voltage VR10 detected by the first current detection resistance 27, a voltage set by the first reference voltage V10 and the resistances 34 and 35. The detection voltage VE0 obtained by adding ΔV0 is input.

When the resistance voltage VR10 falls, the voltage .DELTA.V0 set by the resistors 32 and 33 is added to the output voltage VC of the OP amplifier 31 to obtain a detection voltage VE0, and this detection voltage VE0 is compared with the ground. ON
A pulse-like comparison signal VC0 corresponding to the time tA0 and the switching time tB0 is output to the fourth pin of the PWM IC 23.

On the other hand, the second reference voltage V 20 set by the second reference voltage setting circuit 50 is
Signal Va0 obtained by integrating the resistance voltage VR20 detected at
Is substituted into the above equation (3), and the second reference voltage V20 is output to the 16th pin of the PWM IC 23. In the PWM IC 23, the input second
4 shown in the first embodiment by the reference voltage V20 of FIG.
And the basic triangular wave VA and the second reference voltage V20
The WM comparator 25 outputs a reference pulse VB0 having a pulse width T10 by comparison.

Further, in the PWM IC 23, the comparison signal VC0 output from the comparison circuit 29 and the reference pulse VB0 output from the PWM comparator 25 are output to the OR circuit 2.
6 and outputs a control signal VD0 shown in the second stage of FIG. At this time, the control signal VD0 has a waveform that continuously maintains the ON state during the ON time tA0, and the switching time t
During B0, a pulse waveform that repeats ON / OFF to be in an ON state for a pulse width T10 at a frequency f0 is set.

As a result, the current i0 flowing through the FET 14
Is the waveform of the third stage in FIG. 11. By smoothing this current i0 by the filter capacitor 16, the input current I0 in the lower stage can be obtained. As a result, the first
Similarly to the first embodiment, the peak value of the input current I0 at the time of rising is suppressed low by the first reference voltage V10, and the second reference voltage V10 is used.
Can be made substantially trapezoidal by the reference pulse VB0 having the pulse width T10 set from the reference voltage V20. Thereby, harmonics can be suppressed and the power factor can be increased. Note that the conduction angle is in the range of t00 as shown in the lower part of FIG.

Next, FIGS. 12 to 16 show the case where the load of the DC-DC converter fluctuates. The state when the load becomes high will be described with reference to FIGS. 12 and 13. FIG.

First, a resistance voltage VR2H corresponding to the current flowing through the load is detected by the second current detection resistor 41, and this resistance voltage VR2H becomes an amplified signal VbH via the integration circuit 42 and the amplification circuit 45. At this time, the resistance voltage VR2
Since H becomes larger than the above-described resistance voltage VR20 with no load fluctuation, the amplified signal VbH output from the amplifier 45 is output.
Also becomes larger than the amplified signal Vb0.

Then, the first reference voltage V1H set by the first reference voltage setting circuit 49 is equal to the amplified signal V
This is calculated by substituting bH, and the first reference voltage V1H has a high voltage value. Then, the non-inverting terminal of the OP amplifier 31 constituting the comparison circuit 29 is set to the resistance voltage VR1H detected by the first current detection resistance 27 by the first reference voltage V1H and the resistances 34 and 35. Voltage ΔVH and OP
A detection signal VEH obtained by adding the voltage .DELTA.V0 set by the resistors 32 and 33 to the output voltage VC of the amplifier 31 is input. By comparing the detection signal VEH with the ground, a pulse having an ON time tAH and a switching time tBH is obtained. The comparison signal VCH is output to the fourth pin of the PWM IC 23. When the comparison signal VCH is compared with the comparison signal VC0, the ON time tAH> tA0 and the switching time tBH
<TB0.

On the other hand, the second reference voltage V 2H set by the second reference voltage setting circuit 50 is
Signal VaH obtained by integrating the resistance voltage VR2H detected in step
Is substituted into the above equation (3), and the second reference voltage V2H is output to the 16th pin of the PWM IC 23. Further, in the PWM IC 23, the basic triangular wave VA and the second reference voltage V2H are switched by the input second reference voltage V2H as shown in FIG. 4 shown in the first embodiment.
By comparing with the M comparator 25, the pulse width T
The 1H reference pulse VBH is output. Note that the pulse width T1H>
It becomes T10.

Further, in the PWM IC 23, the comparison signal VCH and the reference pulse VBH are input to the OR circuit 26, and the control signal VDH shown in the second stage of FIG. At this time, the control signal VDH is set to the ON time tAH
During the switching time tBH, the waveform becomes a pulse waveform that repeats the ON / OFF operation at the frequency f0 and the ON state for the pulse width T1H, and the waveform at the switching time tBH is , A pulse waveform in which the ON state is lengthened for each frequency f0 within a short time.

As a result, the current iH flowing through the FET 14
Is the third waveform in FIG. 13. By smoothing this current iH by the filter capacitor 16, an approximately trapezoidal input current IH having a base equal to the input current I0 and a high height is obtained. be able to. As a result, similarly to the first embodiment, the waveform of the input current IH suppresses the peak value of the input current I0 at the time of rising by the first reference voltage V1H and is set from the second reference voltage V2H. With the reference pulse VBH having the pulse width T1H, the entire waveform can be made substantially trapezoidal, harmonics can be suppressed, and the power factor can be increased. The conduction angle is t0H (t0H ≒ tBH) as shown in the lower part of FIG.

Further, the state when the load becomes low due to the fluctuation of the DC-DC converter serving as the load will be described with reference to FIGS. 14 and 15. Since substantially the same operation is performed, the description of the individual circuit operation is omitted, and only the result is described.

First, the second current detection resistor 41 detects a resistance voltage VR2L corresponding to the current flowing through the DC-DC converter 17 serving as a load, and this resistance voltage VR2L has a value lower than the resistance voltage VR20. Then, the first reference voltage V1L and the second reference voltage V1L are determined by the resistance voltage VR2L.
Since 2L is set, any value is lower than the voltage value used in the first embodiment. Therefore, the comparison circuit 2
9 and the comparison signal VC0, the ON time tAL ≒ tA0 and the switching time tBL
≒ tB0.

On the other hand, the second IC input to the PWM IC 23
4 shown in the first embodiment by the reference voltage V2L of FIG.
And the basic triangular wave VA and the second reference voltage V2L
The WM comparator 25 outputs a reference pulse VBL having a pulse width T1L by making a comparison. Note that the pulse width T1L
<T10.

Further, in the PWM IC 23, the comparison signal VCL and the reference pulse VBL are inputted to the OR circuit 26, and the control signal VDL shown in the second stage of FIG. At this time, the control signal VDL is set to the ON time tAL
During the switching time tBL, the waveform becomes a pulse waveform that repeats ON / OFF switching to the ON state during the pulse width T1L at the frequency f0, and the switching time tBL is long. Frequency f in time
It becomes a pulse wave with the ON state shortened for each 0.

Thus, the current iL flowing through the FET 14
Becomes the third waveform in FIG. 15. By smoothing this current iL with the filter capacitor 16, an input current IL having a longer trapezoid and a shorter height than the input current I0 is obtained. be able to. As a result, similarly to the first embodiment, the waveform of the input current IL can suppress the peak value of the input current I0 at the time of rising, and can have a substantially trapezoidal shape as a whole. Note that the conduction angle t0L is equal to the switching time tBL.

Thus, in the power supply device according to the present embodiment, control when the DC-DC converter 17 does not fluctuate can be performed in the same manner as in the first embodiment, and the rise of the input current I is suppressed. It is possible to reduce harmonics and convert the power supply into a DC power supply with less pulsation.

In addition, the load (DC-DC converter 1
Following the fluctuation of 7), the ON time tA and the switching time tB of the control signal VD are set, and the pulse width T1 of the pulse waveform output at the switching time tB is set. As shown by the input current I0, the input current IH in FIG. 13, and the input current IL in FIG. 15, each of them can have a substantially trapezoidal waveform, and the harmonics can be reduced without fail.

As a result, in the power supply according to the present embodiment,
Even when the load fluctuates, the waveform of the input current I can be deformed correspondingly, and the peak value at the rising of the input current I is suppressed to form a substantially trapezoidal waveform. And a power supply device with an increased power factor can be provided.

In each of the above embodiments, the control circuit is connected to the PW
Although configured by the IC 23 for M, the present invention is not limited to this, and may be configured as a logic circuit or an electronic component.

In each of the above embodiments, the PWM IC 2
Although the control signal output circuit built in 3 is configured as the OR circuit 26, it may be formed by a plurality of logic circuits so as to configure the OR circuit.

[0098]

[0099]

As described above in detail , according to the first aspect of the present invention, the first reference voltage setting circuit detects the current output from the bridge rectifier as a detection signal with the first current detection resistor. The current flowing through the load is detected by the second current detection resistor as a detection signal, and the first reference voltage is set based on these detection signals. In the second reference voltage setting circuit, the current flowing through the load is detected as a detection signal by the second current detection resistor, and the first reference voltage is set based on the detection signal. Then, during a period in which the capacitor is charged by the rectified waveform output from the bridge rectifier, the comparison circuit outputs a comparison signal based on the detection signal detected by the first current detection resistor and the first reference voltage. The reference pulse width modulation circuit generates a reference pulse set by the basic triangular wave output from the triangular wave generator and the second reference voltage. The control signal output circuit outputs a pulse wave control signal to the switching element based on the comparison signal output from the comparison circuit and the reference pulse output from the reference pulse width modulation circuit. This makes it possible to suppress the peak value at the time of the rising of the input current when the capacitor is charged, set the conduction angle, suppress the harmonics, and correct the power factor. When the load fluctuates, the fluctuation is detected by a second current detection resistor, and the first reference voltage and the second reference voltage are reset by the detection signal, and a control signal is set from each of the reference voltages. As a result, it is possible to follow the load fluctuation, suppress the peak value at the time of the rising of the input current, suppress the harmonics, and increase the power factor.

According to the second aspect of the present invention, the control signal output circuit is constituted by an OR circuit, and the control signal is output to the switching element when one of the comparison signal and the reference pulse is ON. During the period when the capacitor is charged by the rectified waveform output from the bridge rectifier, the switching element performs switching operation by the reference pulse, regulates the peak value at the time of the rising of the input current, sets the conduction angle, and controls the harmonic. Suppress and increase power factor.

According to the third aspect of the present invention, by connecting a filter capacitor to both ends of the series circuit, a control signal is output from the control signal output circuit to the switching element, and when the switching element is turned on / off, smoothing is performed. The waveform of the capacitor is smoothed by smoothing the charging current.

According to the fourth aspect of the present invention, a diode is connected in parallel to the coil and the smoothing capacitor constituting the series circuit, so that when the switching element is opened, a closed circuit is formed by the coil, the smoothing capacitor and the diode. When the switching element is closed, the energy stored in the coil is prevented from flowing to the switching element at the same time, and the smoothing capacitor can be charged via the diode, thereby protecting the switching element and reducing energy consumption. can do.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a power supply device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a power supply device according to a first embodiment.

FIG. 3 is a configuration diagram of a PWM IC used in the first embodiment.

FIG. 4 is a waveform diagram showing a basic triangular wave VA and reference pulses VB and VB '.

FIG. 5 is a waveform diagram showing an input voltage V, an output voltage V0, and an input current I.

FIG. 6 shows a resistance voltage VR1, a detection voltage VE, and a comparison signal V
FIG. 6 is a waveform chart showing C.

FIG. 7 shows an output voltage V0, a comparison signal VC, and a reference pulse VB.
, Control signal VD, current i flowing through the FET, and input current I. FIG.

FIG. 8 is a schematic diagram illustrating a power supply device according to a second embodiment of the present invention.

FIG. 9 is a circuit diagram showing a power supply device according to a second embodiment.

FIG. 10 is a waveform diagram showing a resistance voltage VR10, a detection voltage VE0, and a comparison signal VC0 when there is no load fluctuation.

FIG. 11 is a waveform diagram showing an output voltage V0, a control signal VD0, a current i0 flowing through the FET, and an input current I0 when there is no load fluctuation.

FIG. 12 shows the resistance voltage VR1H when the load increases,
FIG. 7 is a waveform diagram showing a detection voltage VEH and a comparison signal VCH.

FIG. 13 shows an output voltage V0, a control signal VDH, a current iH flowing through the FET, and an input current I when the load increases.
FIG. 6 is a waveform chart showing H.

FIG. 14 shows the resistance voltage VR1L when the load is reduced,
FIG. 4 is a waveform diagram showing a detection voltage VEL and a comparison signal VCL.

FIG. 15 shows output voltage V0, control signal VDL, current iL flowing through FET, and input current I when the load is reduced.
FIG. 6 is a waveform chart showing L.

FIG. 16 is a circuit diagram of a capacitor input type rectifier circuit according to a first conventional technique.

FIG. 17 is a waveform chart showing an input voltage and an input current by a capacitor input type rectifier circuit.

FIG. 18 is a circuit diagram of a choke coil input type rectifier circuit according to a second related art.

FIG. 19 is a waveform diagram showing an input voltage and an input current by a choke coil input type rectifier circuit.

FIG. 20 is a circuit diagram of a booster active filter circuit according to a third conventional technique.

FIG. 21 is a waveform chart showing an input voltage and an input current by a boost type active filter circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Commercial power supply 2 Bridge rectifier 11 Series circuit 12 Coil 13 Smoothing capacitor 14 Field effect transistor (switching element) 16 Filter capacitor 17 DC-DC converter (load) 23 PWM IC (control circuit) 24 Triangular wave generator 25 PWM comparator ( Reference pulse width modulation circuit) 26 OR circuit (control signal output circuit) 27 Current detection resistor (first current detection resistor) 28 First power supply 29 Comparison circuit 30 Second power supply 41 Second current detection resistor 42 Integrator circuit 49 first reference voltage setting circuit 50 second reference voltage setting circuit

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H02M 7/217 H02M 3/155 H03K 17/00

Claims (4)

(57) [Claims] 1. A bridge rectifier that outputs a rectified DC voltage to a load side by applying an AC voltage,
A series circuit in which a coil, a smoothing capacitor, and a switching element are connected in series between output terminals of the bridge rectifier so as to be a coil on a high voltage side and a switching element on a low voltage side, and are applied to switching elements of the series circuit. A control circuit that controls a control signal of a pulse waveform to be performed by pulse width modulation having a fixed frequency, and a control circuit that is connected between the bridge rectifier and a low voltage side of a series circuit and detects a current output from the bridge rectifier. A current detection resistor of 1;
A second current detection resistor connected between the load and the low voltage side of the series circuit for detecting a current flowing through the load, a detection signal detected by the second current detection resistor, and the first current A first reference voltage setting circuit that sets a first reference voltage based on the detection signal detected by the detection resistor;
A second reference voltage setting circuit for setting a second reference voltage based on a detection signal detected by the second current detection resistor; a detection signal detected by the first current detection resistor; A comparison circuit that receives an input of the first reference voltage set by the reference voltage setting circuit and outputs a comparison signal to the control circuit, wherein the control circuit includes:
By comparing a triangular wave generator for generating a basic triangular wave with a basic triangular wave output from the triangular wave generator and a second reference voltage set by a second reference voltage setting circuit, the second reference voltage A reference pulse width modulation circuit for outputting a reference pulse having a set pulse width; a reference pulse width modulation circuit connected to the output side of the reference pulse width modulation circuit and the comparison circuit; And a control signal output circuit that outputs a control signal set by a reference pulse output from the circuit to the switching element. 2. The control signal output circuit outputs a control signal when any one of a comparison signal output from a comparison circuit and a reference pulse output from a reference pulse width modulation circuit is input. 2. The power supply device according to claim 1 , wherein the power supply device is constituted by a logical OR circuit. 3. The power supply device according to claim 1 , wherein a filter capacitor is connected to both ends of the series circuit. 4. The power supply of claim 1 formed by connecting the diode in parallel with the coil and a smoothing capacitor which constitute a series circuit, 2 or 3 wherein.