JP3222490B2 - POWER CONVERTER AND CONTROL METHOD THEREOF - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a large-capacity power converter for supplying power of a variable voltage and variable frequency to a load such as an AC motor and a control method thereof.

[0002]

2. Description of the Related Art In recent years, large-capacity self-extinguishing devices (eg, gate turn-off thyristors) have been actively developed, and have been used in power converters such as inverters. In particular, a pulse width modulation control inverter (PWM)
An inverter is referred to as an inverter) because it can obtain a sine wave output with a variable voltage and a variable frequency, and thus has been widely used as a drive power source for an AC motor.

[0003] Further, as the capacity of AC motors increases, high-voltage and large-current inverters are required, and large-capacity inverters in which elements are connected in series and parallel or large-capacity inverters multiplexed by an output transformer are proposed. ing.

[0004] Further, a neutral point clamp type inverter capable of obtaining three levels (+, 0,-) of output voltage has also been proposed, and has attracted attention as an effective device for reducing load current ripple and increasing DC voltage. Have been.

FIG. 6 shows a configuration of a conventional power converter, in which two neutral point clamp type inverters (NPC inverters) are multiplex-connected by an output transformer.
The figure shows one output phase (U phase). In the case of a three-phase output, the other two phases (V phase, W phase) are similarly configured.

In the figure, V _d1 and V _d2 are DC voltage sources, NPC-
1, NPC-2 are first and second NPC inverters connected in full bridge, TR1 and TR2 are output transformers, LOAD is an AC load (for U phase), and L _U ,
R _U and V _CU represent the inductance, resistance and reverse starting force of the load, respectively.

A first NPC inverter NPC-1 is self-turn-off devices (e.g. GTO, _{etc.) S 11 ~S 14, S 21} ~S 24 and the free wheeling diode _{D 11 ~D 14, D 21 ~D} 24 and clamp And the output terminal thereof is connected to _one of the output transformers TR ₁ , D ₁₅ , D ₁₆ , D ₂₅ , and D _26.
It is connected to the next winding. Also, the second NPC inverter NPC-2 are similarly configured, its output terminal is connected to the primary winding of the output transformer TR _2. The secondary sides of the two output transformers are connected in series, and the sum of the output voltages is applied to the load.

FIGS. 7 and 8 are time charts for explaining the PWM control operation of the NPC inverter of the apparatus shown in FIG. The PWM control operation of the first NPC inverter will be described with reference to FIG.

[0009] In the figure, e _i is the PWM control input signal, X _1,
X ₂ , Y ₁ and Y ₂ are carrier signals for PWM control. Signals X ₁ and X ₂ are triangular waves that change between 0 and + E _max , signals Y ₁ and Y ₂ are triangular waves that change between 0 and −E _max , and X ₂ is 180 ° out of phase with X _1. Yes, Y ₁
Is in phase with X ₁ and Y ₂ is in phase with X ₂ .

By comparing the input signal e _i with the triangular wave X ₁ ,
Making the gate signal g ₁₁ of element S ₁₁ and S _13. Further, the input signal e _i is compared with the triangular wave Y ₁ to generate a gate signal g ₁₂ for the elements S ₁₂ and S ₁₄ . That is, when the e _i> X _1, in g ₁₁ = 1, S _11: When: (Off _{S 13) e i ≦ X 1} , in g ₁₁ = 0, S _11: On Off (S _13: On) When e _i <Y ₁ , g ₁₂ = 1 and S ₁₄ : on (S ₁₂ : off) When e _i ≧ Y ₁ , g ₁₂ = 0 and S ₁₄ : off (S ₁₂ : on) .

Further, by comparing the input signal e _i and the triangular wave X _2, making the gate signal g ₂₁ of element S _22, S _24. Also,
The input signal e _i is compared with the triangular wave Y _2, and the elements S ₂₁ and S ₂₃ are compared.
Make of the gate signal g _22. That is, when the e _i> X _2, in g ₂₁ = 1, S _24: On (S _22: Off) when e _i ≦ X _2, in g ₂₁ = 0, S _24: Off (S _22: On) when e _i <Y _2, in g ₂₂ = 1, S _21: on (S _23: off) when e _i ≧ Y _2, in g ₂₂ = 0, S _21: a: (on S ₂₃₎ off .

[0012] Voltage V _a of a point of the NPC inverter NPC-1 is turned on element S ₁₁ to S _14, the OFF operation is as follows. However, the full voltage of the DC power supply and V _d,
It is assumed that V _d1 = V _d2 = V _d / 2. That is, when S ₁₁ and S ₁₂ is on, when _{V a = + V d / 2} S 12 and S ₁₃ is on, when V _a = 0 S ₁₃ and S ₁₄ is on, V _a = -V _d = / 2, and an output voltage of three levels (three stages) is obtained.

Further, the voltage V _b of the point b, the element S ₂₁ to S ₂₄
Is turned on and off as follows. That is, when S ₂₁ and S ₂₂ is on, when _{V b = + V d / 2} S 22 and S ₂₃ is on, when V _b = 0 S ₂₃ and S ₂₄ is on, V _b = -V _d = / 2, so that an output voltage of three levels (three stages) is obtained.

The output transformer TR ₁ has a voltage V _{a at} a point _a.
And a voltage difference between the voltage Vb at point _b is applied. FIG.
Shows the voltage V _a of a point, the inverted value -V _b and the difference voltage V _a -V _b of the waveform of the voltage at point b. Voltage applied to the transformer TR ₁ is _{(+ V d, + V d} / 2,0, -V d / 2, -
V _d ) at five levels (five levels), and the equivalent carrier frequency is twice the frequency of the triangular wave X ₁ .

[0015] the second NPC inverter NPC-2 similarly PWM control, the voltage of 5 level is applied to the output transformer TR _2. By providing the carrier signal of the second NPC inverter with a phase shift of 90 ° with respect to the carrier signal of the first NPC inverter, multiplexing of two inverters can be achieved. AC load LOAD sum of secondary voltages of the two transformers is applied to its voltage becomes a voltage waveform of 7 levels (7 levels), the equivalent carrier frequency is 4 times the frequency of the triangular wave X _1.

As described above, the conventional power converter using the NPC inverter can increase the equivalent carrier frequency of the output voltage by multiplexing via the output transformer, and can reduce the variable voltage variable frequency having a small harmonic component. Has the advantage that a sinusoidal current can be supplied to the load. In addition, the voltage of the DC power supply is doubled and the output voltage per unit is also increased, and the number of output transformers is reduced by half, as compared to a power converter that multiplexes ordinary bridged inverters. It has features such as being able to.

[0017]

However, this conventional power converter has the following problems.

That is, when the input signal e _i of the PWM control becomes small, the output voltage of the NPC inverter becomes a constant value with a pulse width determined by the minimum on-time of the element, and is not proportional to the input signal e _i . Therefore, in a region where the input signal e _i is small, it is impossible to control the load current to match the command value.

FIG. 8 is another time chart for explaining the PWM control operation of the conventional power converter, showing the operation when the input signal e _i becomes small. The symbols in the figure are the same as the symbols in FIG.

When the input signal e _i decreases, the gate signals g ₁₁ and N _{11 of} the NPC inverters NPC-1 and NPC-2 decrease.
As shown in FIG. 8, the pulse widths of g ₁₂ and g ₂₁ g ₂₂ become narrower.

On the other hand, a self-extinguishing element (for example, a gate turn-off thyristor: GTO) constituting an inverter is:
Once the element is turned on to protect the element or to initialize (discharge ) the capacitor of the snubber circuit connected in parallel to the element, it will be on for a certain period of time (called the minimum on-time) Need to be maintained.

Therefore, when the minimum on-time of the element is Δt, the gate signals g ₁₁ , g ₁₂ , g ₂₁ , and g ₂₂ have a constant pulse width as shown by broken lines. That is, regardless of the value of the input signal e _i , the output voltages V _a ,
The pulse width of the V _b becomes constant, the voltage V _a -V _b is applied to the transformer TR ₁ becomes a constant value. When the input signal e _i is smaller positive, the output voltage V _a -V _b positive constant value, when e _i is smaller in negative, the output voltage V _a
-V _b is a negative constant value. As a result, even if the input signal e _i changes so as to control the load current, an output voltage proportional to the input signal e _i cannot be obtained, and control becomes impossible. Therefore, not only cannot the load current follow the command value to be controlled, but also, when the output frequency is low, the constant pulse train is integrated, resulting in an excessive current, which may destroy the element.

The present invention supplies a sine wave current having a variable voltage and a variable frequency to a load without utilizing the characteristics of a neutral point clamp type inverter (NPC inverter) and without becoming uncontrollable even when the input signal becomes small. It is an object of the present invention to provide a power conversion device and a control method thereof.

[0024]

In order to achieve the above object, a power converter according to the present invention comprises two DC power supplies V _d1 and V _d2 connected in series and two DC power supplies each having a voltage. 2n (n is an integer) full-bridge inverters (referred to as FB inverters) serving as power sources, and a neutral-point-clamped inverter (NPC
Inverters), 2n output transformers connected to the output terminals of the 2n FB inverters, and N
One output transformer connected to the output terminal of the PC inverter, an AC load to which the sum of the secondary voltages of the output transformer group is applied, and the 2n FB inverters and the one NPC inverter are multiplexed Means for PWM control.

Further, according to the control method of the power converter of the present invention, when the absolute value of the input signal e _i for PWM control of the NPC inverter is in a small area, the NPC inverter outputs a constant voltage _ΔV ; wherein from 2n stand FB inverter is a method of controlling to generate a voltage V _U - [delta _V obtained by subtracting the constant voltage delta _v from the voltage V _U to be applied to the load.

[0026]

According to the present invention, the output transformers are connected in series on the secondary side, and the sum voltage of each transformer is applied to the AC load. In the PWM control, multiplexing is performed by combining 2n FB inverters and NPC inverters, and an output voltage with extremely low harmonic components is obtained as a whole.

When the input signal e _{i of the} PWM control is small,
NPC inverter outputs a constant voltage delta _V which satisfies the minimum on time of the device. At this time, the voltage V _U (input signal e) to be applied to the load from the 2n FB inverters
controlling the value) proportional to _i to generate a voltage V _U - [delta _V obtained by subtracting the constant voltage delta _V. as a result,
Voltage applied to the load becomes _{V U -Δ V + Δ V =} V U, the value proportional to the input signal e _i is obtained.

In this manner, the PWM control input signal e _i
Is small, a voltage proportional to the input signal e _i can be obtained, and a power converter without an uncontrollable region can be provided. Further, multiplex PWM control with 2n FB inverters and one NPC inverter becomes possible, and a voltage with less harmonic components can be supplied to the load.

[0029]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the power converter of the present invention. FIG. 1 shows one phase (U phase), but the other V phase and W phase are similarly configured.

In the figure, V _d1 and V _d2 are DC voltage sources and C _d1 to C _d1.
d4 is a DC smoothing capacitor, INV-1 and INV-2 are full bridge inverters (FB inverters), NPC is a neutral point clamp type inverter (NPC inverter), TR
_{1 to} TR ₃ are output transformers, and LOAD is an AC load.

The two DC power supplies V _d1 and V _d2 are two AC power supplies.
A DC / DC converter (for example, a PWM control converter, etc.) and a DC smoothing capacitor connected to its DC terminal. Each of these two DC power supplies V _d1 and V _d2 has n
One full-bridge inverter (FB inverter) is connected.

An output transformer is connected to the output terminal of each FB inverter. FB inverter INV-1, the self-turn-off devices S ₁₁ to S ₁₄ and the free-wheeling diode D
It is composed of ₁₁ to D _14, an input terminal connected to the DC power supply V _d1, an output terminal connected to the primary winding of the output transformer TR _1. The FB inverter INV-2 has the same configuration, and its input terminal is connected to the DC power supply _Vd2 .
An output terminal connected to the primary winding of the transformer TR _2.

The NPC inverter NPC receives as input the sum voltage of the DC power supplies V _d1 and V _d2 , and includes self-turn-off devices S _{31 to} S ₃₄ and S _{41 to} S ₄₄ and free-wheeling diodes D _{31 to} D _{31. 34,} D ₄₁ to D ₄₄ and clamping diode D
Is composed of _{35, D 36, D 45,} D 46. Two sets of half-bridge-connected NPC inverters are prepared, and as a whole, a full-bridge-connected NPC inverter is provided.

FIG. 2 is a time chart for explaining the PWM control operation of the power converter of FIG.

In the figure, X ₁ and Y ₁ are FB inverters INV
−1, X ₂ and Y ₂ are FB inverters INV
-2 carrier signal, X ₃ , Y ₃ and X ₄ , Y ₄ are NP
The carrier signal of the C inverter NPC, e _i, is the PWM control input signal.

X ₁ is a triangular wave varying between + E _max and −E _max , Y ₁ is an inverted value of X ₁ (or a triangular wave whose phase is shifted by 180 °), and X ₂ is 90 ° out of phase with X ₁ . The triangular wave, Y _2, is the inverted value of X ₂ . Further, (indicated by a broken line) X ₃ is a triangular wave which varies between 0 to + E _max, triangular wave X
_The phase is shifted by 90 ° from the absolute value of ₁ or Y ₁ . Y ₃ (shown in dashed lines) is a triangular wave which varies between 0 to-E _max, and has a triangular wave X ₃ in phase. X ₄ (2
Indicated by dash-dotted) is a triangular wave which varies between 0 to + E _max, are offset by a phase 90 ° than the absolute value of the triangular wave X ₂ or Y _2. Y ₄ (indicated by a two-dot chain line) is a triangular wave which varies between 0 to-E _max, and has a triangular wave X ₄ the same phase.

First, the PWM of the FB inverter INV-1
The control operation will be described.

The triangular wave X ₁ is compared with the input signal e _i to generate a gate signal g ₁₁ for the elements S ₁₁ and S ₁₂ . That is, when the e _i> X _1, in g ₁₁ = 1, S _11: On (S _12: Off) when e _i ≦ X _1, in g ₁₁ = 0, S _11: Off (S _12: On) Becomes Further, the triangular wave Y ₁ is compared with the input signal e _i to generate a gate signal g ₁₂ for the elements S ₁₃ and S ₁₄ . That is, e _i
> When Y _1, in g ₁₂ = 1, S _14: On (S _13: Off) when e _i ≦ Y _1, in g ₁₂ = 0, S _14: a: (on S ₁₃₎ off. The output voltage V ₁ of the FB inverter INV- ₁ is
On the element S ₁₁ to S _14, the OFF operation, when S ₁₁ and S ₁₄ is on, when _{V 1 = + V d1 = +} V d / 2 S 12 and S ₁₃ is on, V ₁ = -V _d1 = −V _d / 2 In other modes, V ₁ = 0. The equivalent carrier frequency of the output voltage V ₁ is doubled with respect to the frequency f _{C of the} carrier waves X ₁ and Y ₁ .

[0040] Similarly, by FB inverter INV-2 compares the triangular wave X _2, Y ₂ and the control input signal e _i, are PWM controlled. At this time, since the phases of the triangular waves X ₂ and Y ₂ are shifted by 90 ° from the phases of the triangular waves X ₁ and Y ₁ , multiplexing is achieved by adding the output voltages V ₁ and V ₂ of the _two FB inverters. Can be

Next, the PWM control operation at the time of the full bridge operation of the NPC inverter will be described.

By comparing the input signal e _i with the triangular waves X ₃ and Y ₃ , gate signals g ₃₁ and g ₃₂ for the elements S _{31 to} S ₃₄ are generated. That is, when the e _i> X _3, in g ₃₁ = 1, S _31: On (S _33: Off) when e _i ≦ X _3, in g ₃₁ = 0, S _31: Off (S _33: On) When e _i <Y ₃ , g ₃₂ = 1 and S ₃₄ : on (S ₃₂ : off) When e _i ≧ Y ₃ , g ₃₂ = 0 and S ₃₄ : off (S ₃₂ : on) .

[0043] Also, by comparing the input signal e _i and the triangular wave X _4, Y ₄ and, respectively, make the gate signal g _41, g ₄₂ of element S ₄₁ to S _44. That is, when the e _i> X _4, in g ₄₁ = 1, S _44: On (S _42: Off) when e _i ≦ X _4, in g ₄₁ = 0, S _44: Off (S _42: On) When e _i <Y ₄ , g ₄₂ = 1 and S ₄₁ : on (S ₄₃ : off) When e _i ≧ Y ₄ , g ₄₂ = 0 and S ₄₁ : off (S ₄₃ : on) .

The voltage V _a of a point of the NPC inverter NPC-1 is turned on elements S ₃₁ to S _34, the OFF operation is as follows. However, the voltage of the DC power supply and V _d, V
_{It is} assumed that _d1 = _Vd2 = _Vd / 2. That is, when S ₃₁ and S ₃₂ is on, when _{V a = + V d / 2} S 32 and S ₃₃ is on, when V _a = 0 S ₃₃ and S ₃₄ is on, V _a = -V _d / As a result, an output voltage of three levels (three stages) is obtained.

Further, the voltage V _b of the point b, the element S ₄₁ to S ₄₄
Is turned on and off as follows. That is, when S ₄₁ and S ₄₂ is on, when _{V b = + V d / 2} S 42 and S ₄₃ is on, when V _b = 0 S ₄₃ and S ₄₄ is on, V _b = -V _d / 2 again, an output voltage of three levels (three stages) is obtained.

The output transformer TR ₃ has a voltage V _{a at the} point _a.
And a voltage difference between the voltage Vb at point _b is applied. Transformer TR
₃ to the voltage applied _{(+ V d, + V d} / 2,0, -V d
/ 2, −V _d ), and the equivalent carrier frequency is twice the frequency of the triangular wave X ₃ .

As shown at the bottom of FIG. 2, a voltage of V _U = V ₁ + V ₂ + V _a −V _b is applied to the AC load LOAD. Equivalent carrier frequency of the output voltage V _U is a triangular wave _{X 1, Y 1, X 2} , 8 times the frequency f _C of Y ₂ (triangular wave _{X 3, Y 3, X 4} , the frequency of Y ₄ f _C '= 2 · It becomes four times) of f _C. For example, when f _C = 500 Hz, V
The equivalent carrier frequency of _U is 4 kHz.

FIG. 3 is a block diagram showing an embodiment of a control block of the apparatus shown in FIG.

In the figure, C _U , C ₁ , C ₂ and C ₃ are comparators,
G _U (S), G ₁ (S), G ₂ (S) are current control compensation circuits, A _{1 to} A ₆ are adders, SG is an input signal correction circuit, P
WM _{1 to} PWM ₃ are pulse width modulation control circuits, and TRG is a carrier generator. The apparatus shown in FIG. 1 is provided with current detectors CT _U and CT _{1 to} CT ₃ .

[0050] The current detector CT _U in FIG. 1, detects the load current I _U, is input to a comparator C _U. The comparator C _U, the load current command value I _U ^* and comparing the load current detection value I _U, and inputs the deviation ε _U = I _U ^* -I _U current control compensation circuit G _U (S) . Current control compensation circuit G
_U (S) amplifies the deviation ε _U , and the adder A
It is input to the ₁ ~A _3.

Further, the current detectors CT _{1 to} CT ₃ provide:
Detecting the transformer TR ₁ to Tr ₃ of the primary current I ₁ ~I _3, respectively input to the comparator C ₁ -C _3. Comparator C ₁
Compares the primary current command value I ₁ ^* of the transformer with the primary current detection value I ₁ of TR ₁ and inputs the deviation ε ₁ = I ₁ ^* −I ₁ to the current control compensation circuit G ₁ (S). G ₁ (S) amplifies the deviation ε ₁ and inputs it to the adder A ₁ . The adder A ₁ adds the output signals of the control compensation circuit G _U (S) and G ₁ (S). Thus, the output e ₁ of the adder A ₁ is as follows. However, the control compensation circuits G _U (S) and G ₁ (S) are proportional elements K _U and K ₁ , respectively.

E ₁ = K _U · ε _U + K ₁ · ε ₁ This signal e ₁ is supplied to the FB inverter I via the adder A _5.
Is input to the PWM control circuit PWM ₁ of NV-1.

[0053] Similarly, the adder A ₂ and the output signal e _2, e ₃ of A ₃ is as follows. However, G ₂ (S)
= K ₂ , G ₃ (S) = K ₃ .

E ₂ = K _U · ε _U + K ₂ · ε ₂ e ₃ = K _U · ε _U + K ₃ · ε _{3 The} signal e ₂ is supplied to the FB inverter IN via the adder A _6.
It is input to the PWM control circuit PWM ₂ of V-2. Also,
Signal E ₃ is inputted via an input signal correction circuit SG to the PWM control circuit PWM ₃ of NPC inverter NPC.

FIG. 4 shows the input / output characteristics of the input signal correction circuit SG. When the absolute value of the SG input signal e ₃ is larger than Δe, the output signal becomes e ₃ ′ = e ₃ . When the input signal satisfies 0 ≦ e ₃ ≦ Δe, the output signal e ₃ ′ = Δe, and when the input signal satisfies −Δe ≦ e ₃ ≦ 0, the output signal e ₃ ′ = −Δe. The correction circuit SG
Output signal e ₃ 'is the input signal of the PWM control circuit PWM ₃ of NPC inverters NPC of. The value of voltage level Δe at this time is determined in consideration of the minimum on-time of the self-extinguishing element included in the inverter.

The adder A ₄ shown in FIG. 3 outputs the SG input signal e ₃
It adds "inverted value -e ₃ 'of the output signal e ₃ and, e ₄ = e
₃₋ e ₃ ′ is calculated and input to the adders A ₅ and A ₆ . Thus, the input signal e ₁ of PWM ₁ and PWM ₂ ',
e ₂ ′ is as follows.

E ₁ ′ = e ₁ + e ₄ e ₂ ′ = e ₂ + e ₄ FIG. 5 shows an example of the operation waveform of each part in FIG. 3, where a sine wave signal e ₁ = e ₂ = e ₃ is set. .

The input signal e ₃ ′ of PWM ₃ is set to a constant value at + Δe or −Δe in a region where the absolute value of the signal e ₃ is small. The output e ₄ of the adder A ₄ is the difference between the e ₃ and e ₃ ', is as shown. Further, the input signal e of the PWM _1
1 ', by adding a compensation signal e ₄ to the signal e _1, made at the bottom of the waveform of FIG.

The pulse width modulation control circuits PWM _{1 to} PWM ₃
, From the carrier generator, the carrier signals X ₁ to X ₁
X ₄ , Y _{1 to} Y ₄ are provided.

[0060] FB average V _1, V ₂ of the inverter INV-1, INV-2 of the output voltage when the proportional constant and _{K V, V 1 = K V} · e 1 'V 2 = K V · e 2 ′. Further, the average value V ₃ of the output voltage of the NPC inverter NPC is V ₃ = 2 · K _V · e ₃ ′. Therefore, the voltage V applied to the load LOAD
_{U is, VU = V 1 + V 2} + V 3 = K V · (e 1 '+ e 2' +2 · e 3 ') = K V · (e 1 + e 4 + e 2 + e 4 +2 · e 3 -2 · e 4 ) = K _V · (e ₁ + e ₂ + 2 · e ₃ ). e ₁ , e ₂ , e ₃ , e _U are all substantially equal,
If e ₁ , e ₂ , e ₃ , e _U = K _U · ε _U , then V _U = K _V · 4 · e _U and the output signal e _{U of the} load current control circuit G _U (S)
Is obtained.

The load current I _U is controlled as follows.

That is, if I _U ^* > I _U , the deviation ε _U
It is a positive value, increasing the output voltage V _U. therefore,
Control is performed so that the current I _U increases and I _U = I _U ^* . Conversely, if I _U ^* <I _U , the deviation ε _U has a negative value, reducing the output voltage V _U. Therefore, the current I _U is reduced, and again, control is performed such that I _U = I _U ^* .

The primary current of the output transformer TR ₁ is I
₁ is controlled as follows.

That is, when I ₁ ^* > I ₁ , the deviation ε ₁ takes a positive value and increases the output voltage of the FB inverter INV-1. Therefore, the current I ₁ increases and I
Control is performed so that ₁ = I ₁ ^* . Conversely, I ₁ ^*
<For I _1, deviation epsilon ₁ becomes a negative value, decreasing the output voltage of the FB inverter INV-1. Therefore, the current I ₁ is controlled to decrease, and again, I ₁ = I ₁ ^* . In this way, by controlling the primary current of the transformer to be equal to the command value, it is possible to prevent the output transformer from being demagnetized.

Similarly, one of the transformers TR ₂ and TR ₃
The secondary currents I ₂ and I ₃ are also controlled so as to match those command values, thereby preventing each transformer from being demagnetized.

As described above, in the power converter of the present invention, when the input signal e _{U for} PWM control is small, the NPC inverter operates at a constant voltage Δ that satisfies the minimum on-time of the element.
Output _V.

At this time, from the 2n FB inverters, the voltage V _U −Δ obtained by subtracting the constant voltage _ΔV from the voltage V _U (value proportional to the input signal e _U ) to be applied to the load.
Control to generate _V. Consequently, the voltage applied to the load becomes _{V U -Δ V + Δ V =} V U, the value proportional to the input signal e _U obtained.

As described above, the PWM control input signal e _U
Is small, a voltage proportional to the input signal e _U can be obtained, and a power converter without an uncontrollable region can be provided. Further, multiplex PWM control with 2n FB inverters and one NPC inverter becomes possible, and a voltage with less harmonic components can be supplied to the load.

While the above description has been made for the inverter output U phase, the same applies to the V phase and W phase.

Although FIG. 1 has been described with two FB inverters, the DC power supplies V _d1 and V _d2 each have n units (n
(Integer) is connected, and combined with an NPC inverter, multiplexed PWM control can be similarly performed. In that case, the phase of the PWM control carrier signal may be determined assuming that the NPC inverter (at full bridge operation) generates an output voltage corresponding to two FB inverters.

[0071]

As described above, according to the power converter of the present invention, even when the PWM control input signal is small, an output voltage proportional to the input signal can be obtained, and the power converter without the uncontrollable region can be obtained. Can be provided. Further, multiplex PWM control with 2n FB inverters and one NPC inverter becomes possible, and a voltage with less harmonic components can be supplied to the load.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an embodiment of a power conversion device of the present invention.

FIG. 2 is a time chart for explaining a PWM control operation of the device of the present invention.

FIG. 3 is a diagram showing an embodiment of a control block diagram of the apparatus of FIG. 1;

FIG. 4 is a characteristic diagram for explaining the control operation of FIG. 3;

FIG. 5 is a diagram showing an example of an operation waveform diagram of signals of respective units in FIG. 3;

FIG. 6 is a configuration diagram of a conventional power converter.

FIG. 7 is a time chart for explaining the PWM control operation of FIG. 6;

FIG. 8 is a time chart for explaining the PWM control operation of FIG. 6;

[Description of _Signs ] _Vd1 , _Vd2 : DC power supply, _Cd1 to _Cd4 : DC smoothing capacitors, INV-1, INV-2: FB inverter, NPC
... NPC _{inverter, TR 1, TR 2, TR} 3 ... output transformer, LOAD ... AC load, CT _U, CT ₁ ~CT ₃
... Current detector, C _U , C ₁ , C ₂ , C ₃ ... Comparator, G _U
(S), G ₁ (S), G ₂ (S), G ₃ (S): current control compensation circuit, A _{1 to} A ₆ : adder, SG: input signal correction circuit, PWM _{1 to} PWM ₃ : pulse Width modulation control circuit, T
RG: Carrier generator.

Claims (2)

(57) [Claims] 1. Two DC power supplies connected in series, 2n (n is an integer) full-bridge inverters (referred to as FB inverters) each using the two DC power supplies as voltage sources, A neutral point-clamped inverter (referred to as an NPC inverter) using the sum of power supplies as a voltage source, and 2 connected to the output terminals of the 2n FB inverters
n output transformers, one output transformer connected to the output terminal of the NPC inverter, an AC load to which a sum of secondary voltages of the output transformer group is applied, the 2n FB inverters, Means for multiplexing PWM control of one NPC inverter. 2. Two DC power supplies connected in series; 2n (n is an integer) full-bridge inverters (referred to as FB inverters) each using the two DC power supplies as voltage sources; A neutral point-clamped inverter (referred to as an NPC inverter) using the sum of power supplies as a voltage source, and 2 connected to the output terminals of the 2n FB inverters
n output transformers, one output transformer connected to the output terminal of the NPC inverter, an AC load to which a sum of secondary voltages of the output transformer group is applied, the 2n FB inverters, Means for multiplexing PWM control of one NPC inverter, wherein when the absolute value of the input signal e _i for PWM control of the NPC inverter is in a small area, a constant voltage is output from the NPC inverter. to output a delta _V, wherein from 2n stand FB inverter characterized by being controlled so as to generate a voltage V _U - [delta _V obtained by subtracting the constant voltage delta _v from the voltage V _U to be applied to the load A method for controlling a power converter.