JP3219931B2 - Display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat display device, and more particularly to a field emission cathode as an electron source.
Cathdes (hereinafter abbreviated as FEC).

[0002]

2. Description of the Related Art In recent years, with the development of semiconductor processing technology, F
EC has been used as a surface electron source, and the technology has already been advanced by the time a 6-inch level color display was developed (IDRC'91, pp. 20-23). FE
A display device using C has a higher response speed (1 microsecond level) and a wider viewing angle than a liquid crystal display device that is widely used at present, and is one of the promising flat display devices in the future. is there.

FIG. 9 shows a typical structure of this FEC.
In the figure, reference numeral 100 denotes a substrate having a high conductivity in which impurities are doped at a high concentration. On this substrate 100, an SiO ₂ layer 101 is formed as an insulating layer, and in this SiO ₂ layer, an opening 1 that becomes narrower as it gets closer to the substrate 100 is formed.
02 is formed. In the opening 102, an emitter 103 made of Mo is formed as an electron emitting portion. Further, a Mo film 104 is formed as a gate electrode so as to surround the emitter 103. This F
For manufacturing the EC, a normal resist coating technique, an electron beam exposure technique, an etching technique, and the like are used.

A display device having an FEC having such a configuration controls a voltage between a gate line and a cathode line to emit light for a selected time, as in the case of a simple matrix type liquid crystal display device. As the driving method, for example, FIG.
As shown by 0, first, by applying Vls to the cathode line, only one line (N) is set to the selection mode, and the other line (N-1) is set to the non-selection mode by Vlns. Next, when displaying black, the voltage of Vcb is
To display white, the voltage of Vcw is input to each gate line. In FIG. 10, the voltage of Vcb is applied to the gate line of K,
Vcw is input to each of the gate lines. afterwards,
Select the next cathode line. Display is performed by sequentially repeating such operations.

FIG. 11 shows an example of luminance L and voltage luminance characteristics obtained by such driving. Although the above driving method is a very simple and good method, the problem that crosstalk between pixels occurs and the time for selecting pixels becomes shorter as the number of scanning lines N is increased, which is apparent from the following equation (I). Thus, there is a problem that the luminance is reduced.

[0006]

(Equation 1) Therefore, in order to improve these problems, a display device having an FEC in which a thin film transistor is attached to each pixel has been developed (Japanese Patent Application Laid-Open No. 3-295138). FIG. 12 shows an outline of this display device. In FIG. 12, reference numeral 111 denotes a thin film transistor (hereinafter, referred to as TFT). This TFT
111 denotes two transistors Tr for one pixel
₁ , Tr ₂ and a holding capacitor C. The FEC section 112 as an emitter group is electrically connected to the drain electrode 116 or the source electrode gate 117 of the driver Tr ₁ of the TFT 111. Note that the TFT 111 is arranged so as to approach the FEC unit 112. In the FEC unit 112, a large number of emitters 126 having a microstructure as shown in FIG. 9 are integrated on a common cathode electrode 125 to constitute one pixel. The integration degree of the emitter 126 is 10 ⁴ to 10
⁵ / mm ^2, which is about 100 to 1000 pixels for one pixel. Above the FEC unit 112, the gate electrode 12
3 are arranged. The gate electrode 123 has an opening 123a at a position corresponding to each emitter 126, and serves as a common electrode throughout all pixels.

Above the gate electrode 123, an anode substrate 113 as a display substrate is disposed. As a material of the anode substrate 113,
A transparent material such as glass or transparent ceramics is used so that light emission can be observed from the side. This anode substrate 1
An anode electrode 114 is attached to the 13 FEC opposing surface, and a phosphor layer 115 is formed on the anode electrode 114.

In the display device having such a configuration, F
By configuring the EC, the pixel potential for one field is held in the holding capacitor C, and the phosphor can always emit light regardless of the scanning time. For this reason, as shown in FIG. 12, there is an advantage that high luminance can be achieved with a small voltage.

[0009]

However, such a configuration in which the cathode is driven by the transistor holding the holding capacitor C on the control electrode requires _two transistors Tr ₁ and Tr _{2 for} each pixel. Moreover a large driving capacity is required to the driver transistor Tr ₁ which drives the cathode. For this reason, the proportion occupied by elements such as transistors increases, and accordingly, the area occupied by the TFT as the memory portion also increases. Therefore, in the display device having such a configuration, the area of the driving unit for displaying becomes large, and the display device itself becomes large.

Further, the TFT having the memory function having the above-mentioned structure is provided.
In the circuit, the driver transistor T in each pixel
If there is a variation in r ₁ , the potential of the emitter varies, which may cause display unevenness.

As described above, in the display device that drives the FEC by using the TFT circuit having the memory function, the driving voltage can be reduced, the luminance can be increased, and the definition can be increased. Is disadvantageous in terms of area, and there is a problem that display unevenness occurs.

SUMMARY OF THE INVENTION The present invention has been made in view of the foregoing, and has as its object to provide a display device which has few defects even when the number of pixels is increased and does not require a driving transistor.

[0013]

The present invention relates to an insulating substrate.
And a display substrate having one main surface opposed to the insulating substrate
And an anode electrode provided on one main surface of the display substrate
And a phosphor layer provided on the anode electrode;
A fan formed on the surface of the insulating substrate facing the display substrate.
Field emission cathode, the field emission
Interposed between the cathode layer and the phosphor layer.
Gate part, controlling supply of electric charge to the gate part
A switch element and a memo holding the potential of the gate portion.
Multiple unit structures each having a vertical element and arranged vertically and horizontally
And a plurality of switch elements having a unit structure of n: 1 interface.
-Control means for driving the race (n is an integer of 2 or more)
A display device provided with:

In the present invention, a capacitor is preferably used as a memory element, and a transistor is preferably used as a switch element. In this case, the capacitor is electrically connected to the output of the transistor, ie, the drain or source, or the emitter or collector.

In the present invention, it is preferable that the display substrate has pixels of each color, and each pixel is electrically connected to a separate electrode. In this case, as the timing for driving each electrode, a method of driving the switch element to hold the pixel voltage after stopping the driving of one color pixel, and then driving the actually driven color pixel, Alternatively, there is a method of stopping driving of one color pixel one or more lines before.

Here, as the insulating substrate, a glass substrate, an Al ₂ O ₃ substrate, or the like can be used. As the memory element, a capacitor or the like can be used, and as the switch element, a transistor that is a three-terminal element; an MIM that is a two-terminal element; a diode; a vacuum micro element that is a triode element can be used.

Further, Mo or the like can be used as a material of the emitter of the field emission cathode portion.

Further, as a material of the display substrate, glass,
A transparent material such as transparent ceramics such as Al ₂ O ₃ can be used.

[0019]

According to the present invention, a TFT circuit having a structure including an FEC and having a memory function is provided with one memory element and one TFT circuit.
It is characterized by being constituted by two switch elements. As a result, the area of the TFT, which is a memory portion, is reduced, and a portion related to display can be increased. Therefore, high luminance can be obtained even when high definition is performed. In addition, since an image can be held for one field, driving can be performed at a low voltage, and high-speed operation can be performed.

Further, in the display device of the present invention, since the control is performed between the gate electrode and the emitter, the capacity of the memory element can be reduced in consideration of the capacity of the gate electrode itself. Further, by controlling between the gate electrode and the emitter, the variation in the potential of the emitter can be reduced.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a schematic view showing an embodiment of the display device of the present invention. In the figure, reference numeral 1 denotes a TFT. This TFT is
Each pixel is composed of one transistor Tr ₁ and a holding capacitor C. The switching transistor Tr ₁ and the capacitor C are electrically connected to the FEC unit 2 which is an emitter group, and a constant voltage can be applied to the FEC unit 2. FE
The C section 2 is composed of a plurality of emitters 16 having a microstructure as shown in FIG.
It constitutes pixels. The degree of integration of the emitter 16 is 10 ⁴ to 10 ⁵ / mm ² , and 100 pixels for one pixel.
It is about 1000 pieces.

A gate electrode 13 for controlling the gate voltage of the switching transistor Tr ₁ is disposed between the FEC unit 2 and the anode substrate 3 serving as a display substrate unit. Opening 1
3a are formed and serve as common electrodes throughout all pixels. The space between the anode substrate 3 and the gate electrode 13 is kept in a vacuum atmosphere. An anode electrode 4 is attached to the surface of the anode substrate 3 opposite to the FEC, and a phosphor layer 5 is formed on the surface thereof. Also, the gate electrode 1
3 and orthogonal arrangement image signal lines via the insulating film, thereby making it possible to obtain a luminance signal by controlling the gate voltage of the FEC unit 2 through the switch transistor Tr _1. The gate electrode 13 of the FEC unit 2
Is electrically connected to the cathode electrode 15 through the insulating film, so that this portion can be used as a capacitor so that the holding capacitor C is not newly formed.

[0024] In the display device having the above structure, first, the gate voltage of the switching transistor Tr ₁ is driven by a scanning signal, all one scanning line is turned ON.
At the same time, the switching transistor T is switched from the image signal line.
image signal through r ₁ is input to the gate electrode 13 of the FEC section 2. This voltage is held for one field by the holding capacitor C connected in parallel. The display is performed by the phosphor in the phosphor layer 5 emitting light based on this voltage.

[0025] In the display device having the above structure, since the function of the driving transistor and a pixel selection transistor one switch transistor Tr _1, the area of the TFT is a memory portion is reduced as compared with the prior art, The portion related to display can be made large. Further, since an image can be held for one field, driving can be performed at a low voltage, and high-speed operation can be realized. further,
Since control is performed between the gate electrode and the emitter, variation in the potential of the emitter can be reduced.

Colorization in the display device having the above-described structure is performed by dividing one pixel into three to form RGB regions and driving each region in a time-division manner, or by separating each pixel into separate pixels for each color pixel. It can be realized by using a method of forming and driving them in parallel.

Here, a color display method for driving the RGB areas in a time-division manner will be described. FIG. 2 is a schematic diagram showing another embodiment of the display device of the present invention, and FIG. 3 is a diagram showing a drive timing chart of the display device shown in FIG. In this case, RGB signals are obtained by dividing one pixel into １ ／ and selecting the anode electrode 4 in a time-division manner. That is, one frame of the anode electrode 4 is divided into three RGB, and the anode electrode 4 is driven by １ ／ frame as shown in FIG. In this method, the driving time is reduced to 1/3, but all the emissions 16 of the FEC portion of one pixel are concentrated on the same color pixel.
There is no reduction in brightness.

However, when the color is changed, the driving must be performed after the previously emitted color has been erased, so that the actual driving time is reduced. This is a particular problem in achieving higher definition of the display device.

Therefore, in the present embodiment, the above problem is solved by setting the timing at the time of driving as follows. In other words, if driving is performed in the order of RGB, it is assumed that B light emission has already been performed during R driving. Normally, if R driving is performed without terminating B driving, color crosstalk occurs. Therefore, after terminating the B drive in advance, a pixel voltage corresponding to the R drive is written, and finally, scanning is performed by applying an anode voltage for the R drive. This driving method is not limited to the structure shown in the present invention, but may be a structure using a memory element (for example, Japanese Patent Laid-Open No. 3-295).
138 gazette) and the like.

This driving is good at the time of low-speed driving. However, at the time of high-speed driving, even if the B pixel is turned off, the delay overlaps with the ON state of the R pixel and crosstalk easily occurs, and timing control is complicated.

A driving method applicable to such a case is shown in FIG. 4 as another embodiment. In the present embodiment, the B driving is terminated one line before driving, so that crosstalk does not occur even if the driving signal has a delay.
In this embodiment, the number of lines to be set is one line before, but the number of lines to be set is not particularly limited, and may be two or three lines. Note that this driving method is not limited to the structure shown in the present invention, but can be applied to any structure using a memory element (for example, JP-A-3-295138).

FIGS. 5A and 5B are diagrams for explaining another embodiment of the display device of the present invention. In the present embodiment, a case will be described in which driving is performed only when an image has motion. Since the display device of the present invention has a memory element, it does not need to be driven when the same image signal is input. Therefore, as shown in FIG. 5A, a field memory is provided to detect whether or not the image has changed (movement detection). If the image has changed, a signal is sent to the scan pulse generating circuit, and To drive the FEC unit. On the other hand, when it has not changed, no signal is sent to the scanning pulse generating circuit so that driving is not performed. By performing such control, power consumption due to driving can be reduced. For example, as shown in FIG. 5B, driving is not performed after scanning 1 until motion is detected (scan 2), and driving is performed only after motion is detected (scan 3).

Next, the case where the memory is not complete and leaks will be described with reference to FIG. In this case, even if no motion is detected, the drive must be performed at a certain cycle according to the leak amount. However, if the image is simply rewritten at intervals of one field (or one frame) or more, flickering occurs at that cycle. Is detected. Therefore, by performing an interlace of n: 1 (n is an integer of 2 or more), flicker can be reduced even when the number of driving cycles is 1 / n.

In a normal CRT (Cathod Ray Tube) and FEC, since there is no memory effect, flicker is large, and when such driving is performed, flicker is generated in an image having no correlation in the vertical direction, and the image is easily viewed. For this reason, 2: 1 interlace driving has been the limit. However, when a memory element is provided as in the structure of the display device of the present invention, the amount of flicker is greatly reduced. It was confirmed that it did not become. That is, FIG.
As shown in (A) and (B), when 3: 1 interlace driving is performed, 1, 4, 7,.
Scanning is performed every other line, and in the second field, scanning is performed at intervals of 2, 5, 8,... Every third line. In the third field, scanning is performed every third line, such as 3, 6, 9,.... This scanning is repeated to create one frame with three fields. FIG. 6A shows a scanning signal in this case, and FIG. 6B shows a scanning method in this case.

By the above-described scanning, flicker is eliminated as shown in FIG. That is, although flicker of each line occurs at a cycle of three frames, the frequency of the flicker is tripled because the upper and lower three lines compensate, and the flicker is not visually recognized. In this embodiment, 3: 1
However, the present invention is not limited to this, and any n:
It can be extended to one interlace drive.

The display device according to the present invention has a structure that is more resistant to variations in the performance of the memory element than the conventional display device. However, in the case of displaying a halftone, the display still tends to vary. Therefore, as shown in FIG. 8 (A), n divided pixels 32 (four in the figure) in which the number of emitters 31 to be driven together are changed are provided, and each divided pixel 32a,
32b, 32c, and 32d are separately driven with ON / OFF binary values. Thereby, multi-values can be displayed. In particular, in the case of the FEC, since the luminance does not depend on the size or position of the divided pixel electrode but on the number of the emitters 31, uniform and reliable display can be performed even if the accuracy of the process is low.

As shown in FIG. 8B, by driving the divided pixels 32a to 32d by dividing the input voltage by capacitance, the number of wirings for driving can be greatly reduced. The same effect can be obtained by changing the _Vth of the emitter of each divided pixel for each divided pixel. In this embodiment, the number of divided pixels is four, but the number can be arbitrarily changed.

Other modifications are possible without departing from the scope of the present invention.

[0039]

As described above, the display device of the present invention has the following features.
TF with structure including FEC and memory function
Since the T circuit is composed of one memory element and one switch element, the number of elements in the TFT circuit can be reduced to almost half and the current flowing through the gate can be reduced, thereby reducing the size of the display device. Can be reduced. As a result, the yield can be improved and the manufacturing cost can be reduced due to the decrease in the number of elements. Further, since the number of elements in one pixel can be reduced, deterioration of display quality due to variations in element performance can be reduced.

Further, according to the display device of the present invention, since an image can be held for one field by the memory element, a high luminance can be obtained even at a low voltage, whereby a low voltage driving IC can be used. , High speed can be realized. Further, even when the n: 1 interlace drive is performed, flicker is unlikely to occur, so that the drive frequency can be reduced without lowering the luminance, and the power consumption can be further reduced.

[Brief description of the drawings]

FIG. 1 is a schematic view showing one embodiment of a display device of the present invention.

FIG. 2 is a schematic view showing another embodiment of the display device of the present invention.

FIG. 3 is a diagram showing a timing chart of driving of the display device shown in FIG. 2;

FIG. 4 is a diagram for explaining another embodiment of the display device of the present invention.

FIGS. 5A and 5B are diagrams for explaining another embodiment of the display device of the present invention.

FIG. 6 is a view for explaining another embodiment of the display device of the present invention.

FIG. 7 is a diagram illustrating an effect of the display device illustrated in FIG. 6;

FIGS. 8A and 8B are explanatory diagrams for explaining divided pixels in which the number of emitters to be driven is changed.

FIG. 9 is an enlarged sectional view showing an emitter of the FEC.

FIG. 10 illustrates a method for driving a conventional display device.

FIG. 11 is a diagram illustrating driving voltage-luminance characteristics when a display device is driven.

FIG. 12 is a schematic view illustrating an example of a display device using a conventional memory element.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... TFT, 2 ... FEC part, 3 ... anode substrate, 4 ...
Anode electrode, 5: phosphor layer, 13: gate electrode, 13
a: opening, 15: cathode electrode, 16, 31, emitter, 32a to 32d: divided pixels.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tomio Ono 1 Koga Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Prefecture Inside the Toshiba R & D Center (72) Inventor Toshiharu Higuchi 72 Horikawa-cho, Saiwai-ku, Kawasaki-shi, Kanagawa (56) References JP-A-2-309541 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H01J 31/15 G09G 3/30 301

Claims (3)

(57) [Claims] 1. A an insulating substrate, said insulating substrate and the display substrate was opposed to one main surface, an anode electrode provided on one principal surface of the display substrate, provided on the anode electrode Phosphor layer , formed on a surface of the insulating substrate facing the display substrate.
Field emission cathode section, the field
An intervening arrangement between the emission cathode section and the phosphor layer
Placed gate part, controls supply of electric charge to the gate part
Switch element to hold and the potential of the gate portion
Multiple units each having a memory element and arranged vertically and horizontally
And a plurality of switch elements having a unit structure in an n: 1
Control means (n is an integer of 2 or more) for driving the source
A display device, comprising: 2. The method according to claim 1, wherein each of the plurality of unit structures has an odor.
The switching element is a transistor and
The memory element is a capacitor connected to the gate.
The display device according to claim 1, wherein: 3. The driving unit according to claim 1, wherein the driving unit includes a plurality of unit structures.
It features a 3: 1 interlace drive of the switch element.
The display device according to claim 1.