JP3219856B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing, for example, a capacitor for a semiconductor integrated circuit, and more particularly to a method of manufacturing a semiconductor device using a metal nitride as at least one electrode and a metal oxide as an insulating film. About.

[0002]

2. Description of the Related Art Conventionally, a DRAM in which a MOS transistor and a capacitor are combined has been known as one of the semiconductor devices which perform an operation of storing information.

In recent years, with the advance of semiconductor technology, especially the advance of fine processing technology, high integration and large capacity have been rapidly promoted. With this integration, the capacitor area decreases. However, if the capacitance of the capacitor is reduced, the occurrence of a soft error such as erroneous reading of the memory contents or destruction of the memory contents due to α rays or the like becomes a problem.

Generally, silicon oxide, silicon nitride, or a composite film thereof is used as a capacitor insulating film. In such a situation, a capacitor having a three-dimensional structure is used to increase an effective capacitor area. However, structural measures for further integration are not enough, and a metal oxide film having a higher dielectric constant than silicon oxide has been studied as a capacitor insulating film. Typical materials for the high dielectric film as described above include a tantalum oxide film, SrTiO ₃ , and PZT.
Perovskite-type insulating films and the like are being studied.
A large capacitor capacity can be obtained with a smaller area than silicon oxide. However, when using a tantalum oxide film or a high dielectric constant insulating film as the capacitor insulating film,
If conventional polycrystalline silicon is used as the electrode material, the electrode /
Since SiO ₂ having a low dielectric constant is formed at the interface of the insulating film to cause a reduction in capacity, the metal oxide film is reduced and a leak current is increased, so that it cannot be used on those films. Therefore, it is necessary to use a metal electrode which is stable and has good workability without deteriorating these insulating films. Certainly, metal nitrides such as TiN are stable and have excellent workability.

However, when such a material is used for the electrode as the capacitor insulating film, there is a problem that the leakage current increases due to the subsequent high-temperature heat treatment. In the actual LSI process, some high-temperature processing is required after the formation of the capacitor, so that the capacitor is deteriorated after these processes. As a result, the reliability of a device such as a DRAM is significantly impaired.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a capacitor using a metal nitride as an electrode and a metal oxide as a capacitor insulating film. In the above, the metal nitride is structurally, thermally and compositionally stabilized without deteriorating the metal oxide film by the heat treatment after the formation of the metal nitride electrode, and the heat treatment increases the leakage current. It is an object of the present invention to provide a method of manufacturing a semiconductor device such as a large-capacity capacitor which does not cause a problem.

[0007]

The gist of the present invention is to perform a heat treatment in a non-oxidizing atmosphere or a vacuum once after forming a metal nitride as at least one electrode and before performing a desired heating step. This makes it possible to improve the characteristics and reliability of devices such as DRAMs by making the metal nitride structurally, thermally, and compositionally stable without deteriorating the metal oxide film, which is the capacitive insulating film. It is to provide a capacitor that can be achieved.

The present invention also provides a process for forming a metal oxide film as a capacitor insulating film in a capacitor formed on a semiconductor substrate, for example, and a process for forming an electrode made of metal nitride on the capacitor insulating film. Before passing through a heat process accompanying the formation of an interlayer insulating film and wiring in a post-process, a temperature of 300 ° C. to 500 ° C. in a non-oxidizing atmosphere or vacuum is applied.
And a heat treatment for at least one hour.

Similarly, a step of forming a transition metal oxide film as a capacitor insulating film, a step of forming an electrode made of metal nitride on the capacitor insulating film, and a step of forming an interlayer insulating film and wiring in a later step Performing a heat treatment at a temperature of 700 ° C. or more and 900 ° C. or less for 2 minutes or less in a non-oxidizing atmosphere or vacuum before passing through a heat step accompanying the above.

[0010]

In general, a metal nitride is a so-called interstitial compound in which a nitrogen atom has entered a metal, so that the composition ratio of the metal and nitrogen tends to deviate from the most stable composition. In addition, the bond between the metal and nitrogen tends to be unstable. For this reason, surplus or incompletely bonded nitrogen and metal atoms are unstable and interact with adjacent metal oxide films,
As a result, the insulation of the metal oxide film is deteriorated.

[0011] In the LSI process, after forming the capacitor, a heat process accompanied with the formation of the interlayer insulating film and the wiring is performed. However, if the metal nitride film of the capacitor electrode is not stabilized, the insulating film is formed as described above. The result of the interaction is that degradation such as an increase in leakage current is caused. To stabilize the metal nitride film, a certain amount of heat treatment is required. At this time, it is necessary to prevent deterioration of the insulating film. Degradation hardly occurs at a temperature of 500 ° C. or less, but the stabilization requires at least one hour or more. The reason for this is that the rate of "outward diffusion" of excess nitrogen is low at low temperatures. On the other hand, at a temperature of 700 ° C. or higher, the above stabilization occurs in a short time,
On the other hand, a deterioration reaction of the insulating film is likely to occur. Therefore, a rapid quenching process in a short time of at least 2 minutes or less is required.

On the other hand, when the temperature is higher than 500 ° C. and lower than 700 ° C., it is difficult to perform a heat treatment that stabilizes the metal nitride and does not cause deterioration of the insulating film. However, since the temperature in the post-process as described above falls within this range, prior to such heat treatment as the gist of the present invention,
Once a heat treatment intended to stabilize the metal nitride as described above is performed, a highly reliable capacitor without deterioration can be manufactured.

As a result, according to the manufacturing method of the present invention, it is possible to provide a semiconductor device in which the electrical resistance of the metal nitride is reduced and which is structurally, thermally and chemically stabilized.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a DR according to a first embodiment of the present invention.
It is sectional drawing of the stacked capacitor for AM.

As shown in FIG. 1A, the specific resistance is 10Ω · c.
p-type silicon substrate 10 having a surface of (100)
An oxide film 102 is selectively formed on the substrate 1 by a LOCOS method to form an element isolation region. Here, a groove 120 for performing element isolation is formed, the groove is filled with a CVD oxide film 102, and thereafter, patterning is performed through a normal photolithography process. Next, a thin thermal oxide film 103 serving as a gate oxide film is formed, and thereafter, a first n + type polysilicon film 104 serving as a gate electrode is formed. Thereafter, patterning is performed through a normal photolithography process. Thereafter, an n @-type diffusion layer (source / drain region) 105 is formed in a self-aligned manner with respect to the gate by ion implantation.

Subsequently, as shown in FIG.
After an oxide film 106 is formed on the entire surface, an opening 107 connected to a part of the n − -type diffusion layer 105 through a normal photolithography process.
To form Further, a second n + type polysilicon film 108 is formed on the entire surface, and is patterned through a normal photolithography process. A tantalum oxide film 109 is formed to a thickness of 150 Å by a thermal CVD method using Ta (OC ₂ H ₅ ) ₅ as a source gas.

Next, as shown in FIG. 1C, after a titanium nitride film 110 is formed on the entire surface by a sputtering method, patterning is performed through a usual photolithography process. Finally, heat treatment is performed at 400 ° C. for 4 hours in a nitrogen atmosphere. After that, a high-temperature process of 600 ° C. for silicidation is performed for forming a contact between the wiring and the diffusion layer after forming the bit line.
According to the manufacturing method of the present invention, such heat treatment does not cause deterioration of the characteristics of the insulating film. As a result, a highly reliable DRAM memory cell can be completed by the above-described series of manufacturing processing steps.

The heat treatment after the formation of the titanium nitride film is performed by A
It may be performed in an r atmosphere or in a vacuum. Alternatively, high-speed heat treatment may be performed at 750 ° C. for 30 seconds in a nitrogen atmosphere.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 2 is a sectional view of a stacked capacitor for a DRAM according to a second embodiment of the present invention.

First, as shown in FIG.
An oxide film 20 is selectively formed on a p-type silicon substrate 201 having Ω · cm and having a (100) surface by a LOCOS method.
2 is formed to form an element isolation region. A groove 220 is formed for element isolation, and this groove is filled with a CVD oxide film 202. Subsequently, after a thin thermal oxide film 203 serving as a gate oxide film is formed, a first n + type polysilicon film 204 serving as a gate electrode is formed, and patterning is performed through a normal photolithography process. Thereafter, the gate is self-aligned with n-
A type diffusion layer (source / drain region) 205 is formed.

Subsequently, as shown in FIG.
After forming the D oxide film 206 on the entire surface, an opening 207 connected to a part of the n − -type diffusion layer 205 is formed through a normal photolithography process. Further, a first titanium nitride film 208 is formed on the entire surface by a sputtering method, and thereafter, heat treatment is performed at 750 ° C. for 1 minute in a nitrogen atmosphere by rapid cooling. Thereafter, patterning is performed through a normal photolithography process, and a tantalum oxide film 209 is formed to a thickness of 150 Å by a thermal CVD method using Ta (OC ₂ H ₅ ) ₅ as a source gas.

Next, as shown in FIG. 2C, after a second titanium nitride film 211 is formed on the entire surface by the CVD method, patterning is performed through a normal photolithography process. Finally, 750
By performing a heat treatment at a temperature of 1 ° C. for 1 minute in a nitrogen atmosphere, a 1-transistor / 1-capacitor DRAM cell that can withstand the subsequent heat treatment at 600 ° C. is completed.

The heat treatment after the formation of the titanium nitride film is performed using Ar
It may be performed in an atmosphere or in a vacuum. Further, heat treatment may be performed at 500 ° C. for 1 hour in a nitrogen atmosphere.

FIG. 3 shows a third embodiment of the present invention.
It is sectional drawing of the stack capacitor for RAM. FIG.
As shown in (a), LOCO is placed on a p-type silicon substrate 301 having a specific resistance of 10 Ω · cm and a surface of (100).
An oxide film 303 is selectively formed by the S method to form an element isolation region. Note that a groove 320 for performing element isolation is provided.
May be formed, and the trench may be filled with a CVD oxide film 303. Further, patterning is performed through a normal photolithography process. Subsequently, a thin thermal oxide film 3 serving as a gate oxide film
After the formation of the gate electrode 04, a first n + -type polysilicon film 305 serving as a gate electrode is formed, and then patterned through a normal photolithography process. Thereafter, a sidewall is formed by reactive ion etching. An n @--type diffusion layer (source / drain region) 306 is formed by ion implantation in a self-aligned manner with respect to the gate.

Next, after a tungsten silicide film 307 and a polycrystalline silicon laminated film 308 are formed on the entire surface of the wafer by sputtering, bit lines are formed through a normal photolithography process.

Subsequently, as shown in FIG.
After forming the D oxide film 309 on the entire surface, an opening 310 connected to a part of the n − type diffusion layer 306 is formed through a normal photolithography process. Further, after forming a second n + type polysilicon film 311 and a CVD oxide film on the entire surface, patterning is performed through a normal photolithography process. Thereafter, after forming an n + -type polysilicon film 313, etching is performed by a reactive ion etching method while leaving only the n + -type polysilicon film 313 on the side wall of the CVD oxide film. Furthermore,
The CVD oxide film is removed with ammonium fluoride. A tantalum oxide film 314 is formed to a thickness of 150 Å by thermal CVD using Ta (OC ₂ H ₅ ) ₅ as a source gas.

Finally, after a titanium nitride film 315 is formed by a CVD method as shown in FIG. 3C, patterning is performed through a normal photolithography process. Finally, heat treatment is performed in a nitrogen atmosphere at 500 ° C. for 1 hour, thereby completing a one-transistor / one-capacitor DRAM cell which does not deteriorate even after the subsequent heat treatment at 600 ° C.

The heat treatment after the formation of the titanium nitride film 315 may be performed in an Ar atmosphere or in a vacuum. Further, heat treatment may be performed at 750 ° C. for 1 minute in a nitrogen atmosphere.

Next, the effects of the embodiment of the present invention will be described. The effect of each of the above embodiments is described in the graph of FIG. In other words, after forming titanium nitride,
The changes in the leakage current in the case of the present embodiment in which the heat treatment is performed at 1 ° C. for one hour and the change in the leak current in the case of the conventional one in which the heat treatment is performed at 600 ° C. without performing the above heat treatment are compared by two graph curves. As is clear from this graph, when a capacitor prepared according to the process taught in the above embodiment and a capacitor not subjected to the heat treatment after forming the titanium nitride film are subjected to a heat treatment at 600 ° C. for 1 hour in a nitrogen atmosphere. Comparing the leakage current characteristics at
In the semiconductor device manufactured in this embodiment, the increase in the leak current of the insulating film is smaller than that in the semiconductor device manufactured by the conventional method. It is considered that the increase in the leak current is suppressed for the following reason. That is, the titanium nitride film is stabilized while suppressing the deterioration of the tantalum oxide film by the heat treatment after the formation of the titanium nitride film serving as the upper electrode, and the increase in leak current due to the reaction between titanium nitride and tantalum oxide is suppressed by the subsequent heat treatment. It is presumed that this is done.

The present invention is not limited to the above embodiments. In this embodiment, a tantalum oxide film is used for the capacitor insulating film, but another insulating film can be used. For example, zirconium oxide, hafnium oxide, titanium oxide, strontium titanate, barium titanate, lead titanate, PZT (lead zirconate titanate), PLZT (lead lanthanum zirconate titanate), or the like may be used. Further, in this embodiment, titanium nitride is used for the upper electrode, but instead, tantalum nitride, tungsten nitride, aluminum nitride, zirconium nitride,
Hafnium nitride or the like may be used. Further, metal nitride may be used for both the lower electrode, the upper electrode, and the lower electrode. Further, the present manufacturing method can be applied to a capacitor having another three-dimensional structure such as a trench capacitor other than the stacked capacitor shown in the present embodiment.

Various modifications can be made without departing from the spirit of the present invention.

[0033]

As described in detail above, according to the present invention, a heat treatment is performed once in a vacuum or in a non-oxidizing atmosphere after forming a metal nitride and before a desired heat treatment. Even afterwards, a large-capacity capacitor with a low leakage current without an increase in the leakage current can be realized. As a result, it is possible to contribute to the realization of highly integrated semiconductor elements having high reliability.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of a DRAM cell according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a manufacturing process of a DRAM cell according to a second embodiment of the present invention.

FIG. 3 is a sectional view showing a manufacturing process of a DRAM cell according to a third embodiment of the present invention.

FIG. 4 is a graph showing a change in leakage current for explaining the effect of each of the above embodiments.

[Explanation of symbols]

101, 201, 301 ... P-type silicon substrate, 102, 202, 303 ... CVD oxide film, 103, 203, 304 ... thin thermal oxide film, 104, 204, 305 ... first n + type polysilicon, 105, 205 , 306... N-type diffusion layer, 106, 206, 309... CVD oxide film, 107, 207, 310... Opening, 108... Second n + type polysilicon, 109, 209, 314. , 315: titanium nitride film, 120, 220, 320: groove, 208: first titanium nitride film, 210: second titanium nitride film, 307: tungsten silicide film, 308: polycrystalline silicon film, 311, 313 ... n + type polysilicon film.

Continued on the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 27/04 H01L 21/822 H01L 21/8242 H01L 27/108

Claims (2)

(57) [Claims] 1. A method for manufacturing a semiconductor device, wherein a conductive film formed on a semiconductor substrate and constituting at least one electrode is made of metal nitride and a metal oxide is used as a capacitor insulating film.
Forming the capacitive insulating film; and forming the at least one electrode as titanium nitride or titanium nitride.
Selected from the group consisting of tungsten, aluminum nitride
An upper electrode made of metal nitride is placed on the capacitor insulating film.
A method for manufacturing a semiconductor device , comprising: a step of directly forming a semiconductor element; and a step of performing a predetermined heat treatment in a non-oxidizing atmosphere or a vacuum after forming the upper electrode and before passing through a heating step. Wherein said semiconductor device is a capacitor, before Symbol capacitor insulating film, a tantalum oxide, strontium titanate, barium titanate, lead titanate, PZT, PL
2. The method according to claim 1, wherein the semiconductor device is made of a material selected from the group consisting of Z and PLZT.