JP3198578B2 - Synchronous closing relay - Google Patents
Synchronous closing relayInfo
- Publication number
- JP3198578B2 JP3198578B2 JP03725792A JP3725792A JP3198578B2 JP 3198578 B2 JP3198578 B2 JP 3198578B2 JP 03725792 A JP03725792 A JP 03725792A JP 3725792 A JP3725792 A JP 3725792A JP 3198578 B2 JP3198578 B2 JP 3198578B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- difference
- phase difference
- calculation unit
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、二つの電力系統を並入
する目的で使用される同期投入継電器に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous switching relay used for connecting two power systems.
【０００２】[0002]
【従来の技術】同期投入継電器は、二つの電力系統の電
圧を入力し、電圧差及び位相差が同期投入のための許容
範囲内であることを確認してから遮断器に投入指令を与
えて、二つの電力系統を同期投入するものとして知られ
ている。このため従来の同期投入継電器は、各電力系統
に対応する二つの電圧入力回路を備えており、各系統電
圧は補助計器用変圧器及びアナログフィルタをそれぞれ
介して電圧差や位相差の演算手段内に取り込まれるよう
に構成されている。2. Description of the Related Art Synchronous closing relays receive the voltages of two power systems, confirm that the voltage difference and the phase difference are within the allowable range for synchronous closing, and then give a closing command to a circuit breaker. It is known that two power systems are synchronized. For this reason, the conventional synchronous switching relay is provided with two voltage input circuits corresponding to each power system, and each system voltage is supplied to the voltage difference and phase difference calculation means via the auxiliary meter transformer and the analog filter, respectively. It is configured to be taken into.
【０００３】[0003]
【発明が解決しようとする課題】しかるに、上述した電
圧入力回路を構成する部品の経年変化等により、二つの
電圧入力回路間に利得特性や位相特性の相違が生じた場
合、この相違分が各電力系統の電圧差または位相差の検
出誤差要因となり、その結果同期検出精度が低下して継
電器の性能低下を招くという問題があった。このため従
来では、電圧入力回路の定期的な特性チェックや調整が
必要不可欠であり、継電器の保守点検作業に多くの時間
と労力を必要としていた。However, if a difference in gain characteristics or phase characteristics occurs between the two voltage input circuits due to the aging of the components constituting the voltage input circuit, the difference is determined by each component. This causes a detection error of a voltage difference or a phase difference in the power system, and as a result, there has been a problem that synchronization detection accuracy is reduced and performance of the relay is reduced. For this reason, in the related art, it is necessary and indispensable to periodically check and adjust the characteristics of the voltage input circuit, and the maintenance and inspection work of the relay requires much time and labor.
【０００４】本発明は上記問題点を解消するためになさ
れたもので、その目的とするところは、煩雑な保守点検
作業を要することなく常に高性能を維持することができ
る同期投入継電器を提供することにある。The present invention has been made to solve the above problems, and an object of the present invention is to provide a synchronous switching relay which can always maintain high performance without requiring complicated maintenance work. It is in.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するた
め、本発明は、二つの系統電圧の大きさの差及び位相差
が許容範囲内であることを条件として遮断器に投入指令
を与え、二つの電力系統を並入する同期投入継電器にお
いて、継電器の不使用時に、単一の監視電圧を各電力系
統に対する電圧入力回路を介してそれぞれ入力し、これ
らの電圧入力回路の出力電圧の大きさの差及び位相差を
予め演算する電圧差演算部及び位相差演算部と、前記単
一の監視電圧に関し電圧差演算部及び位相差演算部によ
り演算された電圧の大きさの差及び位相差について、許
容範囲の値をそれぞれ格納する電圧差メモリ及び位相差
メモリと、前記単一の監視電圧について電圧差演算部及
び位相差演算部により演算された電圧の大きさの差及び
位相差を監視し、これらが許容範囲外であるときに警報
出力する電圧差監視部及び位相差監視部と、継電器の使
用時に、前記各系統電圧について電圧差演算部及び位相
差演算部により演算された各系統電圧の大きさの差及び
位相差から、電圧差メモリ及び位相差メモリに格納され
た電圧の大きさの差及び位相差を各々減じる減算手段
と、を備え、これらの減算手段の出力を両系統電圧の補
正電圧差及び補正位相差として遮断器投入条件を判断す
るものである。To achieve the above object, the present invention provides a circuit breaker with a closing command provided that the difference between the two system voltages and the phase difference are within an allowable range. in synchronous put relay to NamiIri two power system, when not in use the relay, a single monitoring voltage inputted respectively through the voltage input circuit for each power system, the magnitude of the output voltage of the voltage input circuit Difference and phase difference
The voltage difference calculation unit and the phase difference calculation unit that are calculated in advance, and the voltage difference and the phase difference calculated by the voltage difference calculation unit and the phase difference calculation unit with respect to the single monitoring voltage, the value of the allowable range. as the voltage difference memory and a phase difference memory for storing each of the voltage difference calculation unit及for the single monitoring voltage
And the difference between the magnitudes of the voltages calculated by the phase difference calculation unit and
Monitors phase differences and alerts if they are out of tolerance
Use the output voltage difference monitor and phase difference monitor, and use a relay.
At the time of use, the magnitude of the voltage stored in the voltage difference memory and the phase difference memory is determined from the difference between the magnitude of each system voltage and the phase difference computed by the voltage difference computation unit and the phase difference computation unit for each of the system voltages. And subtracting means for reducing the difference and the phase difference, respectively. The output of these subtracting means is used as a corrected voltage difference and a corrected phase difference between the two system voltages to determine a circuit breaker closing condition.
【０００６】[0006]
【作用】本発明においては、継電器の不使用時（二つの
系統電圧を取り込んで同期投入判断を行なう前の状態）
に、単一の監視電圧を二つの電圧入力回路を介して内部
に取り込み、各電圧入力回路を経た監視電圧の電圧差及
び位相差を演算する。そして、許容範囲内にある電圧差
及び位相差を、各電圧入力回路間の利得特性または位相
特性の相違に起因するものとしてメモリに格納してお
く。継電器の使用に際しては、両系統電圧を前記各電圧
入力回路を介し取り込んで両系統電圧の電圧差及び位相
差を演算する。これらの電圧差及び位相差は、前もって
メモリに格納した電圧差及び位相差を含んだものである
から、これらを減じたものを両系統電圧間の本来の電圧
差（補正電圧差）及び位相差（補正位相差）として、遮
断器投入条件の判断に用いる。According to the present invention, when the relay is not used (before the two system voltages are fetched and the synchronization is determined).
Then, a single monitor voltage is fetched into the inside via two voltage input circuits, and the voltage difference and phase difference between the monitor voltages passed through each voltage input circuit are calculated. Then, the voltage difference and the phase difference within the allowable range are stored in the memory as being caused by the difference in the gain characteristic or the phase characteristic between the respective voltage input circuits. When the relay is used, both system voltages are taken in through the respective voltage input circuits, and a voltage difference and a phase difference between the two system voltages are calculated. Since these voltage difference and phase difference include the voltage difference and the phase difference previously stored in the memory, the difference between them is reduced to the original voltage difference (correction voltage difference) and the phase difference between the two system voltages. (Correction phase difference) is used to determine the breaker closing condition.
【０００７】[0007]
【実施例】以下、図に沿って本発明の一実施例を説明す
る。まず、図１はこの実施例にかかる同期投入継電器Ｒ
ｙの不使用時（二つの系統電圧を取り込んで同期投入判
断を行なう前の状態）のブロック図である。図におい
て、Ｓは継電器の不使用時において同期投入継電器Ｒｙ
に交流の監視電圧ｅWを入力する切り替えスイッチであ
り、継電器使用時にこのスイッチＳを切り替えることに
より、同期投入するべき第１及び第２の電力系統の系統
電圧ｅ1，ｅ2が入力されるように構成されている。ま
た、ＶＩ1，ＶＩ2は各電力系統に対応する電圧入力回路
であり、これらの電圧入力回路ＶＩ1，ＶＩ2は各々、補
助計器用変圧器ＰＴ1及び高調波等を除去するアナログ
フィルタＡＦ1、並びに、補助計器用変圧器ＰＴ2及びア
ナログフィルタＡＦ2から構成されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. First, FIG. 1 shows a synchronous closing relay R according to this embodiment.
It is a block diagram at the time of non-use of y (state before taking in two system voltages and making a synchronous ON determination). In the figure, S indicates a synchronously-connected relay Ry when the relay is not used.
A selector switch for inputting a monitored voltage e W AC to, by switching the switch S when relay use, system voltage e 1, e 2 of the first and second power system to be synchronized charged is input It is configured as follows. Further, VI 1 and VI 2 are voltage input circuits corresponding to the respective power systems. These voltage input circuits VI 1 and VI 2 are respectively an auxiliary instrument transformer PT 1 and an analog filter AF for removing harmonics and the like. 1, as well, and an auxiliary potential transformer PT 2 and the analog filter AF 2.
【０００８】電圧入力回路ＶＩ1，ＶＩ2を経た単一の監
視電圧ｅWはそれぞれΔＶ演算部（電圧差演算部）１Ａ
及びΔθ演算部（位相差演算部）２Ａに入力され、これ
らにおける演算結果がΔＶ監視部（電圧差監視部）１
Ｂ、ΔＶメモリ（電圧差メモリ）Ｍｖ、Δθメモリ（位
相差メモリ）Ｍθ及びΔθ監視部（位相差監視部）２Ｂ
に入力される。ここで、ΔＶ演算部１Ａ、Δθ演算部２
Ａ、ΔＶ監視部１Ｂ、Δθ監視部２Ｂは例えばＣＰＵ等
により構成され、また、ΔＶメモリＭｖ及びΔθメモリ
ＭθはＲＡＭ等により構成されている。The single monitoring voltage e W that has passed through the voltage input circuits VI 1 and VI 2 is applied to a ΔV calculator (voltage difference calculator) 1A, respectively.
And Δθ calculation unit (phase difference calculation unit) 2A, and the calculation results of these are input to ΔV monitoring unit (voltage difference monitoring unit)
B, ΔV memory (voltage difference memory) Mv, Δθ memory (phase difference memory) Mθ, and Δθ monitoring unit (phase difference monitoring unit) 2B
Is input to Here, ΔV calculation unit 1A, Δθ calculation unit 2
A, the ΔV monitoring unit 1B and the Δθ monitoring unit 2B are configured by, for example, a CPU, and the ΔV memory Mv and the Δθ memory Mθ are configured by a RAM or the like.
【０００９】継電器不使用時の動作を説明すると、不使
用時には監視電圧ｅWが電圧入力回路ＶＩ1，ＶＩ2を介
してΔＶ演算部１Ａ及びΔθ演算部２Ａに入力される。
ΔＶ演算部１Ａでは、各電圧入力回路ＶＩ1，ＶＩ2を経
た監視電圧ｅWの実効値から、電圧の大きさの差（以
下、単に電圧差という）ΔＶを求め、この値をΔＶメモ
リＭｖに格納すると共にΔＶ監視部１Ｂに送る。ΔＶ監
視部１Ｂでは、上記ΔＶが予め設定された許容範囲内で
あるか否かを判定し、許容範囲外であれば表示ランプや
外部への信号送出等の手段により警報として出力する。The operation when the relay is not used will be described. When the relay is not used, the monitoring voltage e W is input to the ΔV calculation unit 1A and the Δθ calculation unit 2A via the voltage input circuits VI 1 and VI 2 .
The ΔV calculation unit 1A obtains a difference in voltage magnitude (hereinafter simply referred to as a voltage difference) ΔV from the effective value of the monitoring voltage e W passed through each of the voltage input circuits VI 1 and VI 2 , and calculates this value as a ΔV memory Mv And sends it to the ΔV monitoring unit 1B. The ΔV monitoring unit 1B determines whether or not the ΔV is within a preset allowable range. If the ΔV is out of the allowable range, the ΔV is output as an alarm by means such as a display lamp or a signal transmission to the outside.
【００１０】また、Δθ演算部２Ａでは、各電圧入力回
路ＶＩ1，ＶＩ2を経た監視電圧ｅWの位相から位相差Δ
θを求め、この値をΔθメモリＭθに格納すると共にΔ
θ監視部２Ｂに送る。Δθ監視部２Ｂでは、上記Δθが
予め設定された許容範囲内であるか否かを判定し、前記
同様に許容範囲外であれば警報として出力する。In the Δθ calculating section 2A, the phase difference Δ か ら from the phase of the monitoring voltage e W passed through each of the voltage input circuits VI 1 and VI 2.
is obtained, this value is stored in a Δθ memory Mθ, and Δ
sent to the θ monitoring unit 2B. The Δθ monitoring unit 2B determines whether the Δθ is within a preset allowable range, and outputs an alarm if the Δθ is out of the allowable range as described above.
【００１１】このように、継電器Ｒｙの不使用時には、
電圧入力回路ＶＩ1，ＶＩ2間の利得特性や位相特性の相
違に起因する電圧差ΔＶ及び位相差Δθが演算され、こ
れらが各メモリＭｖ，Ｍθに格納されると共に、その値
に応じて警報が出力され、電圧入力回路ＶＩ1，ＶＩ2の
不良を告知する。なお、ΔＶまたはΔθが許容範囲外で
ある場合には、ΔＶメモリＭｖやΔθメモリＭθに格納
されたΔＶまたはΔθをクリア信号により消去するよう
にすれば、許容範囲内のΔＶやΔθのみが各メモリＭ
ｖ，Ｍθに保持されることになる。As described above, when the relay Ry is not used,
A voltage difference ΔV and a phase difference Δθ resulting from a difference in gain characteristics and phase characteristics between the voltage input circuits VI 1 and VI 2 are calculated, and stored in the memories Mv and Mθ, and an alarm is generated in accordance with the values. Is output to notify the failure of the voltage input circuits VI 1 and VI 2 . If ΔV or Δθ is out of the allowable range, if ΔV or Δθ stored in the ΔV memory Mv or Δθ memory Mθ is erased by a clear signal, only the ΔV and Δθ within the allowable range become the respective values. Memory M
v, Mθ.
【００１２】図２は、同期投入継電器Ｒｙの使用時にお
けるブロック図である。その構成の主要部は図１とほぼ
同様であるため詳述を省略し、以下では使用時における
動作を説明する。継電器Ｒｙの使用時には切り替えスイ
ッチＳを第１及び第２の電力系統側に切り替え、系統電
圧ｅ1，ｅ2を継電器Ｒｙに入力する。これにより、系統
電圧ｅ1，ｅ2が各々電圧入力回路ＶＩ1，ＶＩ2を介して
ΔＶ演算部１Ａ及びΔθ演算部２Ａに入力される。FIG. 2 is a block diagram when the synchronous turning-on relay Ry is used. The main part of the configuration is almost the same as that of FIG. When the relay Ry is used, the changeover switch S is switched to the first and second power system sides, and the system voltages e 1 and e 2 are input to the relay Ry. As a result, the system voltages e 1 and e 2 are input to the ΔV operation unit 1A and the Δθ operation unit 2A via the voltage input circuits VI 1 and VI 2 respectively.
【００１３】ΔＶ演算部１Ａでは、系統電圧ｅ1，ｅ2の
実効値から電圧差ΔＶを求めるが、この値は各電圧入力
回路ＶＩ1，ＶＩ2間の利得特性の相違による電圧差（不
使用時にΔＶメモリＭｖに格納した電圧差ΔＶ）を含ん
でいる。ΔＶ演算部１Ａにより求められた電圧差ΔＶは
減算手段Ａｄ1に入力され、ΔＶメモリＭｖに格納した
電圧差ΔＶが減じられて補正電圧差ΔＶ′が算出され
る。The ΔV calculation unit 1A calculates a voltage difference ΔV from the effective values of the system voltages e 1 and e 2. This value is calculated based on the difference in gain characteristics between the voltage input circuits VI 1 and VI 2. The voltage difference ΔV stored in the ΔV memory Mv at the time of use is included. Voltage difference [Delta] V determined by the [Delta] V operation unit 1A is inputted to the subtraction unit Ad 1, [Delta] V the voltage difference [Delta] V stored in the memory Mv is reduced correction voltage difference [Delta] V 'is calculated.
【００１４】すなわち、仮りに系統電圧ｅ1，ｅ2の大き
さが等しい場合、ΔＶ演算部１Ａにより求められた電圧
差ΔＶは各電圧入力回路ＶＩ1，ＶＩ2の利得特性の相違
による電圧差のみによるもので、減算手段Ａｄ1の出力
はゼロ（補正電圧差ΔＶ′＝０）となるから、系統電圧
ｅ1，ｅ2の大きさについて何ら補正する必要はないこと
になる。換言すれば、上記一連の電圧差補正手段は、系
統電圧ｅ1，ｅ2の電圧差として検出される信号から各電
圧入力回路ＶＩ1，ＶＩ2間の利得特性の相違による回路
固有の電圧差を差し引いて系統電圧ｅ1，ｅ2本来の差の
みを検出するように作用する。That is, if the magnitudes of the system voltages e 1 and e 2 are equal, the voltage difference ΔV obtained by the ΔV calculator 1A is the voltage difference due to the difference in the gain characteristics of the voltage input circuits VI 1 and VI 2. only due to the output of the subtracting means Ad 1 is from zero (correction voltage difference [Delta] V '= 0), so that there is no need to correct for the magnitude of system voltage e 1, e 2. In other words, the above-described series of voltage difference correction means uses a signal detected as a voltage difference between the system voltages e 1 and e 2 to determine a circuit-specific voltage difference due to a difference in gain characteristics between the voltage input circuits VI 1 and VI 2. Is subtracted to detect only the original difference between the system voltages e 1 and e 2 .
【００１５】系統電圧ｅ1，ｅ2の位相差Δθについても
同様の動作であり、Δθ演算部２Ａが位相差Δθを求
め、その値から減算手段Ａｄ2によりΔθメモリＭθ内
のΔθを減じて補正位相差Δθ′とする。よってこの位
相差補正手段は、前記電圧差補正手段とほぼ同様に、系
統電圧ｅ1，ｅ2の位相差として検出される信号から各電
圧入力回路ＶＩ1，ＶＩ2の位相特性の相違による回路固
有の位相差を差し引いて系統電圧ｅ1，ｅ2本来の位相差
のみを検出するように作用する。The same operation is performed for the phase difference Δθ between the system voltages e 1 and e 2. The Δθ calculation unit 2A obtains the phase difference Δθ, and subtracts Δθ in the Δθ memory Mθ by the subtraction means Ad 2 from the value. The correction phase difference is Δθ ′. Therefore, this phase difference correcting means is provided with a circuit based on a difference in phase characteristics of each of the voltage input circuits VI 1 and VI 2 from a signal detected as a phase difference between the system voltages e 1 and e 2 , similarly to the voltage difference correcting means. By subtracting the inherent phase difference, it acts so as to detect only the original phase difference of the system voltages e 1 and e 2 .
【００１６】しかる後、ＣＰＵは補正電圧差ΔＶ′及び
補正位相差Δθ′に基づき遮断器の投入条件すなわち両
電力系統の同期を確認し、遮断器に対して投入指令を出
力するものである。Thereafter, the CPU checks the closing condition of the circuit breaker, that is, the synchronization of both power systems, based on the corrected voltage difference ΔV ′ and the corrected phase difference Δθ ′, and outputs a closing command to the circuit breaker.
【００１７】[0017]
【発明の効果】以上のように本発明は、両系統の電圧入
力回路の経年変化等による利得特性や位相特性の相違を
予め検出して入力回路固有の誤差（電圧差及び位相差）
を格納しておき、継電器の実際の使用に当たってこれら
の誤差を考慮した補正電圧差及び補正位相差を求めるも
のである。このため、継電器が現在持っている入力回路
固有の誤差を考慮した補正が常に行われるので、継電器
を長年にわたり使用する場合でも、継電器の性能を常時
一定に維持することができる。従って、従来のように定
期的かつ頻繁な調整、保守点検を行わなくても同期検出
精度を高精度に保つことが可能になり、保守点検作業の
時間や労力を大幅に軽減することができる。As described above, according to the present invention, differences in gain characteristics and phase characteristics due to aging of the voltage input circuits of both systems are detected in advance and errors inherent in the input circuits (voltage difference and phase difference) are detected.
Are stored, and a correction voltage difference and a correction phase difference are determined in consideration of these errors when the relay is actually used. For this reason, since the correction is always performed in consideration of the error inherent in the input circuit of the relay, the performance of the relay can be constantly maintained even when the relay is used for many years. Accordingly, the synchronization detection accuracy can be maintained at a high accuracy without performing regular and frequent adjustments and maintenance inspections as in the related art, and the time and labor for maintenance inspection work can be greatly reduced.
【００１８】 また、監視電圧を用いて予め測定した電
圧差や位相差が許容範囲外である場合には警報出力する
ことにより、電圧入力回路の不良を迅速に検出可能とし
てメンテナンスを一層容易化することが可能である。 Further, by alarm output when the voltage difference and the phase difference measured in advance by using a monitoring voltage is outside the acceptable range, easier the maintenance failure of the voltage input circuit as quickly detectable It is possible to
【図１】本発明の一実施例の不使用時におけるブロック
図である。FIG. 1 is a block diagram when one embodiment of the present invention is not used.
【図２】本発明の一実施例の使用時におけるブロック図
である。FIG. 2 is a block diagram when one embodiment of the present invention is used.
１Ａ ΔＶ演算部（電圧差演算部） ２Ａ Δθ演算部（位相差演算部） １Ｂ ΔＶ監視部（電圧差監視部） ２Ｂ Δθ監視部（位相差監視部） Ｓ 切り替えスイッチ ＶＩ1，ＶＩ2 電圧入力回路 ＰＴ1，ＰＴ2 補助計器用変圧器 ＡＦ1，ＡＦ2 アナログフィルタ Ｍｖ ΔＶメモリ（電圧差メモリ） Ｍθ Δθメモリ（位相差メモリ） Ａｄ1，Ａｄ2 減算手段 Ｒｙ 同期投入継電器1A ΔV calculation unit (voltage difference calculation unit) 2A Δθ calculation unit (phase difference calculation unit) 1B ΔV monitoring unit (voltage difference monitoring unit) 2B Δθ monitoring unit (phase difference monitoring unit) S changeover switch VI 1 , VI 2 voltage input circuit PT 1, PT 2 auxiliary potential transformer AF 1, AF 2 analog filter Mv [Delta] V memory (voltage difference memory) M.theta [Delta] [theta] memory (phase difference memory) Ad 1, Ad 2 subtraction means Ry synchronization turned relay
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H02J 3/00 - 5/00 ──────────────────────────────────────────────────続 き Continuation of front page (58) Field surveyed (Int.Cl. 7 , DB name) H02J 3/00-5/00
Claims (1)
が許容範囲内であることを条件として遮断器に投入指令
を与え、二つの電力系統を並入する同期投入継電器にお
いて、継電器の不使用時に、 単一の監視電圧を各電力系統に対
する電圧入力回路を介してそれぞれ入力し、これらの電
圧入力回路の出力電圧の大きさの差及び位相差を予め演
算する電圧差演算部及び位相差演算部と、 前記単一の監視電圧に関し電圧差演算部及び位相差演算
部により演算された電圧の大きさの差及び位相差につい
て、許容範囲の値をそれぞれ格納する電圧差メモリ及び
位相差メモリと、前記単一の監視電圧について電圧差演算部及び位相差演
算部により演算された電圧の大きさの差及び位相差を監
視し、これらが許容範囲外であるときに警報出力する電
圧差監視部及び位相差監視部と、 継電器の使用時に、 前記各系統電圧について電圧差演算
部及び位相差演算部により演算された各系統電圧の大き
さの差及び位相差から、電圧差メモリ及び位相差メモリ
に格納された電圧の大きさの差及び位相差を各々減じる
減算手段と、 を備え、 これらの減算手段の出力を両系統電圧の補正電圧差及び
補正位相差として遮断器投入条件を判断することを特徴
とする同期投入継電器。1. A synchronous closing relay in which a break command is given to a circuit breaker on condition that a difference between a magnitude of the two system voltages and a phase difference are within an allowable range, and the two power systems are connected in parallel . when not in use, a single monitoring voltage inputted respectively through the voltage input circuit for each power system in advance Starring <br/> calculate the size difference and the phase difference between the output voltage of voltage input circuit A voltage difference calculation unit and a phase difference calculation unit; and a value of an allowable range for a difference between a magnitude of the voltage and a phase difference calculated by the voltage difference calculation unit and the phase difference calculation unit for the single monitoring voltage, respectively . A voltage difference memory and a phase difference memory; a voltage difference calculation unit and a phase difference function for the single monitoring voltage;
The difference in voltage magnitude and phase difference calculated by the calculation unit are monitored.
And output an alarm when they are out of the permissible range.
A pressure difference monitoring unit and a phase difference monitoring unit, and when using the relay , a voltage difference memory and a phase difference from the magnitude and phase difference of each system voltage calculated by the voltage difference calculation unit and the phase difference calculation unit for each system voltage. Subtraction means for reducing the difference between the magnitude of the voltage and the phase difference stored in the phase difference memory, respectively.The output of these subtraction means is used as a correction voltage difference and a correction phase difference between the two system voltages, and the circuit breaker closing condition is determined. Synchronous closing relay characterized by making a judgment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03725792A JP3198578B2 (en) | 1992-01-28 | 1992-01-28 | Synchronous closing relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03725792A JP3198578B2 (en) | 1992-01-28 | 1992-01-28 | Synchronous closing relay |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05207662A JPH05207662A (en) | 1993-08-13 |
| JP3198578B2 true JP3198578B2 (en) | 2001-08-13 |
Family
ID=12492603
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03725792A Expired - Lifetime JP3198578B2 (en) | 1992-01-28 | 1992-01-28 | Synchronous closing relay |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3198578B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102265368B (en) * | 2008-12-25 | 2014-09-17 | 三菱电机株式会社 | Phase-control switchgear and method for controlling switchgear |
-
1992
- 1992-01-28 JP JP03725792A patent/JP3198578B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102265368B (en) * | 2008-12-25 | 2014-09-17 | 三菱电机株式会社 | Phase-control switchgear and method for controlling switchgear |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05207662A (en) | 1993-08-13 |
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