JP3196875B2 - Super regeneration demodulation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a super regenerative demodulation circuit,
The present invention relates to a device that operates stably with respect to fluctuations in power supply voltage and that can obtain a high demodulation gain.

[0002]

2. Description of the Related Art Remote control devices using radio waves can be used indoors and outdoors both day and night, and are used, for example, for opening or closing gates or shutters. The radio wave used is not subject to the regulations of the Radio Law, for example, a weak radio wave in the 310 MHz band, and a receiving device uses a super-regeneration demodulation circuit or the like as a circuit for converting a received high-frequency signal into a low-frequency signal. You. FIG. 2 shows an example of a conventional super regenerative demodulation circuit. This circuit will be described. A coil is connected between the emitter and the ground of the transistor Q1.
A self-excited quenching oscillation circuit that intermittently oscillates at a frequency determined by L1, capacitor C1, and resistor R1 is provided. Between the collector and emitter, a coil L2, capacitor C2, and capacitor C3 are connected via a DC blocking capacitor C5 from input terminal 1 to input terminal 1. A modified Colpitts circuit oscillating in synchronization with the center frequency of the applied high-frequency signal is provided, and the start and stop of the oscillation of the Colpitts circuit are alternately repeated at the frequency of the quenching oscillation circuit, whereby the input terminal 1 A circuit for demodulating a high-frequency signal and outputting a low-frequency signal appearing at a load resistor R21 from an output terminal 2. A bias voltage divided by a resistor R2 and a resistor R3 is applied to the base of the transistor Q1. . The capacitor C4 is for bypassing a high-frequency signal component.

The demodulation gain of this circuit is determined by the resistance of the emitter.
Since it is determined by the ratio of R1 and the load resistor R21 of the collector, for example, when the power supply voltage is 5V, the resistor R1 is 1 KΩ, the resistor R21 is 10 KΩ, and the base bias resistor is equivalently parallel to the load resistor R21. Choosing a sufficiently large value for R2 prevents the equivalent load resistance value from lowering, and
Resistor to operate transistor Q1 at the optimum operating point
Although R2 and resistor R3 are set appropriately, if the power supply voltage drops, or if it is necessary to operate at a low power supply voltage depending on the operating conditions, these constants will reduce the collector voltage of transistor Q1 and reduce the resistance. Unless the value of the resistor R21 is reduced, it is not possible to secure an appropriate operating condition of the transistor Q1, and there is a problem that the gain is reduced by reducing the resistor R21.

[0004]

SUMMARY OF THE INVENTION An object of the present invention is to provide a proper operation state even when operated at a low power supply voltage, and to maintain a high demodulation gain. .

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a first coil and a first coil for forming a quenching oscillation circuit with an emitter of an NPN transistor.
A parallel circuit and a parallel circuit of a second coil and a second capacitor for connecting a collector to a ground through a parallel circuit of a first resistor and a first capacitor connected in series to the coil and forming a high-frequency oscillator circuit A second resistor connected to the power supply via a constant current circuit connected in series to the other end of the third capacitor having one end connected to the emitter, and a base connected in series between the power supply and the ground; and Connected to the connection point of the third resistor and to the ground via a bypass capacitor, applies a demodulated high-frequency signal to the collector via a DC blocking capacitor, and connects a parallel circuit of the second coil and the second capacitor. The super regenerative demodulation circuit was configured to output the demodulated low frequency signal from the connection point with the constant current circuit.

[0006]

With the above construction, in the super-regenerative demodulation circuit according to the present invention, a modified Colpitts-type high-frequency oscillation circuit oscillating in synchronization with the input high-frequency signal to be demodulated is provided in the collector circuit of the transistor, A self-excited quenching oscillation circuit is provided in the circuit, and the operation of starting and stopping the oscillation of the high-frequency oscillation circuit is repeated at the frequency of the signal from the quenching oscillation circuit to perform super-regeneration demodulation and demodulate the low-frequency signal. Output through a constant current circuit connected between the high frequency oscillation circuit and the power supply. Since the constant current circuit has a high high-frequency impedance, a high demodulation gain can be obtained, and a collector voltage required for operation can be secured even when the power supply voltage is reduced or a low power supply voltage is used.

[0007]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a super-regenerative demodulation circuit according to the present invention. FIG. 1 is a main part circuit diagram of an embodiment of a super-regeneration demodulation circuit according to the present invention. The super regenerative demodulation operation of this circuit is the same as that described in FIG. That is, for example, a 310 MHz band high frequency signal received by an antenna and amplified by a preamplifier (not shown) is input from the input terminal 1 and applied to the collector of the transistor Q1 via the DC blocking capacitor C5. Transistor Q1 is a common base type, and coil L connected between emitter and ground
1, constitute a self-excited quenching oscillation circuit that intermittently oscillates at the frequency determined by the capacitor C1 and the resistor R1,
A modified Colpitts circuit oscillating in synchronization with the frequency of the high-frequency signal applied to the collector is constituted by the coil L2, the capacitor C2, and the capacitor C3 connected between the collector and the emitter. Then, the modified Colpitts circuit repeatedly starts and stops oscillating at the frequency of the signal from the quenching oscillation circuit, and super-reproduces and demodulates the high-frequency signal applied to the collector into a low-frequency signal. The demodulated signal is taken out from the output terminal 2, and the remaining high-frequency signal component and the quenching frequency component are removed by a low-pass filter (not shown) and output. The resistors R2 and R3 are bias resistors that apply a bias voltage to the base of the transistor Q1, and the capacitor C4 is a bypass capacitor that bypasses high-frequency components.

[0008] Q2 and Q3 are PNP transistors. These transistors Q2, Q3 and a variable resistor
A constant current circuit is formed by R4, and a voltage is supplied from a power supply to the super-reproduction demodulation circuit via the constant current circuit. Since the constant current circuit has a very high impedance in terms of high frequency as viewed from the load side, it substantially becomes the load resistance of the super regenerative demodulation circuit, and this load resistance, that is, the demodulated low frequency signal Appears, so that this signal is taken out from the output terminal 2.

In the above constant current circuit, the emitter of the transistor Q2 is connected to a power supply, the collector is connected to a super-regenerative demodulation circuit which is a load, and the base is connected to the ground together with the base and collector of the transistor Q3 via a variable resistor R4. The emitter of the transistor Q3 is connected to the power supply. The operation of this constant current circuit will be described.
When the current of the load circuit, that is, the emitter-to-collector current decreases due to a decrease in the current, the base current decreases due to the decrease in the current, and the voltage of the variable resistor R4 decreases. Since the base of the transistor Q3 is connected to the variable resistor R4 together with the collector, the base current of the transistor Q3 increases so as to restore the voltage drop of the variable resistor R4, so that the base current of the transistor Q2 becomes It operates so as not to be able to decrease, that is, to suppress a decrease in load current. The above is the operation when the power supply voltage Vcc decreases. However, when the power supply voltage Vcc increases, the increase and decrease of the voltage and current are reversed. Also, when the load current fluctuates due to this operation, the operation is performed so as to cancel the fluctuation. Note that the value of the load current is adjusted by varying the variable resistor R4.If the power supply voltage has a margin or the variation in the DC current amplification factor of the transistors Q2 and Q3 is small, the The current may be replaced with a fixed resistance.

As described above, since the constant current circuit is a circuit having a very high impedance when viewed from the load side, by connecting the constant current circuit instead of the conventional load resistor R21, a load resistor having a high frequency impedance can be reduced. As a result, the connection is established, and a high demodulation gain can be obtained. Also, since the voltage drop by this constant current circuit is only the drop between the emitter and collector of transistor Q2,
As compared with the case where the conventional load resistor R21 is used, the drop of the power supply voltage is small, and the voltage required for the operation can be obtained when the power supply voltage drops or under the condition that the power supply voltage must be operated from the beginning. , Required demodulation gain can be obtained.

[0011]

As described above, according to the super-regenerative demodulation circuit of the present invention, since the load impedance of the super-regenerative demodulation circuit has a high value at high frequencies, a sufficient demodulation gain can be obtained. Even if the voltage drops, the voltage required for the operation of the circuit can be secured and the demodulation operation is performed normally, so if the power supply voltage is likely to drop or if it is necessary to operate with a low voltage from the beginning Especially effective.

[Brief description of the drawings]

FIG. 1 is a main part circuit diagram showing an embodiment of a super regenerative demodulation circuit according to the present invention.

FIG. 2 is a main part circuit diagram showing an example of a conventional super regenerative demodulation circuit.

[Explanation of symbols]

 1 Input terminal of demodulated high-frequency signal 2 Output terminal of demodulated signal Q1 NPN transistor Q2, Q3 PNP transistor L1, L2 Coil C1, C3, C4, C5 Capacitor C2 Variable capacitor R1, R2, R3 Resistor R4 Variable Resistor

Claims (4)

(57) [Claims] An emitter of an NPN transistor is connected to ground via a first coil for constituting a quenching oscillation circuit and a parallel circuit of a first resistor and a first capacitor connected in series to the first coil. The collector was connected to a power supply via a parallel circuit of a second coil and a second capacitor for forming a high-frequency oscillation circuit and a constant current circuit connected in series to the parallel circuit, and one end was connected to the emitter. Connected to the other end of the third capacitor, the base is connected to the connection point of the second and third resistors connected in series between the power supply and the ground, and connected to the ground via a bypass capacitor. Applying a signal to the collector via a DC blocking capacitor;
A super regenerative demodulation circuit characterized by outputting a demodulated low frequency signal from a connection point between a parallel circuit of a coil and a second capacitor and a constant current circuit. 2. A power supply side of a series circuit including the second resistor and the third resistor is connected to the constant current circuit and the second resistor.
2. The super-regenerative demodulation circuit according to claim 1, wherein said super-regeneration demodulation circuit is connected to a connection point of a parallel circuit comprising a coil and a second capacitor. 3. A constant current circuit comprising: a first PNP transistor having an emitter connected to a power supply, a collector connected to a power supply side of a parallel circuit including the second coil and the second capacitor, and an emitter connected to the power supply. And a second PNP transistor whose base and collector are connected to the base of the first PNP transistor, and whose base and collector are connected to ground via a fourth resistor. 3. The super-regenerative demodulation circuit according to claim 1 or 2. 4. The super-regenerative demodulation circuit according to claim 3, wherein a variable resistor is used as said fourth resistor.