JP3191698B2 - Mixer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a mixer used for various modulators, demodulators, detectors, multipliers, frequency converters, etc., and more particularly to a mixer used for a digital modulator.

[0002]

2. Description of the Related Art The structure of a conventional mixer device will be described with reference to FIG.

The modulator shown in FIG. 4 has a signal input terminal I10.
0, I200, I300 and signal output terminals O100, O100
200, DC power supply E, and choke resistors R100, R2
00, a mixer device 100, a differential amplifier 200, and a constant current circuit 300.

[0004] Of these, the mixer device 100 is an FET Q
100, Q200, Q300, and Q400. Further, the differential amplifier 200
FETs Q500 and Q600 and a capacitor C100 are included. Constant current circuit 300 includes FET Q700 and bias resistor R300. The mixer device 100, the differential amplifier 200, and the constant current circuit 300 are connected in series, and are supplied with power from the DC power supply E via the choke resistors R100 and R200.

Here, the modulation signal Ss is input to the signal input terminal I100, and the first local signal Sc1 having a higher frequency than the modulation signal Ss is input to the signal input terminal I200. The signal input terminal I300 receives a second local signal Sc2 which is 180 ° out of phase with the first local signal Sc1.

The modulation signal Ss is input to the gate G of the FET Q500 of the differential amplifier 200 via the signal input terminal I100, and has the same amplitude and a phase difference of 180 ° from the drains D of the FETs Q500 and Q600. The modulated signals Ss1 and Ss2 are output, respectively. Further, the modulated signals Ss1 and Ss2 are output from the FET Q100,
Each source S of Q200 and FETs Q300, Q40
0 to each source S. On the other hand, the first local signal Sc1 is given to each gate G of the FETs Q100 and Q300, and the second local signal Sc2 is
0, Q400.

Then, a signal obtained by mixing the first local signal Sc1 and the modulated signal Ss1 is output from the drain D of the FET Q100, and the second local signal Sc2 and the first modulated signal are output from the drain of the FET Q200. A signal obtained by mixing the signal Ss1 is output. Also,
From the drain of the FET Q300, the first local signal S
A signal obtained by mixing c1 and the modulated signal Ss2 is output, and a signal obtained by mixing the second local signal Sc2 and the modulated signal Ss2 is output from the drain of the FET Q400. Further, these mixed signals are synthesized, and the modulated signals Ss3 and Ss4 that are mutually balanced are output from the signal output terminals O100 and O200.

However, the mixer device 100 has a problem that low voltage operation and low power consumption generally required for electronic components cannot be realized. That is, the mixer device 100 is connected in series to the differential amplifier 200 and the constant current circuit 300, and the mixer device 10
0, the FET Q of the mixer device 100
In addition to the operating voltages of 100 to Q700, the DC power supply E needs to have a voltage sufficient to compensate for the voltage drop caused by the current flowing through the bias resistor R300 and the choke resistors R100 and 200. Can not. In addition, since a current is required to operate the mixer device 100, low power consumption cannot be supported.

The inventor of the present invention has solved such a problem and invented a mixer device capable of operating at a low voltage and consuming no power, and disclosed it in Japanese Patent Application No. Hei 7-189224. The configuration of this mixer device will be described with reference to FIG. 5, taking a case where the mixer device is used for a modulator as an example.

The modulator shown in FIG. 5 has a signal input terminal I1,
It includes I2, I3, signal output terminals O1, O2, a mixer device 11, a differential amplifier P composed of a differential amplifier and a constant current circuit, and a DC power supply E.

Here, the mixer device 11 includes an FET Q1
1, Q12, Q13, Q14 and capacitors C11, C
12, C13, C14, C15, inductor L11,
It is composed of a balanced mixer including L12, L13 and L12. Among them, the capacitor C15 is FE
It is provided between each source S of TQ11 to Q14 and the ground, and has a capacitance value that causes each source S of these FETs to float DC and to ground AC. The inductors L11 to L14 are choke inductors. Then, the mixer device 11 is connected in parallel to the differential amplifying unit P and is also connected to a DC power supply.

In the modulator configured as described above,
The modulation signal Ss is input through the signal input terminal I1, and two differential signals Ss1 and Ss2 having the same amplitude and different phases are output from the differential amplifier P. The modulated signals Ss1 and Ss2 are supplied to the drains D of the FETs Q11 and Q14 via the inductors L11 to L14, respectively. Further, the first and second local signals Sc1 and Sc2 are input via the signal input terminals I2 and I3, and F
In ETQ11 to Q14, local signals Sc1,
Sc2 and the modulated signals Ss1 and Ss2 are mixed.
The modulated signals mixed in this manner are the FETs Q11 to Q11.
14 is output. At this time, the modulated signals Ss1 and Ss2 are converted by the inductors L11 to L14 into modulated signals Ss1 and Ss2.
s is prevented from flowing out, and cancellation of these signals is avoided. Then, the FETs Q11 to Q14
The modulated signals output from are output from the capacitors C11 to C11.
The modulated signals S01 and S02 which are combined by the signal 14 and are mutually balanced are output from the signal output terminals O1 and O2.

Here, in the mixer device 11, the FE
In order for TQ11 to Q14 to operate, these FE
It suffices that a low voltage capable of positively securing each drain D and each source S can be supplied from the DC power supply E to each gate G of T, and low-voltage operation is possible.

In the mixer device 11, when the power is supplied from the DC power supply E, the FET is connected to the FET by the capacitor C15.
Since the sources S of the transistors Q11 to Q14 are DC open, the drains D and the sources S of these FETs have the same potential, and the FETs F11 to Q14 have the same potential.
No DC current flows through the ET. Therefore, FE
The power consumption of TQ11 to Q14 becomes zero.

[0015]

However, in the mixer device 11, a plurality of inductors L11 for choke are used.
Since L14 is required, when the mixer device is configured as an IC (integrated circuit), the chip area of the IC increases, and it is difficult to reduce the size generally required for electronic components.
Further, in order to drop the low-frequency modulation signal Ss to the ground, the capacity of the capacitor C15 must be increased, which increases the manufacturing cost.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a mixer device which does not require a choke inductor and a large-capacity capacitor, thereby realizing a downsizing and a reduction in manufacturing cost.

[0017]

In order to achieve the above object, in a mixer device according to the present invention, a mixer,
A mixer device including a bias voltage, a signal input terminal, a signal output terminal, and a power supply terminal, wherein the mixer includes:
An FET, a bypass capacitor, a first coupling capacitor, and a second coupling capacitor, wherein a gate of the FET is connected to the bias voltage, and the first coupling capacitor is connected to the bias voltage. Connected to the signal input terminal through the FET
A source of the FET is grounded via the bypass capacitor and connected to the power supply terminal, and a drain of the FET is connected to the signal output terminal via the second coupling capacitor. A signal is superimposed on a DC voltage from the power supply terminal and input, a local signal is input to the signal input terminal, and a modulated signal is output from the signal output terminal.

[0018] Further, two mixers are provided, the drains of the two mixers are connected to each other to form a balance, and a combined modulated signal of the two mixers is output.

A mixer device comprising a mixer, a bias voltage, a signal input terminal, a signal output terminal, and a power supply terminal, wherein the mixer includes an FET, a bypass capacitor, and a first coupling capacitor. And the second
Wherein said FET comprises a coupling capacitor of
Is connected to the signal input terminal via the first coupling capacitor and the gate of the FET is connected to the signal input terminal via the second coupling capacitor. Connected to an output terminal, the drain of the FET is grounded via the bypass capacitor and connected to the power supply terminal, and a modulation signal is input from the power supply terminal in a manner overlapping a DC voltage, A local signal is input to the signal input terminal, and a modulated signal is output from the signal output terminal.

[0020] Further, two mixers are provided, the sources of the two mixers are connected to each other to form a balanced configuration, and a combined modulated signal of the two mixers is output.

According to the mixer device of the present invention, the FE
Since the drain or source of T is not shared between the input of the modulated signal and the output of the modulated signal, there is no possibility that the modulated signal flows out toward the modulated signal. Therefore, an inductor for preventing such a modulated signal from flowing out is required, and downsizing is realized.

Further, since the modulation signal is input from the source of the FET, a large-capacity capacitor is not required, and the manufacturing cost is reduced.

Furthermore, since there is no direct current path between the drain and the source of the FET, no direct current flows and power consumption is zero.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a mixer device according to a first embodiment of the present invention will be described with reference to the drawings.

The mixer device of this embodiment includes the mixer 1 shown in FIG. The gate G of the FET Q constituting the mixer 1 is connected to the signal input terminal IN via the first coupling capacitor C1 and to the bias voltage Vg via the resistor R1. The source S is grounded via a bypass capacitor C2 and is connected to a power supply terminal Tvcc. The drain D is connected to the signal output terminal OUT via the second coupling capacitor C3.

Next, a description will be given of how the thus configured mixer device operates. First, the DC voltage V of the power supply terminal Tvcc is applied to the power supply terminal Tvcc of the FET Q.
The modulation signal fm is superimposed on cc, and the local signal fc is superimposed on the bias voltage Vg and input from the signal input terminal IN. Then, the modulated signal (fc ±
fm) is output from the signal output terminal OUT. here,
The value of the capacitance of the bypass capacitor C2 is set so as to be low impedance for the local signal fc and high impedance for the modulation signal fm.

According to the mixer device of this embodiment, F
Since the drain D or the source S of the ETQ is not shared between the input of the modulated signal and the output of the modulated signal, there is no possibility that the modulated signal (fc ± fm) flows out toward the modulated signal fm. Therefore, such a modulated signal (fc ± fm)
An inductor is required to prevent the outflow. As a result, especially when the mixer device is configured as an integrated circuit (IC), the chip area is reduced, and the miniaturization is realized.

The modulation signal fm is the source S of the FET Q.
, A large-capacity capacitor is not required, and the manufacturing cost is reduced.

Since the direct current path is cut off by the bypass capacitor C2 and the second coupling capacitor C3, the drain D-source S
No DC current flows during that time, and power consumption is zero.

In the circuit of FIG. 1, the source S and the drain D of the FET Q may be exchanged. That is,
The source S is connected to the signal output terminal OUT via the second coupling capacitor C3, and the drain D is connected to the ground via the bypass capacitor C2 and to the power supply terminal Tvcc. Even if it is, the same effect as the above embodiment can be obtained.

Next, the configuration of a mixer device according to a second embodiment of the present invention will be described with reference to the drawings.

The mixer device of this embodiment includes a balanced mixer 2 shown in FIG. The balanced mixer 2
A first mixer 3 and a second mixer 4 having a configuration similar to that of the mixer 1 shown in FIG. 1 are configured in a balanced manner. Here, the first FE constituting the first mixer 3
The drain D of the TQ 1 and the second
Are connected to the drain D of the FET Q2, the second coupling capacitor C3 and the bias voltage Vg.
Are shared by the first and second mixers 3 and 4.

Next, a description will be given of how the thus configured mixer device operates. First, the first FET
The modulation signal (0 °) is applied to the power supply terminal Tvcc of Q1 so as to overlap the DC voltage VCC of the power supply terminal Tvcc. Similarly, the DC voltage VCC of the second FET Q2
The modulation signal (180 °) is applied in superposition on the signal.

The signal input terminal I of the first FET Q1
N and a local signal (0
゜) is applied. Further, similarly, the second FET Q2
, A local signal (180 °) is applied to the bias voltage Vg.

Then, a modulated signal (fc ± fm) obtained by combining the signal modulated by the first FET Q1 and the signal modulated by the second FET Q2 is output from the signal output terminal OUT.

In this case, the first and second FETs Q1, FE
The values of the capacitances of the bypass capacitors C21 and C22 connected to the respective sources S of the TQ2 are set such that the local signal fc has a low impedance and the modulation signal fm has a high impedance. A second coupling capacitor C3 connected to each drain D of the first and second FETs Q1 and Q2 has a low impedance for the modulated signal (fc ± fm) and a low impedance for the modulated signal fm. The value of the capacitance is set so as to be high impedance.

According to the mixer device of this embodiment, each drain D or each source S of the first and second FETs Q1 and Q2 is connected to the input of the modulation signal fm and the modulation signal (fc ± f).
m) is not shared with the output of the modulated signal (fc ±
fm) does not flow out toward the modulation signal fm. Therefore, an inductor for preventing such a modulated signal (fc ± fm) from flowing out becomes unnecessary. As a result, especially when the mixer device is configured as an integrated circuit (IC), the chip area is reduced, and the miniaturization is realized.

Further, when the modulation signal fm is the FET Q1, the FET
The input from each source S of Q2 eliminates the need for a large-capacity capacitor, thereby reducing manufacturing costs.

Since the DC path is cut off by the bypass capacitor C2 and the second coupling capacitor C3, no DC current flows between the drain D and the source S of the FETs Q1 and Q2, and power is consumed. It becomes zero.

Further, according to the mixer device of this embodiment, a part of the circuit elements is shared by the two mixers to constitute a balanced mixer. Therefore, two discrete components of the mixer are combined to achieve the balance. The size is reduced as compared with the case where a domixer is configured. In particular, when the mixer device is configured as an integrated circuit (IC), the chip area is reduced and downsizing is realized.

Further, since the mixer device according to the present embodiment comprises a balanced mixer, as is generally known for a balanced mixer, the modulated signal is converted to (n · fc ±
m · fm), and when n and m are positive integers, the frequency component in which (n + m) is an odd number is reduced.

Next, an experimental result on an output characteristic with respect to the frequency of the mixer device according to the present embodiment will be shown.

This experiment was performed under the conditions shown in Table 1 below. As shown in FIG. 3, the desired modulated signal (fc ± fm) and the highest level of unnecessary waves (fc ± fm) were used. The difference is 3
5 dB or more, and good characteristics were obtained.

[0044]

[Table 1]

In the circuit shown in FIG. 2, the drain D and the source S may be replaced in the first and second FETs Q1 and Q2, respectively. That is, the sources S and S of the first and second FETs Q1 and Q2 are connected to each other, the sources S and S are connected to a signal output terminal OUT via a coupling capacitor C3, and the drain D is connected to a bypass. The same effect as in the above embodiment can be obtained by a configuration in which the power supply terminal Tvcc and the power supply terminal Tvcc are connected to ground via the capacitor C2.

[0046]

According to the mixer device of the present invention, F
Since the drain or source of the ET is not shared between the input of the modulation signal and the output of the modulation signal, there is no possibility that the modulation signal flows out toward the modulation signal, and the choke is used to prevent such a modulation signal. No inductor is required. Therefore, particularly when the mixer device is configured as an integrated circuit (IC), the chip area is reduced, and a low-cost and small-sized mixer device is realized.

Further, according to the mixer device of the present invention, since the modulation signal is input from the source of the FET, a large-capacity capacitor is not required, and miniaturization and reduction in manufacturing cost are realized.

Further, according to the mixer device of the present invention, since the DC path of the drain and the source of the FET is cut off by the capacitor, no DC current flows between the drain and the source, and the power consumption is reduced to zero. Become.

In the case where the mixer device according to the present invention comprises a balanced mixer, when a part of the circuit elements is shared by two mixers, compared with a case where two discrete components of the mixer are combined to form a balanced mixer. In particular, when the mixer device is configured as an integrated circuit (IC), the chip area is reduced, and downsizing is realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a mixer device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a mixer device according to a second embodiment of the present invention.

FIG. 3 is an output characteristic diagram showing output characteristics with respect to frequency in the mixer device of FIG. 2;

FIG. 4 is a circuit diagram showing a conventional mixer device.

FIG. 5 is a circuit diagram showing another conventional mixer device.

[Explanation of symbols]

 1, 3, 4 mixer 2 balanced mixer C1, C21, c22, C3 capacitor IN input terminal OUT signal output terminal Tvcc power supply terminal Vg bias voltage fc local signal fm modulation signal fc ± fm modulated signal

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03D 7/12 H03D 7/14 H04B 1/26

Claims (4)

(57) [Claims] 1. A mixer device comprising a mixer, a bias voltage, a signal input terminal, a signal output terminal, and a power supply terminal, wherein the mixer includes an FET, a bypass capacitor, and a first coupling capacitor. And a second coupling capacitor, wherein a gate of the FET is connected to the bias voltage and connected to the signal input terminal via the first coupling capacitor, Source is
Grounded via the bypass capacitor and connected to the power supply terminal, the drain of the FET is connected to the signal output terminal via the second coupling capacitor, and the modulation signal is A mixer device characterized in that a DC voltage is input from a terminal, a local signal is input to the signal input terminal, and a modulated signal is output from the signal output terminal. 2. The apparatus according to claim 1, further comprising two mixers, wherein drains of the two mixers are connected to each other to form a balance, and a combined modulated signal of the two mixers is output. 9. The mixer device according to item 1. 3. A mixer device comprising a mixer, a bias voltage, a signal input terminal, a signal output terminal, and a power supply terminal, wherein the mixer includes an FET, a bypass capacitor, and a first coupling capacitor. And a second coupling capacitor, wherein a gate of the FET is connected to the bias voltage and connected to the signal input terminal via the first coupling capacitor, Source is
The second coupling capacitor is connected to the signal output terminal, the drain of the FET is grounded via the bypass capacitor and connected to the power supply terminal, and the modulation signal is A mixer device wherein a DC voltage is input from a power supply terminal after being superimposed, a local signal is input to the signal input terminal, and a modulated signal is output from the signal output terminal. 4. A mixer comprising two mixers, wherein the sources of the two mixers are connected to each other and configured in a balanced manner,
The mixer device according to claim 3, wherein a composite modulated signal of the two mixers is output.