JP3182337B2 - Video data playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video data reproducing apparatus for reproducing video data encoded in accordance with the MPEG moving picture compression standard, and more particularly to a video data reproducing apparatus for converting a television system from an NTSC system to a PAL system. And a video data reproducing apparatus suitable for

[0002]

2. Description of the Related Art When video data is recorded as digital signals on a package medium such as a disk, a data compression technique is used in view of the data amount. I have. Video CDs and CD-I disks exist as package media on which video data is recorded by MPEG, and disk reproducing devices for reproducing these disks have been commercialized.

[0003] A disc reproducing apparatus for handling such video data is provided with a circuit for converting a television system of a video signal to be output according to a television system of a television monitor to be used. There are models that can output the video signal of the system.

[0004] Here, in the case of the NTSC system, the frame is composed of 30 frames per second of video, while in the case of the PAL system, it is composed of 25 frames of video per second. If the TV system of the video signal to be output is different, the transfer rate of the video data does not reach the intended data transfer rate. Therefore, when the TV system of the video data recorded on the disc to be reproduced is different from the TV system of the video signal to be output, the video data to be decoded is thinned out, or conversely, the same video data is output by repeating the same video data. Adjustments have been made to match the transfer rate of the video signal to be made to the television system.

[0005]

When the transfer rate of a video signal to be output is adjusted in accordance with the television system by thinning out video data to be decoded, the TV monitor is provided with the thinned-out video data. There is a problem that the projected image is not smooth. For example, when a disc on which NTSC video data is recorded is reproduced and a PAL video output is obtained, 30 frames of video per second are converted to 25 frames per second, so that there is a video that is not displayed every 6 frames. , About 16.7% of the images were not displayed.

[0006]

According to the present invention, the period for decoding the same video data can be selectively switched between one field period and two field periods, and the period for decoding the same video data is set to one field. The combination of the period and the two-field period is adjusted so that the transfer rate of the video data is adjusted to the television system having the smaller number of frames per second.

Further, the video decoder is configured to temporarily store the video data in a buffer memory and then perform a decoding process, and a period for decoding the same video data is switched according to the amount of video data stored in the buffer memory. In a state where the data amount of the buffer memory is larger than a preset set data amount, the decoding processing period is switched to a short period side so that the data amount of the buffer memory is reduced and the buffer memory is reduced. When the data amount of the buffer memory is smaller than the set data amount, the decoding process period is not switched to the short-term side, and the data amount of the buffer memory is increased so that the data amount of the buffer memory is increased. Video decoder by increasing or decreasing It is converted into transfer rate transfer rate different from the video data to be written to the transfer rate of the video data in the buffer memory with an average constant which is more decoding.

[0008]

FIG. 1 is a circuit block diagram showing an embodiment of the present invention. FIG.
1 shows a video data reproducing apparatus of a disc player corresponding to a video CD on which video data is recorded in the EG1 format.

In FIG. 1, reference numeral 1 denotes an audio-only CD.
-CD-ROM data decoded to the same range as the DA disk format is input, and the CD-RO
A CD-ROM decoder that performs decoding processing specific to the CD-ROM data format on the M data;
Various additional data included in the CD-ROM data output from the D-ROM decoder 1 is decoded, and
A separation circuit 3 for separating the video data in the D-ROM data is a video decoder for decoding the video data separated by the separation circuit 2 frame by frame.

The video decoder 3 can selectively output video data to be output according to the television system of the NTSC system and the PAL system, and the vertical video inserted into the video data at a timing corresponding to the selected television system. V sync generation circuit 4 for generating a synchronization signal (V sync)
It has.

Reference numeral 6 denotes a buffer RA in which video data decoded by the video decoder 3 is temporarily stored.
M and 7 are RAM management circuits for controlling writing and reading of video data in the buffer RAM 6.

Reference numeral 8 denotes a decode period switching circuit for selectively switching the period during which the same video data is decoded by the video decoder 3 between a one-field period and a two-field period.
A V-sync counter 10 for counting the number of syncs is a television system switching circuit for selectively switching the television system of the decoded video data output from the video decoder 3 between the NTSC system and the PAL system.

The operation of the disk player thus configured will be described below. CD-ROM decoder 1
The video data, audio data and various types of additional data are separated from the CD-ROM data output from the decoder by the separating circuit 2, and the video data and the additional data necessary for decoding the video data are supplied to the video decoder 3. The video data is temporarily stored in the buffer RAM 6 and then decoded by the video decoder 3.

The video decoder 3 switches the television system of the decoded video data to be output according to the switching state of the television system switching circuit 10,
The timing of the V-sync generated from the V-sync generating circuit 4 is switched according to the selected television system, and the video decoder 3 outputs the decoded video data with the V-sync inserted at the timing according to the selected television system. Is output.

Now, it is assumed that the television system of the television monitor to be used is the PAL system. In this case, the video decoder 3 is switched to the PAL system by the television system switching circuit 10. In this state, the video data is NTS
When the reproduction of the disc recorded in the C system is performed, the video data supplied to the video decoder 3 is subjected to a decoding process corresponding to the processing procedure shown in the flowchart of FIG.

The decoding process of video data in this case will be described with reference to FIG. From the video data stored in the buffer RAM 6, video data decoded by the video decoder 3 under the control of the RAM management circuit 7 is read out for each frame (step a).

On the other hand, at the same time that the video data is read, the V sync counter 9 is reset, and the count value N is initialized to "0" (step b).
Next, decoding of the read video data is started (step c). When the decoding process of the video data is started, the V sync is generated by the V sync generating circuit 4, and when the V sync is generated, the count value N is incremented by one by the V sync counter 9. (Steps d and e).

In this case, the decoding time in the video decoder 3 differs for each video data due to the difference in the amount of video data. Therefore, the number of times the V sync is generated by the V sync generating circuit 4 during the period in which one video data is decoded is not constant for each video data.

When the decoding process of the video data is started, the completion of the decoding process is detected (step f), and when the completion of the decoding process is detected, the V sync counter 9 at that time is detected. It is determined whether the count value N is “2” or more (step g). V
If the count value N of the sync counter 9 is equal to or more than “2”, the V sync counter 9 is reset, and new video data is read from the buffer RAM 6.
The decoding process of the next video data is started.

On the other hand, the count value N of the V sync counter 9
Does not reach “2”, that is, when the count value N is “1” (N = 0 does not exist since the completion of the video data decoding process is detected), the buffer RA
It is determined whether or not the data amount of the video data stored in M6 is equal to or larger than a preset data amount (step h), and the data amount of the video data stored in the buffer RAM 6 has reached the set data amount. If not, the same video data is repeatedly displayed during the 1V sync period (step i).

Therefore, if the amount of video data stored in the buffer RAM 6 at the time when the completion of the decoding process is detected does not reach the set data amount, the same video data is not repeated until V sync is generated twice. The decoding process is performed, that is, the decoded video data is output from the video decoder 3 so that the video data of one picture is displayed over two field periods.

Here, the set data amount is a buffer RA
The data amount of M6 is set in consideration of the memory capacity that is considered to be able to utilize the memory capacity of the buffer RAM 6 as effectively as possible within a range in which the occurrence of overflow can be avoided. Although the set data amount changes according to the number of bits of the video data,
When a 4 Mbit RAM is used for the video data of EG1, for example, it is set to 80% of the memory capacity.

By the way, when the completion of the decoding process of the video data is detected, the count value N of the V sync counter 9 has not reached 2, and the data amount of the video data stored in the buffer RAM 6 is set in advance. If the data amount is equal to or larger than the set data amount, the V sync counter 9
Is reset, new video data is read from the buffer RAM 6, and the decoding process of the next video data is started.

On the other hand, if the data amount of the video data stored in the buffer RAM 6 does not reach the preset data amount, the same decoded video data is generated twice from the video decoder 3 in V sync. , And video data for one picture is displayed over a two-field period.

Therefore, if the amount of video data stored in the buffer RAM 6 is equal to or larger than the set data amount even if the V sync is not generated twice at the time when the completion of the decoding process is detected, In this case, the video data transferred from the buffer RAM 6 is decoded. That is, in this case, if the picture is a B picture, the video data for one picture is decoded from the video decoder 3 so as to be displayed only for one field period. The state in which the processed video data is output selectively occurs.

When displaying video data recorded on a video CD on a television monitor, one frame of a moving image is constituted by displaying video data of one picture repeatedly for two field periods. If one video data is displayed for only one field period, the transfer rate of the decoded video data output from the video decoder 3 is increased.

On the other hand, in the state where the video decoder 3 is switched to the PAL system and the disk on which the video data is recorded in the NTSC system is being reproduced,
A moving image is composed of 30 frames per second in the NTSC system, whereas a moving image is composed of 25 frames per second in the PAL system. Therefore, video data of one picture is repeatedly displayed for two field periods to constitute one frame. By doing so, the buffer RAM 6 is set at a higher rate than the transfer rate of the video data decoded by the video decoder 3.
The transfer rate of the video data written to the memory becomes high. For this reason, video data read from the disc cannot be repeatedly displayed for one picture for all two-field periods, but one picture is used for decoding processing for displaying video data for one picture repeatedly for two field periods. By mixing decoding processes for displaying video data for only one field period, the transfer rate of decoded video data output from the video decoder 3 can be lower than the transfer rate of video data read from the disk.

At this point, when the video data for one picture is decoded to display only one field period and the process proceeds to the decoding process for the next video data, the video data from the buffer RAM 6 is transferred at a data transfer rate of writing to the buffer RAM 6. The read data transfer rate is increased, and the amount of video data stored in the buffer RAM 6 is reduced. The decoding process of displaying video data for one picture for only one field period is performed when the amount of data stored in the buffer RAM 6 is equal to or larger than the set data amount.
If the amount of data stored in the storage device becomes smaller than the set data amount, the process shifts to a decoding process in which video data for one picture is repeatedly displayed for two field periods. Therefore, the data amount stored in the buffer RAM 6 repeatedly increases and decreases based on the set data amount, and the transfer rate of the video data read from the buffer RAM 6 becomes a speed corresponding to the PAL system on average.

As a result, the video decoder 3 decodes all the video data read from the disk without thinning out, and then holds the transfer rate of the decoded video data output from the video decoder 3 in a state corresponding to the PAL system. I can do it.

Therefore, although there is video data displayed only for one field period in addition to video data displayed for two field periods of the appropriate period, NTSC
All of the video data recorded on a disc compatible with the system can be displayed on a PAL television monitor.

In this case, as a result, an average of 2
If 20 frames of video data to be displayed in the field period are provided and 10 frames of video data to be displayed in the 1 field period are provided, the video data of 30 frames displayed in the 60 field period can be converted to the PAL format if the system is compatible with the NTSC system. It will be displayed in the corresponding 50 field period.

The number of occurrences of the V sync at the time when the decoding process is completed by the video decoder 3 is represented by V
Since the field period for displaying video data by counting by the sync counter is set, the decoding process is performed by reliably switching the video data between the two-field period and the one-field period with a simple configuration.

[0033]

As described above, according to the present invention, the period for decoding the same video data is switched so that video data processed in two field periods and video data processed in one field period are mixed. NTS
When all video data corresponding to the C system can be displayed on the PAL system TV monitor, and the data transfer rate is adjusted according to the TV system of the TV monitor by thinning out video data to be decoded as in the conventional case. A much smoother image can be displayed as compared with.

Further, according to the present invention, the video decoder is temporarily stored in a buffer memory and then decoded, and the same video data is decoded in accordance with the amount of video data stored in the buffer memory. Since the data amount of the buffer memory is increased or decreased based on a preset data amount, the transfer rate of the video data decoded by the video decoder is changed and the average is kept constant. In addition, the transfer rate can be converted to a transfer rate different from the transfer rate of the video data written in the buffer memory. According to the TV system of the monitor It can be adjusted to the data transfer rate.

The buffer memory has an effect of absorbing a difference between a clock for decoding video data by a video decoder and a clock for demodulating a recording signal read from a signal recording medium.

Further, since the number of occurrences of the V sync at the time when the decoding process is completed by the video decoder is counted by the V sync counter to set the field period for displaying the video data, the video data is displayed with a simple structure. The decoding process can be performed by switching the data between the two-field period and the one-field period.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing one embodiment of the present invention.

FIG. 2 is a flowchart showing a decoding process of video data in the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 CD-ROM decoder 3 Video decoder 4 V sync generation circuit 6 Buffer RAM 7 RAM management circuit 8 Decode period switching circuit 9 V sync counter

Claims (3)

(57) [Claims] 1. A video data reproducing apparatus for reproducing video data encoded in accordance with the moving image compression standard of MPEG, comprising: a video decoder for decoding video data; A decoding period switching circuit for selectively switching a period for decoding processing between a one-field period and a two-field period, wherein a period for processing video data in a one-field period and a period for processing video data in a two-field period A video data reproducing apparatus characterized in that video data of the NTSC system is converted to the PAL system by mixing the video data. 2. A video data reproducing apparatus for reproducing video data encoded in accordance with the moving image compression standard of MPEG, comprising: a video decoder for decoding video data; and a video decoder for decoding by the video decoder. A buffer memory for temporarily storing video data
A decoding period switching circuit for selectively switching a period in which the same video data is decoded by the video decoder between a one-field period and a two-field period, wherein the video data stored in the buffer memory is a preset data. A video data reproducing apparatus, wherein a period during which the video decoder decodes the same video data is switched to a one-field period by the decoding period switching circuit on condition that the amount of data has reached an amount. 3. The video decoder generates a vertical synchronizing signal at a timing set according to a television system, counts the number of times of inputting the vertical synchronizing signal, and decodes video data for each frame by the video decoder. A counter which is reset each time processing is completed, and switches a decoding processing period of the video decoder by the decoding period switching circuit according to a count value of the counter and a data amount of video data stored in the buffer memory. 3. The video data reproducing apparatus according to claim 1, wherein