JP3178119U - Semiconductor device and semiconductor package using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of preventing ionization of copper ions contained in a copper-containing bump.
A semiconductor device includes a carrier, a plurality of under-bump metal layers, a plurality of copper-containing bumps, and at least one organic barrier layer. The under-bump metal layer 120 is formed on the plurality of conductive pads 113 and has a ring wall 121. The copper-containing bump 130 is formed on the plurality of under-bump metal layers 120 and has an upper surface 131 and an annular surface 132 bonded to the upper surface 131. The organic barrier layer 140 has a bump covering portion 141 that covers the upper surface 131 of the copper-containing bump 130, the annular surface 132, and the ring wall 121. Thereby, the semiconductor device 100 can prevent a short circuit due to ionization of copper ions when the copper-containing bumps 130 have a fine pitch.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an organic barrier layer.

  The appearance of electrical appliances has been developed in pursuit of lightness, thinness, shortness, and smallness, and members that are electrically connected such as bumps or pins have developed in the direction of fine pitches.

  However, when a member to be electrically connected such as a bump portion or a pin contains copper, there is a problem that a short circuit occurs due to ionization of copper ions, leading to a product defect.

  The present invention has been made in view of such conventional problems. An object of the present invention is to provide a semiconductor device capable of preventing ionization of copper ions contained in a copper-containing bump.

  The semiconductor device of the present invention has a surface, a protective layer formed on the surface, and a plurality of conductive pads formed on the surface. The protective layer forms a plurality of openings and a plurality of openings. A plurality of under-bump metal layers formed on the plurality of conductive pads, and a plurality of annular surfaces formed on the plurality of under-bump metal layers and bonded to the top surface. It is characterized by comprising a copper-containing bump and at least one organic barrier layer having a bump coating portion covering the upper surface and the annular surface of the copper-containing bump.

  By providing the organic barrier layer in the semiconductor device, it is possible to prevent a short circuit due to ionization of copper ions when a fine pitch is formed on the copper-containing bump.

  According to the present invention, a semiconductor device having an organic barrier layer can be obtained.

It is the schematic of the cross section of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section of the semiconductor device by 2nd embodiment of this invention. It is the schematic of the cross section of the semiconductor device by 3rd embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section in the manufacture stage of the semiconductor device by 1st embodiment of this invention. It is the schematic of the cross section of the semiconductor package using the semiconductor device by 1st embodiment of this invention.

  Embodiments of the present invention will be described below with reference to the drawings. The present invention is not limited to the embodiments described below.

(First embodiment)
A semiconductor device 100 according to the first embodiment of the present invention shown in FIG. 1 includes a carrier 110, a plurality of under-bump metal layers 120, a plurality of copper-containing bumps 130, and at least one organic barrier layer 140. The carrier 110 includes a surface 111, a protective layer 112 formed on the surface 111, and a plurality of conductive pads 113 formed on the surface 111.

  The protective layer 112 forms a plurality of openings 112 a that expose the plurality of conductive pads 113. The carrier 110 is selected from any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate. In the first embodiment, the carrier 110 is a silicon substrate.

  The plurality of under-bump metal layers 120 are formed on the plurality of conductive pads 113. The plurality of copper-containing bumps 130 are formed on the plurality of under-bump metal layers 120 and include an upper surface 131 and an annular surface 132 bonded to the upper surface 131.

The organic barrier layer 140 includes a bump covering portion 141 that covers the upper surface 131 and the annular surface 132 of the copper-containing bump 130. Preferably, the under-bump metal layer 120 has a ring wall 121, and the bump coating portion 141 covers the ring wall 121 of each under-bump metal layer 120. In the first embodiment, the organic barrier layer 140 is thinner than 10 μm, and the organic barrier layer 140 is formed of an organic polymer material. The organic barrier layer 140 is one of benzotriazole, phenylimidazole, substituted phenylimidazole, or arylphenylimidazole, and the structural formula thereof is as follows.

The organic barrier layer 140 is formed from a phenylimidazole compound, formic acid, aqueous ammonia, acetic acid and water, and the viscosity of the mixture of organic barrier layers is in the range of 1 to 1.2 cP.
By providing the organic barrier layer 140, the semiconductor device 100 can prevent a short circuit due to ionization of copper ions when the plurality of copper-containing bumps 130 have a fine pitch.

Next, the manufacturing process of the semiconductor device of the first embodiment will be described based on FIGS. 4A to 4G.
The manufacturing process of the semiconductor device of the first embodiment includes at least the following steps.
First, as shown in FIG. 4A, a carrier 110 having a surface 111, a protective layer 112 formed on the surface 111, and a plurality of conductive pads 113 formed on the surface 111 is provided.
The protective layer 112 includes a plurality of openings 112a, and the plurality of openings 112a are exposed to the plurality of conductive pads 113. The carrier 110 is any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate. One is selected. In the first embodiment, the carrier 110 is a silicon substrate.

  Next, as shown in FIG. 4B, a plurality of under-bump metal layers 120 are formed on the plurality of conductive pads 113. The under-bump metal layer 120 is formed so as to extend on the protective layer 112 and forms a ring wall 121.

  Next, as shown in FIG. 4C, a photoresist layer P is formed on the protective layer 112 and the plurality of under-bump metal layers 120. Subsequently, as shown in FIG. 4D, a plurality of bump openings P1 are formed in the patterned photoresist layer P, and the bump openings P1 expose the metal layer 120 under the bumps.

  Next, as shown in FIG. 4E, the copper-containing metal layer M is formed on the plurality of under-bump metal layers 120, and the plurality of copper-containing bumps 130 are formed on the copper-containing metal layer M. Subsequently, as shown in FIG. 4F, the photoresist layer P is removed, and the copper-containing bumps 130 are exposed. As a result, the copper-containing bump 130 has an upper surface 131 and an annular surface 132 joined to the upper surface 131.

Finally, as shown in FIG. 4G, an organic barrier layer 140 is formed so as to cover the copper-containing bumps 130. The organic barrier layer 140 has a bump covering portion 141 that covers the upper surface 131 of the copper-containing bump 130, the annular surface 132, and the ring wall 121 of each metal layer 120 under the bump. In the first embodiment, the thickness of the organic barrier layer 140 is less than 10 μm, and the material of the organic barrier layer 140 is selected from organic polymer materials. The organic barrier layer 140 is selected from any one of benzotriazole, phenylimidazole, substituted phenylimidazole, and arylphenylimidazole, and the structural formula thereof is as follows.

  The organic barrier layer 140 is formed from a phenylimidazole compound, formic acid, aqueous ammonia, acetic acid, and water, and the viscosity of the mixture of the organic barrier layers is in the range of 1 to 1.2 cP.

  A semiconductor package 10 using the semiconductor device 100 according to the first embodiment of the present invention is shown in FIG. The semiconductor package 10 includes at least a semiconductor device 100 and a substrate 300.

  The semiconductor device 100 includes a carrier 110, a plurality of under-bump metal layers 120, a plurality of copper-containing bumps 130, and at least one organic barrier layer 140. The carrier 110 includes a surface 111, a protective layer 112 formed on the surface 111, and a plurality of conductive pads 113 formed on the surface 111.

  The protective layer 112 includes a plurality of openings 112a, and the plurality of openings 112a exposes the plurality of conductive pads 113. The carrier 110 is selected from any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate. In the first embodiment, the carrier 110 is a silicon substrate.

  The plurality of under-bump metal layers 120 are formed on the plurality of conductive pads 113. The under-bump metal layer 120 has a ring wall 121, and the plurality of copper-containing bumps 130 are formed on the plurality of under-bump metal layers 120. The copper-containing bump 130 has an upper surface 131 and an annular surface 132 joined to the upper surface 131.

  The organic barrier layer 140 has a bump covering portion 141 that covers the annular surface 132 of the copper-containing bump 130 and the ring wall 121 of each bump-underlying metal layer 120. The organic barrier layer 140 is thinner than 10 μm, and the organic barrier layer 140 is made of an organic polymer material. The material of the organic barrier layer 140 is selected from any one of benzotriazole, phenylimidazole, substituted phenylimidazole, and arylphenylimidazole. The organic barrier layer 140 is formed from a phenylimidazole compound, formic acid, aqueous ammonia, acetic acid, and water, and the viscosity of the mixture of the organic barrier layers is in the range of 1 to 1.2 cP.

  The substrate 300 includes a plurality of connection pads 310 and a solder mask layer 320. The solder mask layer 320 includes a plurality of groove portions 321 that expose the plurality of connection pads 310. The plurality of connection pads 310 are connected to the plurality of copper-containing bumps 130, and the bump coating portion 141 of the organic barrier layer 140 covers the solder mask layer 320.

(Second embodiment)
In the semiconductor device 100 according to the second embodiment of the present invention shown in FIG. 2, the organic barrier layer 140 further includes a protective layer covering portion 142 that covers the protective layer 112.

(Third embodiment)
A semiconductor device 200 according to the third embodiment of the present invention illustrated in FIG. 3 includes at least a carrier 210, a plurality of copper-containing bumps 220, and at least one organic barrier layer 230. The carrier 210 includes a surface 211, a protective layer 212 formed on the surface 211, and a plurality of conductive pads 213 formed on the surface 211.

  The protective layer 212 forms a plurality of openings 212a and the plurality of openings 212a exposes the plurality of conductive pads 213. The carrier 210 is selected from any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate. In the third embodiment, the carrier 210 is a silicon substrate.

  The plurality of copper-containing bumps 220 are formed on the plurality of conductive pads 213. The copper-containing bump 220 has an upper surface 221 and an annular surface 222 joined to the upper surface 221.

  The organic barrier layer 230 includes a bump covering portion 231 that covers the upper surface 221 and the annular surface 222 of the copper-containing bump 220. The organic barrier layer 230 is thinner than 10 μm, and the organic barrier layer 230 is made of an organic polymer material. The material of the organic barrier layer 230 is selected from any one of benzotriazole, phenylimidazole, substituted phenylimidazole, and arylphenylimidazole. The organic barrier layer 230 is formed of a phenylimidazole compound, formic acid, ammonia water, acetic acid, and water, and the viscosity of the mixture of the organic barrier layers is in the range of 1 to 1.2 cP.

  As mentioned above, this invention is not limited to such embodiment, In the range which does not deviate from the meaning of invention, it can implement with a various form.

10: semiconductor package, 100: semiconductor device, 110: carrier, 111: surface, 112: protective layer, 112a: opening, 113: conductive pad, 120: metal layer under bump, 121: ring wall, 130: copper-containing bump 131: upper surface, 132: annular surface, 140: organic barrier layer, 141: bump coating part, 142: protective layer coating part, 200: semiconductor device, 210: carrier, 211: surface, 212: protective layer, 212a: Openings, 213: conductive pads, 220: copper-containing bumps, 221: upper surface, 222: annular surface, 230: organic barrier layer, 231: bump coating, 300: substrate, 310: connecting pad, 320: solder mask layer 321: groove portion, M: copper-containing metal layer, P: photoresist layer, P1: bump opening.

Claims (25)

A surface, a protective layer formed on the surface, and a plurality of conductive pads formed on the surface, wherein the protective layer forms a plurality of openings, and the plurality of openings include a plurality of the conductive layers. A carrier that exposes the pad;
A plurality of under-bump metal layers formed on the plurality of conductive pads;
A plurality of copper-containing bumps including copper and formed on a plurality of metal layers under the bumps, each having an upper surface and a ring wall bonded to the upper surface;
A bump coating portion, the bump coating portion covering at least one organic barrier layer covering the upper surface and the annular surface of the copper-containing bump;
A semiconductor device comprising:   The semiconductor device according to claim 1, wherein the organic barrier layer further includes a protective layer covering portion for covering the protective layer.   The semiconductor device according to claim 1, wherein the organic barrier layer has a thickness of less than 10 μm.   The semiconductor device according to claim 1, wherein the organic barrier layer has a viscosity in a range of 1 to 1.2 cP.   The semiconductor device according to claim 1, wherein the organic barrier layer is formed of an organic polymer material.   The semiconductor device according to claim 5, wherein the organic barrier layer is formed of any one of benzotriazole, phenylimidazole, substituted phenylimidazole, or arylphenylimidazole.   The semiconductor device according to claim 1, wherein the organic barrier layer is formed of a phenylimidazole compound, formic acid, aqueous ammonia, acetic acid, and water.   The semiconductor device according to claim 1, wherein the carrier is any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate.   2. The semiconductor device according to claim 1, wherein each of the under-bump metal layers has a ring wall, and the bump covering portion covers the ring wall of each of the under-bump metal layers. A surface, a protective layer formed on the surface, and a plurality of conductive pads formed on the surface, wherein the protective layer forms a plurality of openings, and the plurality of openings include a plurality of the conductive layers. A carrier that exposes the pad;
A plurality of copper-containing bumps comprising copper and formed on a plurality of the conductive pads, each having an upper surface and an annular surface bonded to the upper surface;
A bump covering portion, wherein the bump covering portion covers at least one organic barrier layer covering the upper surface and the annular surface of each copper-containing bump;
A semiconductor device comprising:   The semiconductor device according to claim 10, wherein a thickness of the organic barrier layer is less than 10 μm.   The semiconductor device according to claim 10, wherein the organic barrier layer has a viscosity in a range of 1 to 1.2 cP.   The semiconductor device according to claim 10, wherein the organic barrier layer is made of an organic polymer material.   The semiconductor device according to claim 13, wherein the organic barrier layer is formed of any one of benzotriazole, phenylimidazole, substituted phenylimidazole, and arylphenylimidazole.   The semiconductor device according to claim 10, wherein the organic barrier layer is formed of a phenylimidazole compound, formic acid, aqueous ammonia, acetic acid, and water.   The semiconductor device according to claim 10, wherein the carrier is any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate. A semiconductor device;
A plurality of connecting pads and a solder mask layer, wherein the solder mask layer has a plurality of grooves exposing the plurality of connecting pads, the plurality of connecting pads are connected to a plurality of copper-containing bumps, and an organic barrier layer A bump coating portion of the substrate covering the solder mask layer;
With
The semiconductor device includes:
A surface, a protective layer formed on the surface, and a plurality of conductive pads formed on the surface, wherein the protective layer forms a plurality of openings, and the plurality of openings include a plurality of the conductive layers. A carrier that exposes the pad;
A plurality of under-bump metal layers formed on the plurality of conductive pads;
A plurality of copper-containing bumps including copper and formed on a plurality of the under-bump metal layers, each having an upper surface and an annular surface bonded to the upper surface;
A bump covering portion, wherein the bump covering portion covers at least one organic barrier layer covering the annular surface of each copper-containing bump;
A semiconductor package further comprising:   The semiconductor package according to claim 17, wherein the organic barrier layer further includes a protective layer covering portion for covering the protective layer.   The semiconductor package according to claim 17, wherein a thickness of the organic barrier layer is less than 10 μm.   The semiconductor package of claim 17, wherein the organic barrier layer has a viscosity in a range of 1 to 1.2 cP.   The semiconductor package of claim 17, wherein the organic barrier layer is made of an organic polymer material.   The semiconductor package of claim 21, wherein the organic barrier layer is formed of any one of benzotriazole, phenylimidazole, substituted phenylimidazole, or arylphenylimidazole.   The semiconductor package according to claim 17, wherein the organic barrier layer is formed of a phenylimidazole compound, formic acid, aqueous ammonia, acetic acid, and water.   The semiconductor package according to claim 17, wherein the carrier is any one of a silicon substrate, a glass substrate, a ceramic substrate, and a copper foil substrate.   18. The semiconductor package according to claim 17, wherein each of the under-bump metal layers has a ring wall, and the bump covering portion covers the ring wall of each of the under-bump metal layers.

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