JP3178113B2 - Ultrasound diagnostic equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal delay circuit,
The present invention relates to an analog signal delay circuit that delays an input analog signal.

[0002]

2. Description of the Related Art For example, in an ultrasonic diagnostic apparatus of an electronic focus system, a drive applied to a plurality of transducers constituting a probe in order to deflect an ultrasonic beam and to set a focus at an arbitrary position. Analog signal delay circuits are used to delay the pulses by different times or to delay the ultrasonic echoes received by the transducers by different times.

In this type of analog signal delay circuit, a multistage LC-type tapped delay line is generally used to delay an input signal. In this multi-stage LC-type delay line with a tap, a discontinuous delay amount is given by selecting a tap. A multi-stage CR type delay circuit is also used. Here, a continuous delay amount is given by making the capacitance C and the resistance R variable.

[0004]

In the above-mentioned conventional configuration,
In each of the delay circuits, the number of components such as C, R, and L increases, and their types also increase. For this reason, it is difficult to reduce the size of the delay circuit to an IC. An object of the present invention is to easily make a delay circuit into an IC.

[0005] The present invention is to emit an ultrasonic signal into the body,
Ultrasound diagnostic equipment that diagnoses the human body based on reflected echo signals
Probe, amplifier, and bias current supply
And a delay amount control means. The probe is
It consists of a number of transducers, emits ultrasonic signals and
This is a configuration for receiving. The amplifying unit performs the above-mentioned plural vibrations.
Connected to each other and cascaded together
Including transistors. The bias current supply unit
A bias current is supplied to the amplifier. The delay amount control means includes:
The bias current supplied by the bias current supply
The frequency characteristics of the current amplification factor of multiple transistors
Amount of analog signal passing through the amplifier
Control.

In the ultrasonic diagnostic apparatus according to the present invention, a variable bias current is supplied to the amplifier by the bias current controller and the delay amount controller. As a result, the frequency characteristics of the current amplification factors of the plurality of transistors change. When an ultrasonic signal is emitted from the probe, a drive pulse is input to each amplifier, and a drive pulse given a predetermined delay amount in each amplifier is supplied to each transducer. This makes it possible to control the delay amount of the ultrasonic signal emitted from each transducer.
When a reflected echo is received by a probe, a reflected echo signal from each transducer is input to each amplifier, and a predetermined delay amount is given. This makes it possible to control the amount of delay of the reflected echo signal from each transducer.

Here, since the amount of delay of the analog signal is controlled using a transistor, it is easy to integrate the delay circuit into an IC.

[0008]

FIG. 1 shows a receiving system of an ultrasonic diagnostic apparatus employing an embodiment of the present invention. In the figure, a transducer 1 includes a plurality of micro-vibrators 1a to 1n. The transducer 1 is connected to a delay circuit 2 including a plurality of analog signal delay circuits 2a to 2n. The vibrators 1a to 1a
A predetermined amount of delay is given to each of the received signals from 1n.

The delay circuit 2 is supplied with a signal for controlling each delay amount from the current control circuit 11. The current control circuit 11 is supplied with a focus setting signal from the focus setting unit 14. The phasing addition circuit 3 is connected to the delay circuit 2. The phasing addition circuit 3 performs phasing addition of the reception signals output from the respective micro-vibrators 1a to 1n which have been delayed by a predetermined delay, and obtains a reflected echo signal composed of one sound ray data. A logarithmic amplifier circuit 4 for amplifying the obtained reflected echo signal is connected to the phasing addition circuit 2. A detection circuit 5 is connected to the logarithmic amplification circuit 4. The detection circuit 5 detects the amplified reflected echo signal. An A / D conversion circuit 6 is connected to the detection circuit 5. Here, the reflected echo signal subjected to the reception processing is converted into a digital signal. The DSC 7 is connected to the A / D conversion circuit 6. The DSC 7 stores the obtained digital signals for the number of displays, and outputs the digital signals to the CRT 8 in synchronization with the television signal.

Next, details of the analog signal delay circuit 2a will be described with reference to FIG. The other analog signal delay circuits 2b to 2n have the same configuration, and the description is omitted. The analog signal delay circuit 2a includes three npn transistors 10a, 1 having an emitter terminal and a collector terminal connected in series.
An amplification unit 20 including 0b and 10c is provided. A ladder resistor R ₃ ,
A power supply is connected via R ₄ and R ₅ , and a divided voltage is applied. The current control circuit 11 is connected to the emitter terminal of the lowermost transistor 10c. An analog signal input terminal 12 is connected to the emitter terminal via a resistor R ₁ and a capacitor C ₁ . The analog signal input terminal 12 is supplied with an analog reception signal e _i1 received by the microvibrator 1a. The power supply is also connected to the collector terminal of the uppermost transistor 10a via the coil L. The collector terminal, the signal output terminal 13 via a capacitor C ₂ is connected. Node between the capacitor C ₂ and the analog signal output terminal 13 is grounded through a resistor R _2.

Next, the principle of the delay in the analog signal delay circuit 2a will be described. Generally, the current amplification factor a of a transistor has frequency dependence and is expressed as follows.

[0012]

(Equation 1)

Where a ₀ is a current amplification factor at a low frequency, f _a is a cutoff frequency at an amplification factor a, and m is a surplus phase coefficient. Here, when the f << f _a, (1)
The equation can be approximated as follows:

[0014]

(Equation 2)

Here, the a cutoff frequency f _a generally changes as shown in FIG. 4 depending on the emitter current _IE supplied to the transistor. That is, up to a certain range, as the emitter current _IE increases, the cut-off frequency f
_a also gradually increases, and gradually decreases when the emitter current _IE exceeds a predetermined value. Also, “−j” in the equation (2)
(1 + m) f / f _a ″ indicates the phase (the amount of delay of the output signal with respect to the input signal). Therefore, according to equation (2), it can be seen that as the cut-off frequency f _a increases, the amount of delay ψ decreases. (Dashed line in FIG. 4) Therefore, the emitter current I _E
Can be changed to change the delay amount ψ.

In the example shown in FIG. 2, three transistors 1
Controls emitter current I _E1 of 0a~10c commonly, by this, the input current I _e, as shown in FIG. 3, the same amount the delay in the transistors 10c, 10b, 10a, becomes the output I _c3. Therefore, the delay amount こ こ here is the emitter current I
It can be controlled by changing _E1 and the number of transistor stages.

Next, the operation of the above embodiment will be described. The reflected echo reflected within the subject is received by each of the transducers 1 a to 1 n of the transducer 1 and is provided to the delay circuit 2. In the delay circuit 2, the amount of delay of each of the analog signal delay circuits 2a to 2n is determined by the emitter currents I _{E1 to} I _En.
, The input signals e _{i1 to} e _in are delayed by a predetermined amount. The situation at this time is shown in FIG. In FIG. 3, the delay amount ψ
Only the input signals e _{i1 to} e _in are delayed with respect to the output signals e _{o1 to} e _on . Here, by changing each of the emitter currents I _{E1 to} I _En , it is possible to continuously change the delay amount ψ in each of the analog signal delay circuits 2a to 2n. The delayed output signal is subjected to phasing addition by the phasing addition circuit 3, supplied to the logarithmic amplifier circuit 4, amplified, supplied to the detection circuit 5, and detected. Then, the signal is converted into a digital signal by the A / D conversion circuit 6 and stored in the DSC 7.

When a new focus is set by the focus setting section 14, the current control circuit 11 supplies the corresponding emitter currents I _{E1 to} I _En to the analog signal delay circuits 2a to 2n. Then, the input signals e _{i1 to} e _in are delayed by the new delay amount. here,
Since the analog signal delay circuits 2a to 2n are composed of transistors and a small amount of resistance and capacitance, the number of parts and types are reduced, and ICs can be easily implemented.

[Other Embodiments] (a) The number of transistor stages in the above embodiment is an example, and the number of transistor stages may be determined according to the delay amount. (B) In the above embodiment, the analog signal delay circuit is used in the receiving system of the ultrasonic diagnostic apparatus. However, the analog signal delay circuit can be used in any apparatus for delaying an analog signal.

In the ultrasonic diagnostic apparatus according to the present invention, a variable bias current is supplied to an amplifying section formed by cascade-connecting a plurality of transistors, so that a drive pulse signal and a reflection energy are supplied.
Since the amount of delay of the co signal is controlled, it is possible to easily implement an IC.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a receiving system of an ultrasonic diagnostic apparatus employing one embodiment of the present invention.

FIG. 2 is a circuit diagram of an analog signal delay circuit.

FIG. 3 is a signal waveform diagram showing an example of a delay.

FIG. 4 is a diagram showing a relationship between an emitter current and a cutoff frequency.

[Explanation of symbols]

 Reference Signs List 2 delay circuit 2a to 2n analog signal delay circuit 10a to 10c transistor 11 current control circuit 12 analog signal input terminal 13 analog signal output terminal 20 amplifier

Claims (1)

(57) [Claims] 1. An ultrasonic signal is emitted into the body and the reflected echo is emitted.
An ultrasonic diagnostic device that diagnoses the human body based on signals
A probe including a plurality of transducers , a plurality of amplifying units connected to each of the plurality of transducers and including a plurality of transistors cascaded with each other, and a bias for supplying a bias current to the amplifying unit. A current supply unit, a delay that changes a bias current supplied by the bias current supply unit to change a frequency characteristic of a current amplification factor of the plurality of transistors, and controls a delay amount of an analog signal passing through the amplification unit. An ultrasonic diagnostic apparatus comprising: a quantity control unit .