JP3172119B2 - Modulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a modulator for digital transmission, and more particularly to a modulator for a plurality of transmission speeds, in which an analog circuit is used in common to reduce the circuit scale.

[0002]

2. Description of the Related Art A conventional modulator is disclosed in Japanese Patent Laid-Open No. 3-15 / 1991.
What is described in 4458 is known. FIG. 9 shows a configuration of a conventional modulation device. A serial / parallel converter 201 converts serial transmission data into symbol data. A mapping circuit 202 connected to the serial / parallel converter 201 converts the symbol data output from the serial / parallel converter 201 into an I signal and a Q signal as amplitude / phase information.

A first band limiting filter 203 for an I signal used for a first transmission speed is connected to a mapping circuit 202. The first D / A converter 204 for the band-limited I signal that operates at the first transmission rate is connected to the first band-limiting filter 203 for the I signal. First LPF 205 for analog I signal D / A converted by D / A converter 204
Are connected to the D / A converter 204.

A second band-limiting filter 206 for a Q signal used for a first transmission rate is connected to a mapping circuit 202. The second D / A converter 207 for the band-limited Q signal that operates at the first transmission rate is connected to the second band-limiting filter 206 for the Q signal. Second LPF 208 for analog Q signal D / A converted by D / A converter 207
Are connected to the D / A converter 207.

[0005] A third band-limiting filter 209 for the I signal used for the second transmission rate is connected to the mapping circuit 202. The third D / A converter 210 for the band-limited I signal that operates at the second transmission rate is connected to the third band-limiting filter 209 for the I signal. Third LPF 211 for analog I signal D / A converted by D / A converter 210
Are connected to the D / A converter 210.

[0006] A fourth band-limiting filter 212 for the Q signal used for the second transmission rate is connected to the mapping circuit 202. The fourth D / A converter 213 for the band-limited Q signal operating at the second transmission rate is connected to the fourth band-limiting filter 212 for the Q signal. Fourth LPF 214 for analog Q signal D / A converted by D / A converter 213
Are connected to the D / A converter 213.

Next, the operation of the conventional modulation device will be described. When modulating data at the first transmission rate,
Serial-to-parallel converter 201 and mapping circuit 202
Operate at the transmission speed of Regarding the I signal and the Q signal output from the mapping circuit 202, the I signal is a band-pass filter 203 for the first transmission rate, a D / A converter 204, and an LPF.
At 205, the Q signal is a band limiting filter 2 for the first transmission rate.
06, the D / A converter 207 and the LPF 208 perform waveform shaping and output a modulated signal. At this time, the band-pass filters 209 and 212 for the second transmission rate, the D / A converters 210 and 213, and the LPF
211 and 214 are not operated.

When data is modulated at the second transmission rate, the serial / parallel converter 201 and the mapping circuit 202 are operated at the second transmission rate. Mapping circuit 2
02, the I signal and the Q signal are output from the band limiting filter 209 for the second transmission rate, the D / A converter 2
10, the LPF 211, the Q signal is subjected to waveform shaping by the band limiting filter 212, D / A converter 213, and LPF 214 for the second transmission rate, and outputs a modulated signal. At this time, the band-pass filters 203 and 206 for the first transmission rate, the D / A converter 20
4, 207 and LPF 205, 208 are not operated.

[0009]

However, in the conventional modulation device, a band limiting filter, a D / A converter, and an LPF corresponding to a plurality of transmission speeds are prepared, and the operation block is switched according to the transmission speed. Therefore, there is a problem that the circuit scale becomes large. The present invention solves the above-mentioned conventional problems, and a serial-parallel converter that converts serial transmission data into symbol data, a mapping circuit that converts the symbol data into I and Q signals serving as amplitude and phase information, A first band-limiting filter for the I signal used for the first transmission rate, a second band-limiting filter for the Q signal used for the first transmission rate, and a second band-limiting filter for the I signal used for the second transmission rate 3, a fourth band-limiting filter for the Q signal used for the second transmission rate, and a fourth band-limiting filter for the band-limited I signal that operates at a conversion rate common to the first and second transmission rates. A first D / A converter, a second D / A converter for a band-limited Q signal operating at a conversion rate common to the first and second transmission rates, and a first and second transmission rate D / A converted analog I signal First LPF and, D shared in the first and second transmission rates
A second LPF for the analog Q signal that has been subjected to the A / A conversion,
An object of the present invention is to provide an excellent modulation device that reduces the circuit scale by using an analog circuit in common for a plurality of transmission speeds.

[0010]

According to the present invention, there is provided a serial / parallel converter for converting serial transmission data into symbol data, and converting the symbol data into I and Q signals serving as amplitude / phase information. A mapping circuit for conversion, a first band limiting filter for an I signal used for a first transmission rate, a second band limiting filter for a Q signal used for a first transmission rate, and a second transmission rate. I used
A third band-limiting filter for signals, a fourth band-limiting filter for Q signals used for the second transmission rate, and a band-limited I operating at a conversion rate common to the first and second transmission rates. A first D / A converter for a signal, a second D / A converter for a band-limited Q signal that operates at a conversion rate common to the first and second transmission rates, 1st LPF for D / A converted analog I signal common to 2 transmission speeds
And a second LPF for D / A-converted analog Q signals common to the first and second transmission speeds, and the analog circuit is shared for a plurality of transmission speeds to reduce the circuit scale. Things.

As described above, a serial / parallel converter for converting serial transmission data into symbol data, a mapping circuit for converting symbol data into I and Q signals serving as amplitude / phase information, and an I / O signal used for a first transmission speed. A first band-limiting filter for a signal, a second band-limiting filter for a Q signal used at a first transmission rate, a third band-limiting filter for an I signal used at a second transmission rate, 2
A fourth band-limiting filter for the Q signal used for the transmission speed of the first band, a first D / A converter for the band-limited I signal operating at a conversion speed common to the first and second transmission speeds, First
A second D / A converter for a band-limited Q signal operating at a conversion rate common to the second and the second transmission rates;
A first LPF for the analog I signal that is D / A-converted in common with the transmission rate of
By providing a second LPF for the A-converted analog Q signal and using a common analog circuit for a plurality of transmission speeds, an excellent modulator that reduces the circuit scale can be obtained.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is a serial / parallel converter for converting serial transmission data into symbol data, and converting symbol data into I and Q signals as amplitude / phase information. Mapping circuit, a first band limiting filter for an I signal used for a first transmission rate, a second band limiting filter for a Q signal used for a first transmission rate, and a second band limiting filter for a second transmission rate A third band-limiting filter for the I signal, a fourth band-limiting filter for the Q signal used for the second transmission rate, and a band-limiting operation at a conversion rate common to the first and second transmission rates. A first D / A converter for an I signal, a second D / A converter for a band-limited Q signal that operates at a conversion rate common to the first and second transmission rates, D / A converted analog for common use for second transmission rate A first LPF for an I signal and a second LPF for a D / A-converted analog Q signal common to the first and second transmission rates are provided, and an analog circuit is shared for a plurality of transmission rates. A serial-to-parallel converter that converts serial transmission data into symbol data, a mapping circuit that converts symbol data into I and Q signals serving as amplitude and phase information, A first band-limiting filter for the I signal used for the first transmission rate, a second band-limiting filter for the Q signal used for the first transmission rate, and an I signal used for the second transmission rate.
A third band-limiting filter for signals, a fourth band-limiting filter for Q signals used for the second transmission rate, and a band-limited I operating at a conversion rate common to the first and second transmission rates. A first D / A converter for a signal, a second D / A converter for a band-limited Q signal that operates at a conversion rate common to the first and second transmission rates, 1st LPF for D / A converted analog I signal common to 2 transmission speeds
And a second LPF for a D / A-converted analog Q signal shared by the first and second transmission speeds, and a common analog circuit for a plurality of transmission speeds reduces the circuit scale. It has the action of:

Further, the invention according to claim 2 of the present invention provides:
In the invention according to claim 1, the first to fourth band-limiting filters operate at a low sampling frequency, and the first to fourth band-limiting filters increase the sampling frequency. An interpolating filter is provided to reduce the operating frequency of the band limiting filter to reduce power consumption. The first to fourth band limiting filters operate at a low sampling frequency. A band-limiting filter and first to fourth interpolation filters for increasing the sampling frequency;
This has the effect of lowering the operating frequency of the band limiting filter to reduce power consumption.

Further, the invention according to claim 3 of the present invention provides:
In the invention described in claim 2, the first and second D / A
As a converter, a digital delay device for delaying the interpolated Q signal, and a D / D signal for interpolating the interpolated I signal and the delayed Q signal alternately.
It has a D / A converter for A-conversion and an analog delay unit for delaying the D / A-converted analog I signal, and has a reduced circuit scale. As the first and second D / A converters, A digital delay for delaying the interpolated Q signal, a D / A converter for alternately D / A converting the interpolated I signal and the delayed Q signal, and an analog delay for delaying the D / A converted analog I signal And has the effect of reducing the circuit scale.

The invention according to claim 4 of the present invention provides:
In the invention described in claim 2, the first and second D / A
As a converter, a digital delay device for delaying the interpolated I signal and a D / D signal for alternately outputting the delayed I signal and the interpolated Q signal.
It has a D / A converter for A-conversion and an analog delay for delaying the D / A-converted analog Q signal, thereby reducing the circuit scale. As the first and second D / A converters, A digital delay unit for delaying the interpolated I signal, a D / A converter for alternately D / A converting the delayed I signal and the interpolated Q signal, and an analog delay for delaying the D / A converted analog Q signal And has the effect of reducing the circuit scale.

[0016] The invention described in claim 5 of the present invention provides:
3. A digital delay device for delaying a Q signal output from a second band-limiting filter or a fourth band-limiting filter, as the first to fourth interpolation filters, A first method of filtering an I signal and a Q signal in a time-division manner in order to transmit a signal obtained by delaying an I signal output from a limiting filter and a Q signal output from a second band limiting filter at a first transmission rate. And the I signal output from the third band-limiting filter and the fourth
A second interpolation filter for filtering the I signal and the Q signal in a time-division manner in order to send a signal obtained by delaying the Q signal output from the band limiting filter at a second transmission rate, and delaying the interpolated I signal A digital delay device for reducing the circuit scale, and as the first to fourth interpolation filters, a digital delay for delaying the second band-limiting filter or the Q signal output from the fourth band-limiting filter. And an I signal which is the output of the first band limiting filter and the second signal.
A first interpolation filter for performing time-division filtering of an I signal and a Q signal in order to transmit a signal obtained by delaying a Q signal output from the band limiting filter at a first transmission rate, and a third band limiting filter A second interpolation for filtering the I signal and the Q signal in a time-division manner in order to transmit at a second transmission rate a signal obtained by delaying the I signal which is the output of the fourth band limiting filter and the Q signal which is the output of the fourth band limiting filter. It has a filter and a digital delay unit for delaying the interpolated I signal, and has the effect of reducing the circuit scale.

[0017] The invention according to claim 6 of the present invention provides:
3. The digital delay unit according to claim 2, wherein the first to fourth interpolation filters delay an I signal output from the first band-limiting filter or the third band-limiting filter; A first time-division filter process of the I signal and the Q signal in order to transmit a signal obtained by delaying the I signal output from the limiting filter and the Q signal output from the second band limiting filter at a first transmission rate. , And a signal obtained by delaying the I signal output from the third band limiting filter and the Q signal output from the fourth band limiting filter at a second transmission rate. A second interpolation filter for performing a filtering process in a time-division manner, and a digital delay unit for delaying the interpolated Q signal are provided to reduce the circuit scale. The first to fourth interpolation filters are provided in a first band. System A digital delay unit for delaying an I signal which is an output of the filter or the third band limiting filter, a signal which is a delay of the I signal which is an output of the first band limiting filter, and a Q which is an output of the second band limiting filter. A first interpolation filter that performs time-division filtering of the I signal and the Q signal in order to transmit the signal at the first transmission rate; a signal obtained by delaying the I signal output from the third band-limiting filter; A second interpolation filter for filtering the I signal and the Q signal in a time-division manner to transmit the Q signal output from the band-limiting filter at a second transmission rate, and a digital delay unit for delaying the interpolated Q signal And has the effect of reducing the circuit scale.

The invention according to claim 7 of the present invention provides:
In the invention described in claim 5, the first and second D / A
As a converter, a D / A converter for alternately D / A converting the interpolated I signal and the delayed Q signal, and an analog delay for delaying the D / A converted analog I signal are provided, thereby reducing the circuit scale. As the first and second D / A converters, the interpolated I signal and the delayed Q signal are alternately D / A-converted.
It has a D / A converter for A / A conversion and an analog delay unit for delaying the analog I signal after D / A conversion, and has the effect of reducing the circuit scale.

Further, the invention according to claim 8 of the present invention provides:
In the invention according to claim 6, the first and second D / A
As a converter, a D / A converter for alternately D / A converting the delayed I signal and the interpolated Q signal, and an analog delayer for delaying the D / A converted analog Q signal are provided to reduce the circuit scale. As a first and second D / A converter, the delayed I signal and the interpolated Q signal are alternately D / A-converted.
A D / A converter for A / A conversion and an analog delay unit for delaying the D / A converted analog Q signal are provided, which has an effect of reducing the circuit scale.

FIG. 1 shows an embodiment of the present invention.
This will be described with reference to FIG.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 1 is a block diagram of a modulation device according to an embodiment. In FIG. 1, a serial / parallel converter 1 converts serial transmission data into symbol data. The mapping circuit 2
Symbol data which is connected to the serial / parallel converter 1 and output from the serial / parallel converter 1 is converted into an I signal and a Q signal as amplitude / phase information. The first band limiting filter 3 for the I signal used for the first transmission speed is connected to the mapping circuit 2. A first D / A converter 4 for a band-limited I signal, which operates at a speed adapted to the first transmission speed and the second transmission speed, is connected to the first band-limiting filter 3 for the I signal. I have. First L for analog I signal
The PF 5 is connected to the D / A converter 4 and filters the D / A converted analog I signal. The second band-limiting filter 6 for the Q signal used for the first transmission rate is connected to the mapping circuit 2. A second D for a band-limited Q signal operating at a rate adapted to the first and second transmission rates;
The / A converter 7 is connected to the second band-limiting filter 6 for the Q signal. The second LPF 8 for the analog Q signal is connected to the D / A converter 7 and filters the analog Q signal after the D / A conversion.

The third band-limiting filter 9 for the I signal used for the second transmission rate is connected to the mapping circuit 2 and the first D / A converter 4 for the I signal. The fourth band-limiting filter 10 for the Q signal used for the second transmission speed is connected to the mapping circuit 2 and the second D / A converter 7 for the Q signal.

The operation of the modulator according to the first embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 1 and the mapping circuit 2 are operated at the first transmission speed. As for the I signal and the Q signal output from the mapping circuit 2, the I signal is a band-pass filter 3 for a first transmission rate, a D / A converter 4, and an LPF 5, and the Q signal is a first signal.
, A band limiting filter 6 for the transmission rate of the D / A converter 7,
The LPF 8 performs waveform shaping and outputs a modulated signal. At this time, the band-pass filters 9 and 10 for the second transmission rate are not operated.

When data is modulated at the second transmission rate, the serial / parallel converter 1 and the mapping circuit 2 are operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 2, the I signal is a second transmission rate band limiting filter 9, a D / A converter 4, and an L signal.
In the PF 5, the Q signal is subjected to waveform shaping by the band-pass filter 10 for the second transmission rate, the D / A converter 7, and the LPF 8, and a modulated signal is output. At this time, the first transmission rate band limiting filters 3 and 6 are not operated.

Here, the sampling frequencies of the band limiting filter and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. In addition, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter and the LPF.

As described above, according to the first embodiment of the present invention, a serial / parallel converter for converting serial transmission data into symbol data, and converting the symbol data into I and Q signals serving as amplitude / phase information. A mapping circuit for conversion, a first band-limiting filter for an I signal used at a first transmission rate, and a second band-pass filter for a Q signal used at a first transmission rate.
, A third band-limiting filter for an I signal used for a second transmission rate, a fourth band-limiting filter for a Q signal used for a second transmission rate, and first and second
Band-limited I operating at a conversion rate common to the transmission rate of
A first D / A converter for a signal, a second D / A converter for a band-limited Q signal that operates at a conversion rate common to the first and second transmission rates, A first LPF for a D / A-converted analog I signal shared for a transmission rate of 2;
By providing the second LPF for the D / A-converted analog Q signal common to the first and second transmission rates, the analog circuit is shared for a plurality of transmission rates, thereby reducing the circuit scale. be able to.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Second Embodiment) FIG. 2 shows a second embodiment of the present invention.
FIG. 2 is a block diagram of the modulation device according to the embodiment. In FIG. 2, a serial / parallel converter 11 converts serial transmission data into symbol data. The mapping circuit 12
Symbol data which is connected to the serial / parallel converter 11 and is output from the serial / parallel converter 11 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 13 for the I signal used for the first transmission rate is connected to the mapping circuit 12. The first interpolation filter 14 is connected to the first band limiting filter 13 and is connected to the first band limiting filter 13.
The sampling frequency is increased so that a desired band can be easily obtained after converting the output of 13 into an analog signal. A first D / A converter 15 for the interpolated I signal, which operates at a rate adapted to the first and second transmission rates, is connected to a first interpolation filter 14. The first LPF 16 for the analog I signal is D / A
The D / A-converted analog I signal is connected to the converter 15 and is filtered. The second band limiting filter 17 for the Q signal used for the first transmission rate is connected to the mapping circuit 12.
The second interpolation filter 18 is connected to the second band limiting filter 17, and increases the sampling frequency so that a desired band can be easily obtained after converting the output of the second band limiting filter 17 into an analog signal. A second D / A converter for a band-limited Q signal that operates at a rate adapted to the first and second transmission rates
19 is connected to the second interpolation filter 18. The second LPF 20 for the analog Q signal is connected to the D / A converter 19 and filters the analog Q signal after the D / A conversion.

The third band limiting filter 21 for the I signal used for the second transmission speed is connected to the mapping circuit 12. The third interpolation filter 22 is a third band limiting filter 21
Further, the sampling frequency is increased so that the output of the third band limiting filter 21 connected to the first D / A converter 15 for the interpolated I signal is easily converted into a desired band after analog signal conversion. The fourth band-limiting filter 23 for the Q signal used for the second transmission rate is connected to the mapping circuit 12. The fourth interpolation filter 24 is a fourth band limiting filter 23
The output of the fourth band-limiting filter 23, which is connected to the band-limited second signal D / A converter 19 for the Q signal, increases the sampling frequency so that a desired band can be easily obtained after analog signal conversion.

The operation of the modulator according to the second embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 11 and the mapping circuit 12 are operated at the first transmission speed. As for the I signal and the Q signal output from the mapping circuit 12, the I signal is a first transmission rate band limiting filter 13, an interpolation filter 14, a D / A converter 15, an LPF 16
The Q signal is a band-pass filter 17 for the first transmission rate,
Waveform shaping is performed by the interpolation filter 18, the D / A converter 19, and the LPF 20, and a modulated signal is output. Here, interpolation filter 1
4 and 18 convert these I and Q signals to analog signals and
The sampling frequency is increased so that a desired band can be easily obtained by the PF. At this time, the band-limiting filters 21 and 23 and the interpolation filters 22 and 24 for the second transmission rate are not operated.

When data is modulated at the second transmission rate, the serial-parallel converter 11 and the mapping circuit
12 operate at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 12, the I signal is a second transmission rate band limiting filter 21, an interpolation filter 22,
A / A converter 15 and LPF 16, and the Q signal is a second transmission rate band limiting filter 23, interpolation filter 24, D / A converter
19. The LPF 20 performs waveform shaping and outputs a modulated signal.
Here, the interpolation filters 22 and 24 increase the sampling frequency so that a desired band can be easily obtained with the LPF after converting these I and Q signals into analog signals. At this time, the band-limiting filters 13 and 17 for the first transmission rate and the interpolation filter 14,
18 does not work. Here, the sampling frequencies of the band limiting filter, the interpolation filter, and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. Further, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter, the interpolation filter, and the LPF.

As described above, according to the second embodiment of the present invention, in the first embodiment, the first to fourth band-limiting filters which operate at a low sampling frequency are used as the first to fourth band-limiting filters. By providing up to four band-limiting filters and first to fourth interpolation filters to increase the sampling frequency, the band-limiting filters 13, 17, 21,
23 can be operated at a lower frequency to reduce power consumption.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Third Embodiment) FIG. 3 shows a third embodiment of the present invention.
FIG. 3 is a block diagram of the modulation device according to the embodiment. In FIG. 3, a serial / parallel converter 31 converts serial transmission data into symbol data. The mapping circuit 32
Symbol data which is connected to the serial / parallel converter 31 and is output from the serial / parallel converter 31 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 33 for the I signal used for the first transmission rate is connected to the mapping circuit 32. The first interpolation filter 34 is connected to the first band limiting filter 33 for the I signal and increases the sampling frequency of the output of the first band limiting filter. A D / A converter 35 operating at a common conversion rate between the first transmission rate and the second transmission rate is connected to a first interpolation filter 34. The analog delay unit 36 for the analog I signal is D /
The D / A converted analog I signal is connected to the A converter 35 and is delayed. The first LPF 37 for the analog I signal is connected to the analog delay unit 36 and filters the analog I signal output from the analog delay unit 36. The second band-limiting filter 38 for the Q signal used for the first transmission rate is connected to the mapping circuit 32. The second interpolation filter 39 is connected to the second band limiting filter 38 and increases the sampling frequency of the output of the second band limiting filter 38. A digital delay 40 for the interpolated Q signal common to the first transmission rate and the second transmission rate is connected to a second interpolation filter 39.
The second LPF 41 for the analog Q signal is connected to the D / A converter 35 and filters the analog / Q converted analog Q signal.

The third band-limiting filter 42 for the I signal used for the second transmission rate is connected to the mapping circuit 32. The third interpolation filter 43 is a third band limiting filter 42
And the sampling frequency of the output of the third band limiting filter 42 connected to the D / A converter 35 is increased. The fourth band-limiting filter 44 for the Q signal used for the second transmission rate is connected to the mapping circuit 32. The fourth interpolation filter 45 is connected to the fourth band limiting filter 44 and the digital delay unit 40 for the Q signal, and increases the sampling frequency of the output of the fourth band limiting filter 44.

The operation of the modulator according to the third embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 31 and the mapping circuit 32 are operated at the first transmission speed. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a band limiting filter 33 and an interpolation filter 34 for the first transmission rate, and the Q signal is a band limiting filter 38 for the first transmission rate. The interpolation filter 39 performs digital waveform shaping. Here, the interpolation filters 34 and 39 convert the I and Q signals into analog signals, and increase the sampling frequency so that a desired band can be easily obtained with the LPF. The D / A converter 35 alternately converts the waveform-shaped digital I signal and Q signal into analog signals. For this purpose, the I signal immediately converts the output of the interpolation filter 34 to an analog signal, the Q signal is delayed by the digital delay unit 40 until the conversion of the I signal is completed, and the I signal that has become an analog signal is It is delayed by the analog delay unit 36 until the conversion is completed. Delayed I that became an analog signal
The signal is an LPF 37, and the Q signal is subjected to waveform shaping by an LPF 41 to output a modulated signal. At this time, the band limit filters 42 and 44 and the interpolation filters 43 and 45 for the second transmission rate are not operated.

When data is modulated at the second transmission rate, the serial-parallel converter 31 and the mapping circuit
32 is operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is subjected to a second transmission rate band limiting filter 42 and an interpolation filter 43.
The Q signal is subjected to digital waveform shaping by a band limiting filter 44 and an interpolation filter 45 for the second transmission rate. Here, the interpolation filters 43 and 45 increase the sampling frequency so that a desired band can be easily obtained with the LPF after converting these I and Q signals into analog signals. The D / A converter 35 alternately converts the waveform-shaped digital I signal and Q signal into analog signals. For this purpose, the I signal immediately converts the output of the interpolation filter 43 into an analog signal, the Q signal is delayed by the digital delay unit 40 until the conversion of the I signal is completed, and the delayed I signal that has become an analog signal is Q The signal is delayed by the analog delay unit 36 until the signal conversion is completed. The analog signal I signal is LPF37 and the Q signal is LPF37.
In F41, the waveform is shaped and a modulated signal is output. At this time, the first transmission rate band limiting filters 33 and 38 and the interpolation filters 34 and 39 are not operated. Here, the sampling frequencies of the band limiting filter, the interpolation filter, and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. Further, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter, the interpolation filter, and the LPF.

As described above, according to the third embodiment of the present invention, in the second embodiment, the first and second D
As an A / A converter, a digital delay unit for delaying the interpolated Q signal, a D / A converter for alternately D / A converting the interpolated I signal and the delayed Q signal, and an analog I / O converter for D / A conversion An analog delay unit for delaying a signal is provided, and the circuit scale can be reduced.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Fourth Embodiment) FIG. 4 shows a fourth embodiment of the present invention.
FIG. 4 is a block diagram of the modulation device according to the embodiment. In FIG. 4, a serial / parallel converter 31 converts serial transmission data into symbol data. The mapping circuit 32
Symbol data which is connected to the serial / parallel converter 31 and is output from the serial / parallel converter 31 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 33 for the I signal used for the first transmission rate is connected to the mapping circuit 32. The first interpolation filter 34 is connected to the first band limiting filter 33 and is connected to the first band limiting filter
Increase the sampling frequency of the 33 output. A digital delay unit 40 for the interpolated I signal common to the first transmission rate and the second transmission rate is connected to the first interpolation filter 34. A D / A converter 35 operating at a common conversion rate between the first transmission rate and the second transmission rate is connected to a digital delay unit 40 for the interpolated I signal. The first LPF 37 for the analog I signal is connected to the D / A converter 35 and filters the analog I signal after the D / A conversion. The second band-limiting filter 38 for the Q signal used for the first transmission rate is connected to the mapping circuit 32. The second interpolation filter 39 is
To increase the sampling frequency of the output of the second band-limiting filter 38. The analog Q signal analog delay unit 36 is connected to the D / A converter 35 and delays the D / A converted analog Q signal. The second LPF 41 for the analog Q signal is connected to the analog delay unit 36 and filters the analog Q signal output from the analog delay unit 36.

The third band-limiting filter 42 for the I signal used for the second transmission rate is connected to the mapping circuit 32. The third interpolation filter 43 is a third band limiting filter 42
Further, the sampling frequency of the output of the third band limiting filter 42 connected to the digital delay unit 40 for the interpolated I signal is increased. The fourth signal for the Q signal used for the second transmission rate
The band limiting filter 44 is connected to the mapping circuit 32. The fourth interpolation filter 45 is a fourth band limiting filter
The sampling frequency of the output of the fourth band limiting filter 44 connected to the D / A converter 35 and the D / A converter 35 is increased.

The operation of the modulator according to the fourth embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 31 and the mapping circuit 32 are operated at the first transmission speed. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a band limiting filter 33 and an interpolation filter 34 for the first transmission rate, and the Q signal is a band limiting filter 38 for the first transmission rate. The interpolation filter 39 performs digital waveform shaping. Here, the interpolation filters 34 and 39 convert the I and Q signals into analog signals, and increase the sampling frequency so that a desired band can be easily obtained with the LPF. The D / A converter 35 alternately converts the waveform-shaped digital Q signal and I signal into analog signals. For this purpose, the Q signal immediately converts the output of the interpolation filter 39 into an analog signal, the I signal is delayed by the digital delay unit 40 until the conversion of the Q signal is completed, and the Q signal converted to an analog signal is It is delayed by the analog delay unit 36 until the conversion is completed. The I signal that has become an analog signal is L
The Q signal delayed by the PF 37 is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the band limit filters 42 and 44 and the interpolation filters 43 and 45 for the second transmission rate are not operated.

When modulating data at the second transmission rate, the serial / parallel converter 31 and the mapping circuit
32 is operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is subjected to a second transmission rate band limiting filter 42 and an interpolation filter 43.
The Q signal is subjected to digital waveform shaping by a band limiting filter 44 and an interpolation filter 45 for the second transmission rate. Here, the interpolation filters 43 and 45 increase the sampling frequency so that a desired band can be easily obtained with the LPF after converting these I and Q signals into analog signals. The D / A converter 35 alternately converts the waveform-shaped digital Q signal and I signal into analog signals. For this purpose, the Q signal immediately converts the output of the interpolation filter 45 into an analog signal, the I signal is delayed by the digital delay unit 40 until the conversion of the Q signal is completed, and the Q signal converted to an analog signal is It is delayed by the analog delay unit 36 until the conversion is completed. The I signal which has become an analog signal is LPF37, and the delayed Q signal is LPF37.
In F41, the waveform is shaped and a modulated signal is output. At this time, the first transmission rate band limiting filters 33 and 38 and the interpolation filters 34 and 39 are not operated. Here, the sampling frequencies of the band limiting filter, the interpolation filter, and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. Further, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter, the interpolation filter, and the LPF.

As described above, according to the fourth embodiment of the present invention, in the second embodiment, the first and second D
A digital delay unit for delaying the interpolated I signal, a D / A converter for alternately D / A converting the delayed I signal and the interpolated Q signal, and a D / A converted analog Q An analog delay unit for delaying a signal is provided, and the circuit scale can be reduced.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Fifth Embodiment) FIG. 5 shows a fifth embodiment of the present invention.
FIG. 5 is a block diagram of the modulation device according to the first embodiment. In FIG. 5, a serial / parallel converter 31 converts serial transmission data into symbol data. The mapping circuit 32
Symbol data which is connected to the serial / parallel converter 31 and is output from the serial / parallel converter 31 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 33 for the I signal used for the first transmission rate is connected to the mapping circuit 32. The first interpolation filter 51 is connected to the first band limiting filter 33 and the digital delay unit 52, and delays the output signal of the first band limiting filter 33 and the output of the second band limiting filter 38 by the digital delay unit 52. The sampling frequency is increased alternately on a time-division basis in the time-division signal. The digital delay 54 for the interpolated I signal common to the first transmission rate and the second transmission rate is a first interpolation filter.
51 and a second interpolation filter 53. First
The D / A converter 55 for the I signal, which operates at a common conversion speed at the transmission speed of the second signal and the second transmission speed, is connected to a digital delay unit 54 for the interpolated I signal. The first LPF 37 for the analog I signal is connected to the D / A converter 55 and filters the analog I signal after the D / A conversion. The second band-limiting filter 38 for the Q signal used for the first transmission rate is connected to the mapping circuit 32. The digital delay device 52 for the Q signal which is band-limited at the first transmission rate and the second transmission rate is common to the second band-limiting filter 38 and the fourth signal for the Q signal.
Is connected to the band-limiting filter 44 of FIG. A D / A converter 56 for the Q signal, which operates at a common conversion rate between the first transmission rate and the second transmission rate, is connected to the first interpolation filter 51 and the second interpolation filter 53. The second LPF 41 for the analog Q signal is connected to the D / A converter 56 and the D / A
The converted analog Q signal is filtered.

The third band-limiting filter 42 for the I signal used for the second transmission rate is connected to the mapping circuit 32. The second interpolation filter 53 includes a third band limiting filter 42 for the I signal and a fourth band limiting filter 44 for the Q signal.
And a signal obtained by delaying the output signal of the third band limiting filter 42 and the output of the fourth band limiting filter 44 by the digital delay unit 52 to increase the sampling frequency alternately in a time division manner. The fourth band-limiting filter 44 for the Q signal used for the second transmission rate is connected to the mapping circuit 32.

The operation of the modulator according to the fifth embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 31 and the mapping circuit 32 are operated at the first transmission speed. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a band limiting filter 33 for the first transmission rate, the Q signal is a band limiting filter 38 for the first transmission rate, Perform band limiting. After converting these I and Q signals into analog signals, an interpolation filter 51 for the first transmission rate is used as an interpolation filter for increasing the sampling frequency so that a desired band can be easily obtained with the LPF. In order to interpolate the I and Q signals alternately, the I signal immediately interpolates the output of the first band limiting filter 33, and the Q signal is delayed by the digital delay 52 until the interpolation of the I signal is completed. Then interpolate. After interpolation, the I signal is delayed by the digital delay unit 54 until the interpolation of the Q signal is completed, and is converted to an analog signal by the D / A converter 55. The Q signal is converted into an analog signal by the D / A converter 56 immediately after the interpolation is completed. The I signal that has become an analog signal is the LPF 37,
The Q signal is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the band limiting filter 4 for the second transmission rate
2, 44 and the interpolation filter 53 are not operated.

When data is modulated at the second transmission rate, the serial / parallel converter 31 and the mapping circuit
32 is operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a band limiting filter 42 for the second transmission rate, the Q signal is a band limiting filter 44 for the second transmission rate, and Perform band limiting. After converting these I and Q signals into analog signals, an interpolation filter 53 for the second transmission rate is used as an interpolation filter for increasing the sampling frequency so that a desired band can be easily obtained with the LPF. In order to interpolate the I and Q signals alternately, the I signal immediately interpolates the output of the third band-limiting filter 42, and the Q signal is delayed by the digital delay 52 until the I signal interpolation is completed. Then interpolate. After interpolation, the I signal is delayed by the digital delay unit 54 until the interpolation of the Q signal is completed, and is converted to an analog signal by the D / A converter 55. The Q signal is converted into an analog signal by the D / A converter 56 immediately after the interpolation is completed. The I signal which has become an analog signal is subjected to waveform shaping by the LPF 37 and the Q signal is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the first transmission rate band limiting filters 33 and 38 and the interpolation filter 51 are not operated. Here, the sampling frequencies of the band limiting filter, the interpolation filter, and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. Further, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter, the interpolation filter, and the LPF.

As described above, according to the fifth embodiment of the present invention, in the second embodiment, as the first to fourth interpolation filters, the second band limiting filter or the fourth
And a digital delay unit for delaying the Q signal output from the band-limiting filter, and a first signal obtained by delaying the I signal output from the first band-limiting filter and the Q signal output from the second band-limiting filter. Signal and Q to send at the transmission speed of
A first interpolation filter for performing signal filtering in a time-division manner, and a second transmission of a signal obtained by delaying an I signal output from a third band-limiting filter and a Q signal output from a fourth band-limiting filter. A second interpolation filter for filtering the I signal and the Q signal in a time-division manner for transmitting at a high speed and a digital delay unit for delaying the interpolated I signal are provided, so that the circuit scale can be reduced.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Sixth Embodiment) FIG. 6 shows a sixth embodiment of the present invention.
FIG. 6 is a block diagram of the modulation apparatus according to the embodiment. In FIG. 6, a serial / parallel converter 31 converts serial transmission data into symbol data. The mapping circuit 32
Symbol data which is connected to the serial / parallel converter 31 and is output from the serial / parallel converter 31 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 33 for the I signal used for the first transmission rate is connected to the mapping circuit 32. Digital delay device for I-signal with common band limitation at first transmission rate and second transmission rate
52 is connected to the first band-limiting filter 33 and the third band-limiting filter 42 for the I signal. The first interpolation filter 51 is connected to the digital delay unit 52 and the second band limit filter 38, and outputs a signal obtained by delaying the output of the first band limit filter 33 by the digital delay unit 52 and the second band limit filter 38. The sampling frequency of the output signal is increased alternately by time division. D / A converter 55 for I signal that operates at a common conversion rate at the first transmission rate and the second transmission rate
Is connected to a first interpolation filter 51 and a second interpolation filter 53. The first LPF 37 for the analog I signal is connected to the D / A converter 55 and filters the analog I signal after the D / A conversion. The second for the Q signal used for the first transmission rate
Is connected to the mapping circuit 32. A digital delay unit 54 for the interpolated Q signal common to the first transmission rate and the second transmission rate is connected to the first interpolation filter 51 and the second interpolation filter 53. A D / A converter 56 for the Q signal, which operates at a common conversion rate at the first transmission rate and the second transmission rate, is connected to a digital delay unit 54 for the Q signal. Second for analog Q signal
LPF 41 is connected to a D / A converter 56 and filters the analog Q signal after the D / A conversion.

The third band limiting filter 42 for the I signal used for the second transmission rate is connected to the mapping circuit 32. The second interpolation filter 53 is connected to the digital delay unit 52 and the fourth band limit filter 44, and outputs a signal obtained by delaying the output of the third band limit filter 42 by the digital delay unit 52 and the fourth band limit filter 44. The sampling frequency of the output signal is increased alternately by time division. The fourth band-limiting filter 44 for the Q signal used for the second transmission rate is connected to the mapping circuit 32.

The operation of the modulator according to the sixth embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 31 and the mapping circuit 32 are operated at the first transmission speed. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a first band limiting filter 33 for a first transmission rate, and the Q signal is a second band limiting filter for a first transmission rate. At 38, the band of digital processing is limited. After converting these I and Q signals into analog signals, LP
An interpolation filter 51 for the first transmission rate is used as an interpolation filter for increasing the sampling frequency so that a desired band can be easily obtained in F. In order to interpolate the Q and I signals alternately, the Q signal immediately interpolates the output of the second band-limiting filter 38, and the I signal is delayed by the digital delay 52 until the interpolation of the Q signal is completed. Then interpolate. The Q signal is delayed by the digital delay unit 54 until the interpolation of the I signal is completed, and the D / A converter 56 converts the interpolated signal into an analog signal. Immediately after the interpolation is completed, the I signal is converted into an analog signal by the D / A converter 55. The I signal which has become an analog signal is subjected to waveform shaping by the LPF 37 and the Q signal is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the band limit filters 42 and 44 and the interpolation filter 53 for the second transmission rate are not operated.

When data is modulated at the second transmission rate, the serial-parallel converter 31 and the mapping circuit
32 is operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a third band-limiting filter 42 for the second transmission rate, and the Q signal is a fourth band-limiting filter for the second transmission rate. At 44, the band of digital processing is limited. After converting these I and Q signals into analog signals, a second interpolation filter is used to increase the sampling frequency so that a desired band can be easily obtained with the LPF.
The interpolation filter 53 is used for the transmission speed of. In order to interpolate the Q signal and the I signal alternately, the Q signal immediately interpolates the output of the fourth band-limiting filter 44, and the I signal is delayed by the digital delay 52 until the interpolation of the Q signal is completed. Then interpolate. The Q signal is delayed by the digital delay unit 54 until the interpolation of the I signal is completed, and the D / A converter 56 converts the interpolated signal into an analog signal. Immediately after the interpolation is completed, the I signal is converted into an analog signal by the D / A converter 55. The analog signal I signal is LPF37, and the Q signal is LPF41.
Performs waveform shaping and outputs a modulated signal. At this time, the first transmission rate band limiting filters 33 and 38 and the interpolation filter 51 are not operated. Here, the sampling frequencies of the band limiting filter, the interpolation filter, and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. Further, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter, the interpolation filter, and the LPF.

As described above, according to the sixth embodiment of the present invention, in the second embodiment, as the first to fourth interpolation filters, the first band-limiting filter or the third band-pass filter is used.
A digital delay unit for delaying the I signal output from the band-limiting filter, a signal obtained by delaying the I signal output from the first band-limiting filter, and a Q signal output from the second band-limiting filter to the first Signal and Q to send at the transmission speed of
A first interpolation filter that performs signal filtering in a time-division manner, a second transmission of a signal obtained by delaying the I signal output from the third band-limiting filter, and a Q signal output from the fourth band-limiting filter. A second interpolation filter for filtering the I signal and the Q signal in a time-division manner for transmitting at a high speed and a digital delay unit for delaying the interpolated Q signal are provided, and the circuit scale can be reduced.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Seventh Embodiment) FIG. 7 shows a seventh embodiment of the present invention.
FIG. 10 is a block diagram of the modulation device according to the embodiment. In FIG. 7, a serial / parallel converter 31 converts serial transmission data into symbol data. The mapping circuit 32
Symbol data which is connected to the serial / parallel converter 31 and is output from the serial / parallel converter 31 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 33 for the I signal used for the first transmission rate is connected to the mapping circuit 32. The first interpolation filter 51 is connected to the first band limiting filter 33 and the digital delay unit 52, and delays the output signal of the first band limiting filter 33 and the output of the second band limiting filter 38 by the digital delay unit 52. The sampling frequency is increased alternately on a time-division basis in the time-division signal. A D / A converter 35 operating at a common conversion rate between the first transmission rate and the second transmission rate is connected to a first interpolation filter 51 and a second interpolation filter 53. The analog I signal analog delay unit 36 is connected to the D / A converter 35 and delays the analog I signal that has been D / A converted by the D / A converter 35. The first LPF 37 for the analog I signal is connected to the analog delay unit 36 and filters the analog I signal output from the analog delay unit 36. The second band-limiting filter 38 for the Q signal used for the first transmission rate is connected to the mapping circuit 32. The digital delay unit 52 for the Q signal, which is band-limited at the first transmission rate and the second transmission rate, has a second band-limiting filter 38 for the Q signal and a fourth band-limiting filter 38 for the Q signal.
Is connected to the band-limiting filter 44 of FIG. The second LPF 41 for the analog Q signal is connected to the D / A converter 35 and
The A-converted analog Q signal is filtered.

The third band-limiting filter 42 for the I signal used for the second transmission speed is connected to the mapping circuit 32. The second interpolation filter 53 is connected to the third band-limiting filter 42 for the I signal and the digital delay unit 52, and outputs the output signal of the third band-limiting filter 42 and the output of the fourth band-limiting filter 44 to a digital delay unit. The sampling frequency is alternately increased by time division on the signal delayed in 52. Fourth band limiting filter 44 for Q signal used for second transmission rate
Are connected to the mapping circuit 32.

The operation of the modulator according to the seventh embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 31 and the mapping circuit 32 are operated at the first transmission speed. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a first band limiting filter 33 for a first transmission rate, and the Q signal is a second band limiting filter for a first transmission rate. At 38, the band of digital processing is limited. After converting these I and Q signals into analog signals, LP
An interpolation filter 51 for the first transmission rate is used as an interpolation filter for increasing the sampling frequency so that a desired band can be easily obtained in F. In order to interpolate the I and Q signals alternately, the I signal immediately interpolates the output of the first band limiting filter 33, and the Q signal is delayed by the digital delay 52 until the interpolation of the I signal is completed. Then interpolate. The D / A converter 35 alternately converts the interpolated signal from a digital I signal and a Q signal to an analog signal. I became an analog signal
The signal is delayed by the analog delay 36 until the conversion of the Q signal is completed. The I signal that has become an analog signal is LPF37
Then, the Q signal is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the band limit filters 42 and 44 and the interpolation filter 53 for the second transmission rate are not operated.

When data is modulated at the second transmission rate, the serial-parallel converter 31 and the mapping circuit
32 is operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a third band-limiting filter 42 for the second transmission rate, and the Q signal is a fourth band-limiting filter for the second transmission rate. At 44, the band of digital processing is limited. After converting these I and Q signals into analog signals, a second interpolation filter is used to increase the sampling frequency so that a desired band can be easily obtained with the LPF.
The interpolation filter 53 is used for the transmission speed of. In order to interpolate the I and Q signals alternately, the I signal immediately interpolates the output of the third band-limiting filter 42, and the Q signal is delayed by the digital delay 52 until the I signal interpolation is completed. Then interpolate. The D / A converter 35 alternately converts the interpolated signal from a digital I signal and a Q signal to an analog signal.
The delayed I signal which has become an analog signal is delayed by the analog delay unit 36 until the conversion of the Q signal is completed. The delayed I signal which has become an analog signal is LPF37, and the Q signal is L
The PF 41 performs waveform shaping and outputs a modulated signal. At this time, the first transmission rate band limiting filters 33 and 38 and the interpolation filter 51 are not operated. Here, the sampling frequencies of the band limiting filter, the interpolation filter, and the D / A converter are set to the same value so as to satisfy the sampling theorem for the first and second transmission rates. Further, filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the band limiting filter, the interpolation filter, and the LPF.

As described above, according to the seventh embodiment of the present invention, in the fifth embodiment, the first and second D
The circuit scale includes a D / A converter that alternately D / A-converts the interpolated I signal and the delayed Q signal, and an analog delay that delays the D / A-converted analog I signal. Can be reduced.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

(Eighth Embodiment) FIG. 8 shows an eighth embodiment of the present invention.
FIG. 10 is a block diagram of the modulation device according to the embodiment. In FIG. 8, a serial / parallel converter 31 converts serial transmission data into symbol data. The mapping circuit 32
Symbol data which is connected to the serial / parallel converter 31 and is output from the serial / parallel converter 31 is converted into an I signal and a Q signal as amplitude / phase information. The first band-limiting filter 33 for the I signal used for the first transmission rate is connected to the mapping circuit 32. Digital delay device for I-signal with common band limitation at first transmission rate and second transmission rate
52 is connected to the first band-limiting filter 33 and the third band-limiting filter 42 for the I signal. The first interpolation filter 51 is connected to the digital delay unit 52 and the second band limit filter 38, and outputs a signal obtained by delaying the output of the first band limit filter 33 by the digital delay unit 52 and the second band limit filter 38. The sampling frequency of the output signal is increased alternately by time division. A D / A converter 35 operating at a common conversion rate between the first transmission rate and the second transmission rate is connected to a first interpolation filter 51 and a second interpolation filter 53. The first LPF 37 for the analog I signal is a D / A converter
The D / A-converted analog I signal is connected to 35 and is filtered. The second band-limiting filter 38 for the Q signal used for the first transmission rate is connected to the mapping circuit 32. The analog Q signal analog delay unit 36 is connected to the D / A converter 35 and delays the D / A converted analog Q signal. The second LPF 41 for the analog Q signal is connected to the analog delay unit 36 and filters the analog Q signal output from the analog delay unit 36.

The third band limiting filter 42 for the I signal used for the second transmission speed is connected to the mapping circuit 32. The second interpolation filter 53 is connected to the digital delay unit 52 and the fourth band-limiting filter 44, and outputs a signal obtained by delaying the output of the third band-limiting filter 42 by the digital delay unit 52 and the fourth band-limiting filter 44. The sampling frequency of the output signal is increased alternately by time division. The fourth band-limiting filter 44 for the Q signal used for the second transmission rate is connected to the mapping circuit 32.

The operation of the modulator according to the eighth embodiment configured as described above will be described. First, the first
When the data is modulated at the transmission speed, the serial / parallel converter 31 and the mapping circuit 32 are operated at the first transmission speed. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a first band limiting filter 33 for a first transmission rate, and the Q signal is a second band limiting filter for a first transmission rate. At 38, the band of digital processing is limited. After converting these I and Q signals into analog signals, LP
An interpolation filter 51 for the first transmission rate is used as an interpolation filter for increasing the sampling frequency so that a desired band can be easily obtained in F. In order to interpolate the Q and I signals alternately, the Q signal immediately interpolates the output of the second band-limiting filter 38, and the I signal is delayed by the digital delay 52 until the interpolation of the Q signal is completed. Then interpolate. The D / A converter 35 alternately converts the interpolated signal from a digital Q signal and an I signal to an analog signal. Q that became an analog signal
The signal is delayed by the analog delay 36 until the conversion of the I signal is completed. The I signal that has become an analog signal is LPF37
Then, the delayed Q signal is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the band limit filters 42 and 44 and the interpolation filter 53 for the second transmission rate are not operated.

When data is modulated at the second transmission rate, the serial / parallel converter 31 and the mapping circuit
32 is operated at the second transmission rate. Regarding the I signal and the Q signal output from the mapping circuit 32, the I signal is a third band-limiting filter 42 for the second transmission rate, and the Q signal is a fourth band-limiting filter for the second transmission rate. At 44, the band of digital processing is limited. After converting these I and Q signals into analog signals, a second interpolation filter is used to increase the sampling frequency so that a desired band can be easily obtained with the LPF.
The interpolation filter 53 is used for the transmission speed of. In order to interpolate the Q signal and the I signal alternately, the Q signal immediately interpolates the output of the fourth band-limiting filter 44, and the I signal is delayed by the digital delay 52 until the interpolation of the Q signal is completed. Then interpolate. The D / A converter 35 alternately converts the interpolated signal from a digital Q signal and an I signal to an analog signal.
The analog Q signal is delayed by the analog delay unit 36 until the conversion of the I signal is completed. The I signal, which has been converted into an analog signal, is subjected to waveform shaping by the LPF 37 and the delayed Q signal is subjected to waveform shaping by the LPF 41 to output a modulated signal. At this time, the first
The band-limiting filters 33 and 38 and the interpolation filter 51 for the transmission speed are not operated. Here, the sampling frequency of the band limiting filter, the interpolation filter and the D / A converter is the first.
And the second transmission rate are set equal to satisfy the sampling theorem. Also, a band limiting filter,
Filter characteristics are distributed so that a desired frequency spectrum is obtained by the total characteristics of the interpolation filter and the LPF.

As described above, according to the eighth embodiment of the present invention, in the sixth embodiment, the first and second D
The circuit scale includes a D / A converter for alternately D / A converting the delayed I signal and the interpolated Q signal, and an analog delay for delaying the D / A converted analog Q signal. Can be reduced.

In the above description, an example has been described in which the modulation device has two types of transmission speeds. However, the present invention can be similarly applied to a plurality of transmission speeds of two or more types.

[0070]

As described above, the present invention provides a serial / parallel converter for converting serial transmission data into symbol data, a mapping circuit for converting symbol data into I and Q signals serving as amplitude and phase information, and A first band-limiting filter for an I signal used for a first transmission rate, a second band-limiting filter for a Q signal used for a first transmission rate,
A third band-limiting filter for the I signal used for the second transmission rate, a fourth band-limiting filter for the Q signal used for the second transmission rate, and conversion common to the first and second transmission rates A first D / A converter for a band-limited I signal operating at a speed and a second D / A for a band-limited Q signal operating at a common conversion speed for the first and second transmission rates A converter,
A first LPF for a D / A-converted analog I signal shared for the first and second transmission rates and a second LPF for a D / A-converted analog Q signal shared for the first and second transmission rates LP
By providing F, there is an effect that the circuit scale can be reduced by using an analog circuit common to a plurality of transmission speeds.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a modulation device according to a first embodiment of the present invention;

FIG. 2 is a block diagram showing a configuration of a modulation device according to a second embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration of a modulation device according to a third embodiment of the present invention;

FIG. 4 is a block diagram showing a configuration of a modulation device according to a fourth embodiment of the present invention;

FIG. 5 is a block diagram showing a configuration of a modulation device according to a fifth embodiment of the present invention;

FIG. 6 is a block diagram showing a configuration of a modulation device according to a sixth embodiment of the present invention;

FIG. 7 is a block diagram showing a configuration of a modulation device according to a seventh embodiment of the present invention;

FIG. 8 is a block diagram showing a configuration of a modulation device according to an eighth embodiment of the present invention;

FIG. 9 is a block diagram illustrating a configuration of a conventional modulation device.

[Explanation of symbols]

 1, 11, 31, 201 serial / parallel converter 2, 12, 32, 202 mapping circuit 3, 13, 33, 203 first band limiting filter 4, 15, 55, 204 first D / A converter 5, 16, 37, 205 First LPF 6, 17, 38, 206 Second band limiting filter 7, 19, 56, 207 Second D / A converter 8, 20, 41, 208 Second LPF 9, 21, 42, 209 Third band limiting filter 10, 23, 44, 212 Fourth band limiting filter 14, 34, 51 First interpolation filter 18, 39, 53 Second interpolation filter 22, 43 Third Interpolation filters 24, 45 Fourth interpolation filter 35 D / A converter 36 Analog delay unit 40, 52, 54 Digital delay unit 210 Third D / A converter 211 Third LPF 213 Fourth D / A conversion Container 214 Fourth LPF

Continuation of the front page (72) Inventor Kazunori Inokachi 4-3-1 Tsunashima Higashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Inside Matsushita Communication Industrial Co., Ltd. (56) References JP-A-8-102766 (JP, A) 4-271550 (JP, A) JP-A-3-154458 (JP, A) JP-A-7-15478 (JP, A) JP-A-4-239245 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04L 27/00-27/38

Claims (8)

(57) [Claims] 1. A serial-to-parallel converter for converting serial transmission data into symbol data, a mapping circuit for converting symbol data into I and Q signals serving as amplitude and phase information, and an I signal used for a first transmission rate A first band-limiting filter for the first signal, a second band-limiting filter for the Q signal used for the first transmission rate, a third band-limiting filter for the I signal used for the second transmission rate, and a second A fourth band-limiting filter for the Q signal used for the transmission speed of the first band, a first D / A converter for the band-limited I signal operating at a conversion speed common to the first and second transmission speeds, A second D / A converter for a band-limited Q signal operating at a conversion rate common to the first and second transmission rates, and a D / A-converted analog shared for the first and second transmission rates First LP for I signal
F and a second LPF for D / A-converted analog Q signals shared by the first and second transmission speeds, and the circuit scale is reduced by sharing an analog circuit for a plurality of transmission speeds Modulator. 2. The first to fourth band-limiting filters operating at a low sampling frequency.
2. The modulation device according to claim 1, further comprising a band-limiting filter up to and a first to fourth interpolation filter for increasing a sampling frequency, and lowering an operating frequency of the band-limiting filter to reduce power consumption. 3. A digital delay unit for delaying an interpolated Q signal as a first and second D / A converter, and a D / A for alternately D / A converting an interpolated I signal and a delayed Q signal.
3. The modulation device according to claim 2, further comprising a converter, and an analog delay unit for delaying the analog I signal that has been D / A converted, to reduce a circuit scale. 4. A digital delay unit for delaying an interpolated I signal, and a D / A for alternately D / A converting the delayed I signal and the interpolated Q signal as first and second D / A converters.
3. The modulation device according to claim 2, further comprising a converter and an analog delay unit for delaying the D / A-converted analog Q signal to reduce a circuit scale. 5. A digital delay device for delaying a second band-limiting filter or a Q signal output from the fourth band-limiting filter as the first to fourth interpolation filters;
In order to transmit at a first transmission rate a signal obtained by delaying the I signal output from the band-limiting filter and the Q signal output from the second band-limiting filter at a first transmission rate, time-division filtering is performed on the I signal and the Q signal. A first interpolation filter and an I signal and a Q signal for transmitting a signal obtained by delaying the I signal output from the third band limiting filter and the Q signal output from the fourth band limiting filter at a second transmission rate. 3. The circuit according to claim 2, further comprising a second interpolation filter for performing signal filtering in a time-division manner, and a digital delay device for delaying the interpolated I signal, thereby reducing the circuit scale.
The modulation device as described in the above. 6. A digital delay device for delaying an I signal output from a first band-limiting filter or a third band-limiting filter as first to fourth interpolation filters;
In order to transmit a signal obtained by delaying the I signal output from the band-limiting filter and the Q signal output from the second band-limiting filter at the first transmission rate, the I signal and the Q signal are filtered in a time division manner. A first interpolation filter, a signal obtained by delaying the I signal output from the third band-limiting filter, and a Q signal output from the fourth band-limiting filter are transmitted at the second transmission rate by the I signal and the Q signal. 3. The circuit scale is reduced by providing a second interpolation filter that performs signal filtering in a time-division manner and a digital delay unit that delays the interpolated Q signal.
The modulation device as described in the above. 7. A D / A converter for alternately D / A-converting an interpolated I signal and a delayed Q signal as a first and second D / A converter, and an analog I / O converter for D / A conversion. 6. The modulation device according to claim 5, further comprising an analog delay device for delaying a signal, wherein a circuit size is reduced. 8. A D / A converter for alternately D / A converting a delayed I signal and an interpolated Q signal as a first and second D / A converter, and an analog Q / D converter for D / A conversion. 7. The modulation device according to claim 6, further comprising an analog delay device for delaying a signal, wherein a circuit size is reduced.