CN115022141B - GMSK signal digital modulation transmitting device and method - Google Patents
GMSK signal digital modulation transmitting device and method Download PDFInfo
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- CN115022141B CN115022141B CN202210686847.4A CN202210686847A CN115022141B CN 115022141 B CN115022141 B CN 115022141B CN 202210686847 A CN202210686847 A CN 202210686847A CN 115022141 B CN115022141 B CN 115022141B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
- H04L27/2007—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained
- H04L27/2017—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained in which the phase changes are non-linear, e.g. generalized and Gaussian minimum shift keying, tamed frequency modulation
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention discloses a GMSK signal digital modulation transmitting device and a method, wherein the device comprises the following steps: the source coding circuit is used for converting a digital signal issued by a computer into a serial code element signal and generating a switch signal; the GMSK baseband forming circuit is used for respectively carrying out symbol accumulation and filtering on the serial symbols; the up-sampling circuit is used for interpolating the sequence value accumulated by the code elements and the filtered sequence value; the digital up-conversion circuit is used for generating GMSK modulation signal data according to the sequence value accumulated by the interpolated code elements and the filtered sequence value; the DA conversion circuit is used for converting GMSK modulation signal data into analog signals; the TR module is used for up-converting and power amplifying the analog signal and transmitting or receiving the signal according to the switching signal. The invention can effectively avoid the unbalanced error of amplitude and phase between I, Q paths caused by an analog modulation mode; greatly reduces the operation resources of the FPGA.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a GMSK signal digital modulation transmitting device and method.
Background
The pulse shaping technique may use Minimum Shift Keying (MSK) modulation or other modulation scheme suitable for a non-linear amplifier with high power efficiency in combination with a particularly efficient gaussian pulse shaping filter, i.e. Gaussian Minimum Shift Keying (GMSK) signal modulation. The GMSK signal modulation is a binary modulation method which is changed by MSK signal modulation, and the Gaussian pulse shaping technology of the baseband smoothes the phase curve of the MSK signal, stabilizes the instantaneous frequency change of the signal, and greatly reduces the level of the side lobe of the frequency spectrum of the transmitting signal. GMSK is favored because of its constant envelope characteristics, which gives it excellent power efficiency and, after gaussian filtering, excellent spectral efficiency.
The existing GMSK signal modulation mainly comprises two modes of analog and digital, and has no problem of relatively large sampling rate and bandwidth for the analog modulation mode, but the analog circuit design of the analog modulation mode is complex, and an unbalanced error of amplitude and phase exists between two paths of modulation signals I, Q. The digital modulation mode mostly adopts a framework of an FPGA chip, a digital up-conversion (DUC) chip and a DAC chip, and is mostly implemented in a GMSK signal modulation transmitting device with a smaller sampling rate and bandwidth. For the full digital GMSK signal modulation mode with larger sampling rate and bandwidth, the digital filter has high design order, and occupies more hardware resources such as a multiplier, an adder and the like; the invention can realize GMSK digital modulation with larger sampling rate and bandwidth by optimizing the GMSK digital modulation flow and using less resources.
Disclosure of Invention
In view of this, the invention provides a GMSK signal digital modulation transmitting device and method, which effectively avoid the problem of unbalanced error of amplitude and phase between I, Q paths caused by an analog modulation mode; the digital filter design order is high, the hardware resources such as a multiplier and an adder are occupied, and the digital up-conversion filter is suitable for a relatively large GMSK signal modulation device with sampling rate and bandwidth.
The invention discloses a GMSK signal digital modulation transmitting device which is suitable for digital GMSK signal modulation with larger sampling rate and bandwidth, and comprises a source coding circuit, a GMSK baseband forming circuit, an upsampling circuit, a digital up-conversion circuit, a DA conversion circuit and a TR component which are connected in sequence;
the source coding circuit is used for converting a digital signal issued by a computer into a serial code element signal and generating a switching signal;
the GMSK baseband forming circuit is used for respectively accumulating and filtering the serial code elements output by the source coding circuit;
the up-sampling circuit is used for interpolating the sequence value accumulated by the code elements output by the GMSK baseband forming circuit and the filtered sequence value;
the digital up-conversion circuit is used for generating GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit is used for converting GMSK modulation signal data into analog signals;
the TR component is used for carrying out up-conversion and power amplification on the analog signals output by the DA conversion circuit, and carrying out signal transmission or signal reception according to the switch signals generated by the source coding circuit.
Further, the source coding circuit is specifically configured to:
firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion mark signals are output in parallel after the NRZI coding is completed; second, the symbol information after NRZI coding is converted into serial output, at which time the symbol rate is low.
Further, the GMSK baseband shaping circuit is specifically configured to:
firstly, zero padding is carried out on data after serial-parallel conversion, and symbol accumulation and FIR filtering are respectively carried out on the data after zero padding to complete Gaussian filter phase accumulation.
Further, the digital up-conversion circuit includes:
the summation module is used for directly summing the sequence value accumulated by the interpolated code element, the sequence value after FIR filtering and the calculated carrier signal phase value to obtain a phase value of GMSK modulation signal data;
and the DDS is used for generating GMSK modulation signal data according to the phase value obtained by the summation module.
Further, the digital up-conversion circuit is further configured to perform spectrum shifting on the baseband signal with the up-sampled data rate being increased, to a radio frequency signal with a frequency far greater than the symbol rate.
Further, the source coding circuit, the GMSK baseband shaping circuit, the upsampling circuit and the digital up-conversion circuit are all arranged on an FPGA.
The invention also discloses a GMSK signal digital modulation method, which comprises the following steps:
the source coding circuit converts a digital signal issued by a computer into a serial code element signal and generates a switching signal;
the GMSK baseband forming circuit respectively performs symbol accumulation and filtering on serial symbols output by the source coding circuit;
the up-sampling circuit interpolates the sequence value accumulated by code elements output by the GMSK baseband forming circuit and the filtered sequence value;
the digital up-conversion circuit generates GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit converts GMSK modulation signal data into an analog signal;
and the TR component carries out up-conversion and power amplification on the analog signal output by the DA conversion circuit, and carries out signal transmission or reception according to the switch signal generated by the source coding circuit.
Further, the source coding circuit converts the input parallel symbol information into serial symbols, including:
firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion mark signals are output in parallel after the NRZI coding is completed; second, the symbol information after NRZI coding is converted into serial output, at which time the symbol rate is low.
Further, the digital up-conversion circuit generates GMSK modulated signal data according to the sequence value accumulated by the code element interpolated by the up-sampling circuit and the filtered sequence value, and includes:
directly summing the sequence value accumulated by the interpolated code element and the sequence value after FIR filtering with the calculated carrier signal phase value to obtain a phase value of GMSK modulation signal data, and then sending the phase value into a DDS to generate the GMSK modulation signal data; the up-sampled data rate enhanced baseband signal is spectrally shifted to a radio frequency signal having a frequency substantially greater than the symbol rate.
Further, the DDS generates a high-speed sinusoidal signal by an orthogonal method to complete digital up-conversion.
Due to the adoption of the technical scheme, the invention has the following advantages: the invention is suitable for various application environments such as radar, communication, countermeasure and the like, can greatly reduce FPGA operation resources, saves resources for defining more complex communication functions for a software radio communication system, and can generate GMSK modulation signals with constant envelope modulation.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments described in the embodiments of the present invention, and other drawings may be obtained according to these drawings for those skilled in the art.
Fig. 1 is a schematic structural diagram of a GMSK signal digital modulation transmitting apparatus according to an embodiment of the present invention;
fig. 2 is a flow chart of a GMSK signal digital modulation transmitting method according to an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and examples, wherein it is apparent that the examples described are only some, but not all, of the examples of the present invention. All other embodiments obtained by those skilled in the art are intended to fall within the scope of the embodiments of the present invention.
The embodiment of the invention adopts a hardware framework mode of FPGA+DAC: the FPGA mainly completes source coding and GMSK signal modulation. The code rate of the source coding is low, and bit filling and NRZI coding are completed. The modulation of the GMSK signal mainly comprises a GMSK baseband forming module, a digital up-conversion circuit and an up-sampling circuit, so that the sampling rate of the signal is far greater than the signal bandwidth, and the sampling rate output by the FPGA meets the requirement of the DAC intermediate frequency data rate. Fig. 1 shows a configuration of a transmitting device for GMSK signal modulation according to the present invention, specifically as follows:
a) Source coding circuit: firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion mark signals are output in parallel after the NRZI coding is completed; and then, converting the symbol information subjected to NRZI coding into serial output, wherein the symbol rate is low.
b) GMSK baseband shaping circuitry: the serial symbol having a low input rate is subjected to gaussian shaping filtering, and the symbol rate at this time is low, so that baseband shaping can be performed using a gaussian filter having a low order. In order to reduce the order of the Gaussian filter, zero insertion filling is firstly carried out on the data after serial-parallel conversion, and the data after zero insertion filling is respectively subjected to symbol accumulation and FIR filtering to complete the Gaussian filter phase accumulation function.
c) And the upsampling circuit is used for: respectively interpolating the sequence value accumulated by the code elements and the sequence value after FIR filtering to improve the data rate;
d) Digital up-conversion circuit: and directly summing the sequence value accumulated by the interpolated code element and the sequence value after FIR filtering with the calculated carrier signal phase value to obtain the phase value of GMSK modulation signal data, and then sending the phase value into a DDS to generate the GMSK modulation signal data. The up-sampled data rate enhanced baseband signal is spectrally shifted to a radio frequency signal having a frequency substantially greater than the symbol rate.
e) DA conversion circuit: converting the digital GMSK signal into an analog signal and sending the analog signal to the TR component;
f) TR assembly: analog up-conversion, power amplification and other treatments are carried out on the analog signals output by the DA;
referring to fig. 2, the gmsk signal digital modulation flow is as follows:
s1, a source coding circuit converts a digital signal issued by a computer into a serial code element signal and generates a switch signal;
the computer transmits the message to the source coding module through the serial port, the source coding module converts the received message into serial code elements and generates a switching signal, the code element signal rate is low, and the switching signal is used for controlling the TR to transmit and receive;
s2, a GMSK baseband forming circuit respectively performs symbol accumulation and filtering on serial symbols output by a source coding circuit;
the code rate is usually only a few ksHz to a few tens of kHz, and the serial code element with lower input rate is subjected to Gaussian shaping filtering by a GMSK baseband shaping circuit;
s3, the up-sampling circuit interpolates the sequence value accumulated by the code elements output by the GMSK baseband forming circuit and the filtered sequence value;
interpolation filtering is carried out on the formed baseband signals so as to improve the data sampling rate;
s4, the digital up-conversion circuit generates GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
mixing the baseband signal of which the data sampling rate is increased by up-sampling through a digital up-conversion circuit to finish frequency spectrum shifting to a radio frequency signal with the frequency far greater than the code element rate;
s5, converting GMSK modulation signal data into analog signals by the DA conversion circuit;
converting the digital GMSK signal into an analog signal through a DA conversion circuit, and sending the analog signal to a TR component;
s6, the TR component carries out up-conversion and power amplification on the analog signals output by the DA conversion circuit, and carries out signal transmission or reception according to the switching signals generated by the source coding circuit.
Analog signals output by the DA are subjected to analog filtering, power amplification and other treatments through the TR component, and finally are transmitted through an antenna.
Real-time and dynamic parameter configuration:
a) Different code element coding modes can be configured according to different transmission requirements, and coding efficiency is improved.
b) According to the working frequency of the channel, GMSK modulation signals with different frequencies can be configured, and the GMSK modulation signals are compatible with various channel transmissions.
Preferred means are:
preferred examples of its application devices consist of devices including, but not limited to, field Programmable Gate Arrays (FPGAs), analog-to-digital converters (ADCs), peripheral clocks, power supplies, etc., as follows:
a) Field Programmable Gate Array (FPGA): as the main implementation chip of the optimized GMSK modulation signal, the performance of the FPGA has direct influence on the GMSK fast modulation, and the optimized coding process comprises a large amount of operations such as DDS, FIR and the like, so that certain requirements are met on resources, the typical LUT resources are more than about hundred thousand, and the multiplier resources (DSP) are more than about one thousand;
b) Digital-to-analog converter (DAC): the ADC mainly plays a role in digital-to-analog conversion in the wireless transmitting device, and an LVDS bus is built between the ADC and the FPGA for transmitting data;
c) Peripheral clock, power: the device is used for supplying power to the chip on board, outputting a system clock, resetting and outputting, outputting a clock special for a high-speed serial interface, an interface adapting circuit, a peripheral data storage circuit and the like.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the invention without departing from the spirit and scope of the invention, which is intended to be covered by the claims.
Claims (10)
1. The GMSK signal digital modulation transmitting device is suitable for digital GMSK signal modulation with larger sampling rate and bandwidth, and is characterized by comprising a source coding circuit, a GMSK baseband forming circuit, an upsampling circuit, a digital up-conversion circuit, a DA conversion circuit and a TR component which are connected in sequence;
the source coding circuit is used for converting a digital signal issued by a computer into a serial code element signal and generating a switching signal;
the GMSK baseband forming circuit is used for respectively accumulating and filtering the serial code elements output by the source coding circuit;
the up-sampling circuit is used for interpolating the sequence value accumulated by the code elements output by the GMSK baseband forming circuit and the filtered sequence value;
the digital up-conversion circuit is used for generating GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit is used for converting GMSK modulation signal data into analog signals;
the TR component is used for carrying out up-conversion and power amplification on the analog signals output by the DA conversion circuit, and carrying out signal transmission or signal reception according to the switch signals generated by the source coding circuit.
2. The apparatus of claim 1, wherein the source coding circuit is specifically configured to:
firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion mark signals are output in parallel after the NRZI coding is completed; second, the symbol information after NRZI coding is converted into serial output, at which time the symbol rate is low.
3. The apparatus of claim 1, wherein the GMSK baseband shaping circuit is specifically configured to:
firstly, zero padding is carried out on data after serial-parallel conversion, and symbol accumulation and FIR filtering are respectively carried out on the data after zero padding to complete Gaussian filter phase accumulation.
4. The apparatus of claim 1, wherein the digital up-conversion circuit comprises:
the summation module is used for directly summing the sequence value accumulated by the interpolated code element, the sequence value after FIR filtering and the calculated carrier signal phase value to obtain a phase value of GMSK modulation signal data;
and the DDS is used for generating GMSK modulation signal data according to the phase value obtained by the summation module.
5. The apparatus of claim 1 wherein the digital up-conversion circuit is further configured to spectrum shift the up-sampled, data rate enhanced baseband signal to a radio frequency signal having a frequency substantially greater than the symbol rate.
6. The apparatus of claim 1, wherein the source coding circuit, the GMSK baseband shaping circuit, the upsampling circuit, and the digital up-conversion circuit are all disposed on an FPGA.
7. A GMSK signal digital modulation transmission method suitable for digital GMSK signal modulation with a relatively large sampling rate and bandwidth, comprising:
the source coding circuit converts a digital signal issued by a computer into a serial code element signal and generates a switching signal;
the GMSK baseband forming circuit respectively performs symbol accumulation and filtering on serial symbols output by the source coding circuit;
the up-sampling circuit interpolates the sequence value accumulated by code elements output by the GMSK baseband forming circuit and the filtered sequence value;
the digital up-conversion circuit generates GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit converts GMSK modulation signal data into an analog signal;
and the TR component carries out up-conversion and power amplification on the analog signal output by the DA conversion circuit, and carries out signal transmission or reception according to the switch signal generated by the source coding circuit.
8. The method of claim 7, wherein the source coding circuit converts input parallel symbol information into serial symbols, comprising:
firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion mark signals are output in parallel after the NRZI coding is completed; second, the symbol information after NRZI coding is converted into serial output, at which time the symbol rate is low.
9. The method of claim 7, wherein the digital up-conversion circuit generates GMSK modulated signal data based on the sequence values accumulated by the interpolated symbols of the up-sampling circuit and the filtered sequence values, comprising:
directly summing the sequence value accumulated by the interpolated code element and the sequence value after FIR filtering with the calculated carrier signal phase value to obtain a phase value of GMSK modulation signal data, and then sending the phase value into a DDS to generate the GMSK modulation signal data; the up-sampled data rate enhanced baseband signal is spectrally shifted to a radio frequency signal having a frequency substantially greater than the symbol rate.
10. The method of claim 9, wherein the DDS generates a high-speed sinusoidal signal by an orthogonal method to perform digital up-conversion.
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| CN203896321U (en) * | 2013-12-26 | 2014-10-22 | 中国电子科技集团公司第四十一研究所 | Multi-mode signal generating device |
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| CN102983839A (en) * | 2012-12-05 | 2013-03-20 | 天津光电通信技术有限公司 | Method for realizing GMSK (Guassian Minimum Shift Keying) signal generator based on FPGA (Field Programmable Gate Array) |
| CN103647529B (en) * | 2013-12-26 | 2017-03-22 | 中国电子科技集团公司第四十一研究所 | Multimode signal generating device and signal generating method thereof |
| EP3063913B1 (en) * | 2014-01-22 | 2020-07-22 | Esa European Space Agency | Receiving method and receiver for timing and frequency offset correction of continuous phase demodulation in satellite-based automatic identification systems |
| US10812300B2 (en) * | 2016-04-15 | 2020-10-20 | Indian Institute Of Technology Hyderabad | Method and transmitter for generating a waveform with optimized PAPR |
| CN107171995B (en) * | 2017-02-27 | 2020-09-29 | 西安宇飞电子技术有限公司 | GMSK signal generation device and method, and signal detection device and method |
| CN110719115B (en) * | 2019-09-29 | 2021-09-10 | 中国工程物理研究院电子工程研究所 | Digital radio frequency transmitter based on FPGA |
| CN111970087B (en) * | 2020-07-30 | 2022-10-28 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | GMSK modulation hardware implementation method |
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| EP1287623A1 (en) * | 2000-05-12 | 2003-03-05 | Motorola, Inc. | Digital waveform generator apparatus and method therefor |
| CN203896321U (en) * | 2013-12-26 | 2014-10-22 | 中国电子科技集团公司第四十一研究所 | Multi-mode signal generating device |
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