JP3169418B2 - Frequency converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION This invention relates to frequency conversion equipment to handle a television signal as a digital signal.

[0002]

2. Description of the Related Art FIG. 20 is a diagram of a digital signal processing of an image by Takahiko Fukibuki (published by Nikkan Kogyo Shimbun). 118
~ P. 121 is a sampling frequency conversion device. In the figure, 1 is an input terminal, 2 is an A / D converter,
15a to 15d are interpolation filters connected in parallel ;
Is a data selector circuit for selecting any of the output signals of the four interpolation filters, 9 is a D / A converter, and 10 is an output terminal.

According to the sampling theorem, the original signal g (t) can be reconstructed from the sampled value g (it) as shown in Expression 1.

[0004]

(Equation 1)

As shown in FIG. 21, for example, a sampling frequency Fs = 3 · fs before conversion is changed to a sampling frequency Fs after conversion.
The case of converting to ss = 4 · fs will be described (fs
Is any number).

The sample values at Fs = 3 · fs are represented by Q0, Q
,..., And sample values at Fss = 4 · fs are denoted by P0, P1, P2,. Q0, Q1
,... To P0, P1,.
, Q1, Q2,..., G (0), g (1T), g
(3T),... (Where T = 1 / (3 · fs)) and substituting this into Equation 1 to obtain g (t),
, P1, P2,... May be substituted.

However, when the sampling frequency Fss to be converted is an integer, Pi and Qj have a specific phase relationship, which can be further simplified. That is, in principle, this conversion interpolates Pi using the least common multiple of 12 · fs of 4 · fs and 3 · fs, and resamples this at 4 · fs to obtain Qj. If the values obtained by sampling the sampling frequency at T = 1 / (4 · fs) at 12 · fs are S0, S1, S2,... As shown in FIG. From the relation, Qj is divided into three cases as shown in Expression 2.

[0008]

(Equation 2)

Therefore, in order to convert from Qj to Pi, four types of interpolation filters shown in Expression 2 may be arranged as shown in FIG. In the above, correct conversion can be performed if the number of terms in the sum is infinite, but in reality it is finite.

On the other hand, when considered in the frequency domain, the interpolation filter removes harmonic components generated by sampling at Fs = 3 · fs, as shown in FIG. 22, and performs base sampling by resampling at Fss = 4 · fs. It is a low-pass filter for removing components that are folded back into the band. This can be achieved with a frequency sampling filter.

An input image ｛x sampled at a sampling period T
.. yn, and the output image of the filter {yn} = y0, y1,... yn.

[0012]

(Equation 3)

The frequency characteristics of a transversal filter having (2N + 1) impulse responses are as shown in Equation 4.

[0014]

(Equation 4)

Therefore, for example, as shown in FIG. 23, when f = 0 and fs, H1 (f) = 1 and f = 2 ·
The filter in which H1 (f) = 0 at fs, 3 · fs,... · 6 · fs can be realized with 13 taps and 25 taps. Then, by substituting these equations and solving the 13-element and 25-element simultaneous equations, the tap coefficients h0, h1, h2,.
・ ・ HN can be obtained.

[0016]

SUMMARY OF THE INVENTION The conventional mark as described above is used.
In the present frequency conversion device, the circuit scale is dramatically increased unless the integer ratio of the frequency to be converted is large. For example, in the case of the conversion of 3 · fs → 7 · fs, the operation is performed at the least common multiple of 21 · fs, and seven types of interpolation filters are required.

Further, since the tap coefficient of the interpolation filter is finite, an ideal frequency characteristic cannot be expected. Therefore, the characteristic deteriorates to that extent, which leads to a deterioration in image quality.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and provides a frequency conversion apparatus which can have a simpler circuit configuration than the conventional one and which does not use an interpolation filter and does not degrade image quality. And a serial-parallel conversion operation suitable for this device.
Frequency conversion having serial-parallel conversion means to perform
The purpose is to obtain a replacement device .

[0019]

A frequency converter according to the first aspect of the present invention comprises a serial-parallel converter for converting a video signal which is converted into a digital signal and input serially into parallel, and a serial-parallel converter for converting the video signal into parallel. M that performs discrete cosine transform on M samples of pixels in the horizontal direction of the digital video signal input from the parallel conversion means
A point discrete cosine transform means, and M transform coefficients which are output results of the M point discrete cosine transform means, and when the difference between the N transform coefficients to be transformed is positive, the M transform coefficients are used. 0 in the term of the component higher than the highest order component of
Are sequentially substituted, and if the difference is negative, the terms are sequentially cut off from the highest order component, thereby providing N transform coefficients, and N transform coefficients adjusted by the transform coefficient adjust means. And N-point inverse discrete cosine transform means for performing inverse discrete cosine transform on the transform coefficients. A frequency converter according to a second aspect of the present invention is the frequency converter according to the first aspect, wherein an object to be subjected to discrete cosine transform by the M-point discrete cosine transform means is an image converted into the digital signal. By using pixels in the vertical direction of the video signal in place of M samples of pixels in the horizontal direction of the signal,
The number of scanning lines is changed from M lines to N lines. The frequency converter according to the third aspect of the present invention is the frequency converter according to the first aspect,
The discrete cosine transform performed by the M-point discrete cosine transform unit is performed on the pixels in the time axis direction of the video signal instead of the M samples of the horizontal pixels of the video signal converted into the digital signal. , The number of fields or the number of frames is converted from M fields or M frames to N fields or N frames. Further, the frequency conversion equipment according to the invention of claim 4 of the present application, enter the serial is converted into a digital signal
The time before and after the same pixel is different
Blocking is performed so that it exists in (block)
Serial-parallel converter that outputs in parallel
And the input from the serial-parallel conversion means.
For M samples of horizontal pixels of the digital video signal
-Point discrete cosine transform that performs discrete cosine transform
Means and the output result of the M-point discrete cosine transform means.
N transformation coefficients to be transformed with M transformation coefficients as inputs
If the difference from the number is positive, the most of the M transform coefficients
0 is sequentially substituted for the term of the component higher than the higher order component,
If the difference is negative, the terms are sequentially cut off from the highest order component.
, A conversion coefficient adjustment for outputting N conversion coefficients
Adjusting means and N adjusted by the conversion coefficient adjusting means.
N points at which inverse discrete cosine transform is performed on the transform coefficients
Inverse discrete cosine transform means, and the N-point inverse discrete cosine transform
The sampling phase between pixels of the output result of the
Phase adjusting means for adjusting the phase .

[0020]

Since the frequency converter according to the present invention uses the discrete cosine transform, even if a higher-order component having a low appearance probability is adjusted, the frequency is not much different from that of the original image. Few). Further, the frequency conversion device according to the present invention uses the same pixel a plurality of times in order to make the phase between pixels accompanied by blocking into a linear phase in order to perform discrete cosine conversion.

[0021]

[0022]

[Embodiment 1] An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, 1 is an input terminal, 2 is an analog-digital converter, 3 is a serial-parallel converter, 4 is an M-point discrete cosine conversion circuit, 5 is a conversion coefficient adjustment circuit, and 6 is an N-point inverse discrete cosine conversion circuit. , 7 is a phase adjustment circuit, 8 is a parallel-serial converter, 9 is a digital-
The analog converters 10a are output terminals, all of which are connected in tandem.

An input terminal 1 receives a scanned image signal x
(T), for example, R, G, B signals, or Y, RY,
The BY signal is input. FIG. 1 shows a block diagram of only one channel.

The A / D converter 2 samples the scanned image signal x (t) at a sampling frequency 1 / t [Hz], quantizes it at equal intervals, and obtains discrete values x0, x1, x2. , x3,... xn (see FIGS. 2 and 3).

The serial-parallel converter 3 comprises a shift register 13 and a D flip-flop 14, as shown in FIG. FIG. 15 shows a timing chart. In FIG. 15, ck1 is the clock of the shift register, and A, B, N are Q1, Q2, Q of the shift register 13.
n output, ck2 indicates the clock of the D flip-flop 14, and Qa, Qb, QN indicate the output of the D flip-flop 14.

The function of the serial-parallel converter 3 is to perform block processing for each M points (M is an arbitrary positive integer) in order to perform the discrete cosine transform (DCT) at the next stage. The case where M = 4 is shown. In a well-known general conversion method, since the connection between blocks is discontinuous, the pixel phase after frequency conversion does not become a linear phase. Therefore, the problem is solved by setting the last pixel of one block as the first pixel (same pixel) of the next block. In FIG.
The case where M = 4 is shown. In this case, x3 is the same pixel. In FIG. 15, xn, x2n, x3n,. . . Corresponds to that.

DCT is an abbreviation of discrete cosine transform, which is an orthogonal transform using only a cosine function. The purpose of this conversion is
The purpose of the present invention is to de-correlate the correlation between sample values by converting the sample values to mutually orthogonal axes. A component (conversion coefficient) yi obtained by the conversion is substantially decomposed from a DC component into a high-frequency component. Normally, an image signal has a large DC component and an extremely small high frequency component. Therefore, even if the conversion coefficient of the high frequency component is truncated or 0 is substituted, there is not much difference in frequency (there is no difference in image quality). Frequency conversion is performed based on this idea.

The M-point DCT circuit 4 performs M-point DCT using the above-mentioned serial-parallel converter 3 as an input signal of one block, which is divided into M pixels. Input image information x
j (j = 0, 1, 2,..., M-1)
The conversion coefficient yi (i = 0, 1,
2,... M-1) are calculated.

[0029]

(Equation 5)

[0030]

(Equation 6)

[0031]

(Equation 7)

For example, as in “Description of Conventional Technique 5, F
The conversion of s = 3 · fs → Fss = 4 · fs is shown in FIGS.
Is performed as shown in FIG. Two 1 blocks 4 shown in FIG.
The DCT of pixel data {x0, x1, x2, x3} is
Four transform coefficients y0 to y3 are obtained for each block from equations 5, 6, 7 or 8 (see FIG. 4).

[0033]

(Equation 8)

In this case, the value of Cij is as shown in Expression 9.

[0035]

(Equation 9)

The conversion coefficient adjusting circuit 5 calculates (M−1) · fs
In the conversion of (N−1) · fs, when it is desired to increase the sampling frequency (increase the number of pixels), the yn term which is the next highest component of the output signals yn to yn−1 of the preceding M-point DCT circuit 4 is equal to or more than To 0. Also, I want to reduce the sampling frequency (reducing the pixel), then cut off from yn-1 term with the highest yet order component of the output signal y0 -Yn-1 of M point DCT circuit 4. For example, in the 3 · fs → 4 · fs conversion, 0 may be substituted for the higher-order component y4 of y0 to y3 as shown in FIGS. Conversely, in the 4 · fs → 3 · fs conversion, as shown in FIGS. 9 and 10, the higher-order components y4 of y0 to y4 are cut off and converted to y0 to y3 to convert the sampling frequency.

The N-point IDCT circuit 6 is an inverse transform circuit of DCT. Using the output signal of the conversion coefficient adjusting circuit 5 as an input signal, a converted image xxj is obtained from Expression 10.

[0038]

(Equation 10)

However, the value of Cij is obtained from Expression 10, Expression 11, and Expression 12.

[0040]

[Equation 11]

[0041]

(Equation 12)

When this is represented by a matrix, Equation 13 is obtained.

[0043]

(Equation 13)

Is as follows.

Example 1.3 In the case of conversion of 1.3 · fs → 4 · fs,
As shown in Expression 14, four transform coefficients {yi} = {y0, y
The original image xxi is substituted by substituting 0 for the higher-order component y4 of 1, y2, y3}.
Are obtained (see FIG. 6).

[0046]

[Equation 14]

Example 2.4 In the case of conversion from 2.4 · fs to 3 · fs,
As shown in Expression 15, five transform coefficients {yi} = {y0,
y1, y2, y3, y4} is truncated to the original image xx
Four i are obtained (see FIG. 11).

[0048]

(Equation 15)

The phase adjusting circuit 7 adjusts the pixel phase at the joint between the blocks. Serial - By the last and the first pixel of the block treated with parallel converter 3 using the same data, the last and the first even block of the original image xxi same pixel occurs. Therefore, in this circuit, the average of the same adjacent pixels is obtained, and the pixel phase is set to a linear phase by defining one pixel. FIG. 7 shows the case of 3 · fs → 4 · fs conversion, and FIG. 12 shows the case of 4 · fs → 3 · fs conversion. In FIG. 7, xx4a and xx4b
However, in FIG. 12, xx3a and xx3b correspond thereto.

The parallel-serial converter 8 converts the parallel output M system of the phase adjustment circuit 7 into one system.

The D / A converter 9 outputs the digital signal xx
(J) is converted into an analog signal xx (t) to obtain a converted image (see FIGS. 8 and 13).

Embodiment 2 FIG. In the first embodiment, the horizontal pixels are delayed by using the serial-parallel converter 3. In the second embodiment shown in FIG. 16, a one-line delay circuit 11 is used instead of the serial-parallel converter 3. (M-
1) Connect them in series, perform DCT on vertical M pixels, adjust conversion coefficients, and perform N-point IDCT to convert to vertical N pixels. That is, the scanning line conversion from the (M-1) line to the (N-1) line. FIG. 17 shows a series of operations. The operation is the same as that of the first embodiment, except that the horizontal pixels are vertical pixels, and the frequency conversion method is exactly the same. The slightly different point is the parallel-serial converter 8. In the first embodiment, the parallel-serial conversion is performed in pixel units.
In the second embodiment, conversion is performed in line units (one line at a time).

Embodiment 3 FIG. In the above-described second embodiment, the processing is performed on the vertical pixels using the one-line delay circuit 11. However, in the third embodiment, as shown in FIG. 18, (M-1) one-field delay circuits or (M-1) The one-frame delay circuits 12 are connected in series to correct the pixels on the time axis (conversion of the field frequency and the frame frequency). FIG.
8 is a device for converting a field frequency of 60 Hz to 50 Hz, and FIG. 19 shows the operation.

In the conventional example, complicated processing is required for strict conversion. In the third embodiment, the conversion coefficient adjustment circuit 5 can perform a conversion that is close to strict only by truncating the conversion coefficient yf6. . 4, 5, 6, and 7 in the figure are omitted because they are the same as those in FIG. The parallel-serial converter 8
In the second embodiment, the conversion is performed for each line. In the third embodiment, the conversion is performed for each field or each frame.

[0055]

As described above, according to the frequency converter according to the first aspect of the present invention, serial-parallel conversion means for converting a video signal which is converted into a digital signal and input serially into parallel, M-point discrete cosine transform means for performing discrete cosine transform on M samples of horizontal pixels of the digital video signal input from the serial-parallel conversion means, and M which is an output result of the M-point discrete cosine transform means When the number of transform coefficients is input and the difference from the N transform coefficients to be transformed is positive, 0 is sequentially substituted into a term of a component higher than the highest order component among the M transform coefficients, When the difference is negative, the term is sequentially cut off from the highest order component, thereby providing a transform coefficient adjusting means for outputting N transform coefficients, and adjusting the transform coefficient by the transform coefficient adjusting means. And N-point inverse discrete cosine transform means for performing inverse discrete cosine transform on N transform coefficients
Since such comprises a relatively simple circuit configuration, the effect of image deterioration less frequency conversion device is obtained.
According to the frequency converter of the second aspect of the present invention, in the frequency converter of the first aspect,
Scanning is performed by using the discrete cosine transform of the point discrete cosine transform unit as a vertical pixel of the video signal instead of the M samples of the horizontal pixel of the video signal converted into the digital signal. Since the number of lines is converted from M lines to N lines, there is an effect that a frequency conversion apparatus with a relatively simple circuit configuration and little image quality deterioration can be obtained. According to the frequency conversion device of the third aspect of the present invention, in the frequency conversion device according to the first aspect, an object to be subjected to discrete cosine transform by the M-point discrete cosine transform means is converted into the digital signal. Instead of M samples of horizontal pixels of the video signal
Since the number of fields or the number of frames is converted from M fields or M frames to N fields or N frames by using pixels in the time axis direction of the video signal, image quality degradation can be achieved with a relatively simple circuit configuration. There is an effect that a small number of sampling frequency conversion devices can be obtained. Further
The frequency conversion device according to the invention of claim 4 of the present application
Video that is converted to digital signals and input serially.
The time before and after the image signal is different for the same pixel (block)
After performing blocking as in
Serial-parallel conversion means for outputting to
Digital video input from the real-parallel conversion means
A discrete cosine transform is applied to M samples of pixels in the horizontal direction of the image signal.
M-point discrete cosine transform means for performing an in-transform,
M transforms as output results of the M-point discrete cosine transform means
With the coefficients as inputs, the difference between the N
, The highest order component of the M transform coefficients
When 0 is sequentially substituted for the term of the higher component, and the difference is negative
By sequentially cutting off the terms from the highest order component,
Transform coefficient adjusting means for outputting N transform coefficients.
N conversion coefficients adjusted by the conversion coefficient adjustment means
N-point inverse discrete cosine that performs inverse discrete cosine transform on
Output means of the N-point inverse discrete cosine transform means
Adjust the sampling phase between the resulting pixels to a linear phase
Phase adjustment means.
In the circuit arrangement, it is possible to reduce the image quality degradation, the phase between pixels even if the blocking when the discrete cosine transform is the effect of the frequency converting device as a linear phase is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of a sampling frequency conversion device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating an input signal x (t) of the sampling frequency conversion device according to the first embodiment and an output signal xi of the A / D converter 2.

FIG. 3 is an explanatory diagram of an operation (blocking) of the serial-parallel converter 3 of the sampling frequency conversion device according to the first embodiment.

[4] 3 · f of the sampling frequency converting apparatus according to Example 1
FIG. 9 is a diagram illustrating an output signal (power of DCT transform coefficients for each block) yi of the DCT circuit 4 and its order i when converting from s to 4 · fs.

[5] 3 · f of the sampling frequency converting apparatus according to Example 1
FIG. 9 is a diagram illustrating an output (power of DCT transform coefficients for each block) yi of the transform coefficient adjustment circuit 5 and its order i when converting from s to 4 · fs.

[6] 3 · f of the sampling frequency converting apparatus according to Example 1
FIG. 9 is a diagram illustrating a phase relationship between pixels of an output signal xxN of the IDCT circuit 6 when converting s → 4 · fs.

FIG. 7 is an explanatory diagram of a phase adjustment circuit 7 of the sampling frequency conversion device according to the first embodiment.

FIG. 8 is a diagram illustrating an output xxi of a parallel-serial converter 8 and an output xx (t) of a D / A converter 9 of the sampling frequency conversion device according to the first embodiment.

[9] 4 · f for the sampling frequency conversion apparatus according to Embodiment 1
FIG. 9 is a diagram showing an output signal (power of DCT transform coefficients for each block) yi of the DCT circuit 4 and its order i when converting from s to 3 · fs.

FIG. 10 illustrates the sampling frequency conversion device according to the first embodiment.
FIG. 11 is a diagram illustrating an output (power of DCT transform coefficients for each block) yi of the transform coefficient adjustment circuit 5 and its order i when converting from fs to 3 · fs.

FIG. 11 illustrates the sampling frequency conversion device according to the first embodiment.
FIG. 9 is a diagram illustrating a phase relationship between pixels of an output signal xxN of the IDCT circuit 6 when converting fs → 3 · fs.

4 - in Figure 12 the sampling frequency converting apparatus according to the actual Example 1
FIG. 9 is an explanatory diagram of the phase adjustment circuit 7 when converting fs → 3 · fs.

FIG. 13 illustrates the sampling frequency conversion device according to the first embodiment.
The output xxi of the parallel-serial converter 8 and the output xx of the D / A converter 9 when converting from fs to 3 · fs
It is a figure showing (t).

FIG. 14 is a block circuit diagram of a serial-parallel converter 3 of the sampling frequency converter according to the first embodiment.

[15] The sampling frequency converting apparatus according to Embodiment 1 serial - is a timing chart of the parallel converter 3.

FIG. 16 is a block diagram of a scanning line conversion device according to a second embodiment of the present invention.

FIG. 17 is an operation explanatory diagram of the second embodiment.

FIG. 18 is a block diagram of a time-frequency converter according to Embodiment 3 of the present invention.

FIG. 19 is an operation explanatory diagram of the third embodiment.

FIG. 20 shows a conventional sampling frequency converter (3 · fs → 4)
FIG. 3 is a block diagram of ( fs) .

FIG. 21 shows a conventional sampling frequency converter (3 · fs → 4)
FIG. 11 is an explanatory diagram of the operation of (fs ) .

FIG. 22 shows a conventional sampling frequency converter (3 · fs → 4)
FIG. 6 is a diagram illustrating a frequency spectrum in sampling of 3 · fs in (fs ) .

FIG. 23 shows a conventional sampling frequency converter (3 · fs → 4);
FIG. 7 is a diagram illustrating frequency characteristics of an interpolation filter at ( fs) .

[Explanation of symbols]

Reference Signs List 1 input terminal 2 analog / digital converter 3 serial-parallel converter 4 M-point discrete cosine conversion circuit 5 conversion coefficient adjustment circuit 6 N-point inverse discrete cosine conversion circuit 7 phase adjustment circuit 8 parallel-serial converter 9 digital / analog conversion 10 Output terminals 11 (M-1) cascade-connected one-line delay circuits 12 (M-1) cascade-connected one-field delay circuits or one-frame delay circuits 13 Shift register 14 D flip-flop (data latch) ) 15 interpolation filter 16 data selector

Claims (4)

(57) [Claims] 1. A serial-parallel converter for converting a video signal input to a serial signal into a digital signal and outputting the signal in parallel, and M samples of horizontal pixels of the digital video signal input from the serial-parallel converter. And an M-point discrete cosine transform unit for performing a discrete cosine transform on the input, and M transform coefficients which are output results of the M-point discrete cosine transform unit are input, and a difference between the N transform coefficients to be transformed is positive. In the case of, by sequentially substituting 0 into the term of the component higher than the highest order component among the M transform coefficients, and by cutting off the term from the highest order component sequentially when the difference is negative, N Transform coefficient adjusting means for outputting a transform coefficient, and N-point inverse discrete-discrete for performing inverse discrete cosine transform on the N transform coefficients adjusted by the transform coefficient adjusting means Frequency conversion device is characterized in that a cosine transform unit. 2. The frequency conversion device according to claim 1, wherein an object to be subjected to the discrete cosine transformation by the M-point discrete cosine transformation means is M samples of pixels in a horizontal direction of the video signal converted into the digital signal. Instead, the number of scanning lines is M by using pixels in the vertical direction of the video signal.
A frequency conversion device for converting a line into an N line. 3. The frequency conversion apparatus according to claim 1, wherein the discrete cosine transform of the M-point discrete cosine transform means is performed on M samples of horizontal pixels of the video signal converted into the digital signal. Instead, a frequency converter converts the number of fields or the number of frames from M fields or M frames to N fields or N frames by using pixels in the time axis direction of the video signal. 4. A digital signal which is converted into a digital signal and inputted serially.
The time before and after the same pixel is different
Blocking is performed so that it exists in (block)
Serial-parallel converter that outputs in parallel
Stage and the digit input from the serial-parallel conversion means.
Apart from the M samples of the horizontal Direction of pixels tal video signal
M-point discrete cosine transform means for performing scattered cosine transform
And M output results of the M-point discrete cosine transform means
The difference from the N transform coefficients to be transformed with the transform coefficients as input
Is positive, the highest order of the M transform coefficients
0 is sequentially substituted for the component term higher than the component, and the difference is negative.
In that case, cut off the terms sequentially from the highest order component
Transform coefficient adjusting means for outputting N transform coefficients
And N conversion coefficients adjusted by the conversion coefficient adjustment means.
N-point inverse discrete cosine transform that performs inverse discrete cosine transform on a number
Between the in-transform means and the pixel of the output result of the N-point inverse discrete cosine transform means.
Phase adjusting means for adjusting the sampling phase to a linear phase;
A frequency conversion device comprising: