JP3167554B2 - Power supply for erase signal generation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply for an erase signal generating circuit used in a video tape recorder (VTR).

[0002]

2. Description of the Related Art In an editing VTR, stereo horizontal tracks (R track and L track) are employed.
In addition to the full-width erasing head, a recording / reproducing head and an erasing head dedicated to each of these tracks are provided. For each erase head, an erase signal generating circuit as shown in FIG. 2 is provided.

In FIG. 2, a power supply voltage of 12 V is applied from a terminal V. When the emitter-collector path of the power supply drive transistor Q1 is turned on, this voltage is applied via a ripple absorbing coil L1 and a current limiting resistor R1. Feedback type L
It is supplied to the oscillation transformer T1 of the C oscillation circuit 1. This oscillation circuit includes an oscillation transistor Q3, an oscillation capacitor C2, and the like in addition to the transformer T1, and an oscillation output is supplied to an erasing head (FEHEAD). The capacitor C1 is provided to remove a ripple in the power supply voltage. Q2 is a switching transistor. The collector of the transistor Q2 is connected to the base side of the power supply drive transistor, the emitter is grounded, and the base has a recording instruction signal (high level) from a microcomputer. Is supplied.

[0004]

By the way, a short test for shorting an arbitrary portion of a circuit may be performed on a VTR, particularly a set shipped overseas. In particular, in the PAL broadcast receiving area, regulations are strict and some measures are required for power supply circuits and other circuits. Among them, the above-mentioned capacitor is connected particularly to the block for the oscillating circuit for erasing, and when both ends of this capacitor are short-circuited, an excessive current flows through the resistor, which generates heat and causes ignition. Some countermeasures are necessary because they may occur. For this reason, conventionally, in order to prevent a large current flowing when both ends of the capacitor are short-circuited,
The resistor may be used as a fuse resistor to burn out the resistor, or the voltage between both ends of the capacitor C1 may be input to a microcomputer so that the voltage between both ends of the capacitor becomes zero during recording.
When the voltage is reached, the microcomputer detects this and forcibly stops the recording mode.

However, when the resistor is used as a fuse resistor, for example, a 1/4 W fuse resistor has a pitch of 10 mm, whereas other carbon resistors can be used at a pitch of 5 mm. ,
It is not preferable because there is a restriction that contact with a harness or the like for heat generation must be avoided.

Further, the method of taking in the voltage between both ends of the capacitor into the microcomputer requires a port of the microcomputer for detecting the voltage. In particular, when using a horizontal stereo track in an editing VTR, three oscillation circuits for L and R channel track erasing and for full erasing are required. Therefore, it is necessary to connect three lines to each of the ports of the microcomputer. Yes, unnecessarily using the number of ports, which is also undesirable.

Accordingly, an object of the present invention is to eliminate such a drawback.

[0008]

SUMMARY OF THE INVENTION The present invention provides an erasing oscillation circuit, a power supply drive transistor provided on a power supply line for supplying power for operating the oscillation circuit, and a drive transistor and an erasing oscillation circuit. A capacitor for removing ripples, one end of which is connected to a power supply line between the power supply line and the other end of the power supply line, and a microcomputer. A switching transistor for controlling the operation / non-operation of the drive transistor; and a protection diode for controlling the switching transistor to turn off the power supply drive transistor when both ends of the capacitor are short-circuited. And the switching transformer Characterized in that provided between the control input of register.

[0009]

According to the above arrangement, when the both ends of the ripple removing capacitor are short-circuited, the switching transistor is deactivated, thereby turning off the power supply drive transistor.

[0010]

An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, the same elements as those in FIG. 2 are denoted by the same reference numerals.

In FIG. 1, when a main power supply of a VTR rises from a terminal V, a power supply voltage is supplied to a power supply drive transistor Q1. The emitter-collector path of this power supply drive transistor Q1 has a ripple absorbing coil L
1 and a current limiting resistor R1 are connected in series to an oscillation transformer T1 of an erase signal generating oscillation circuit 1 composed of a feedback LC oscillation circuit. The oscillation circuit 1
Represents an oscillation transistor Q3,
An oscillation output (erase signal) from the oscillation circuit 1 is composed of an erasing head (FE HEA).
D).

The capacitor C1 is provided for removing a ripple in the power supply voltage. Q2 is a switching transistor. The collector of the transistor Q2 is connected to the base of the power supply drive transistor Q1, the emitter is grounded, and the base is connected to a microcomputer via a resistor R2.
Is supplied with a recording instruction signal (high level). D1
Is a protection diode whose cathode is connected to the connection point between the resistor R1 and the capacitor C1, and whose anode is connected between the resistor R2 and the base side of the transistor Q2.

When the both ends of the capacitor C1 are short-circuited in the recording state, the cathode of the diode is grounded, so that the base of the transistor Q2 becomes 0.6 volts.
Is turned off, so that the transistor Q1 is turned off. Therefore, it is possible to prevent an excessive current from flowing through the transistor Q2, the coil L1, and the resistor R1.

[0014]

As described above, according to the present invention, even when both ends of the ripple removing capacitor connected to the erase signal generating oscillation circuit are short-circuited by a short test or the like, the capacitor is supplied to the erase signal generating oscillator circuit. The power supply line can be suitably shut off with a simple configuration.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an erase signal generating oscillation circuit according to the present invention.

FIG. 2 is a diagram showing a configuration of a conventional erase signal generating oscillation circuit.

[Explanation of symbols]

 1 Oscillation circuit for generating erase signal Q1 Transistor for driving power supply Q2 Switching transistor FE HEAD Erase head L1 Ripple removing coil C1 Ripple removing capacitor D1 Protection diode

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G11B 5/024 603

Claims (1)

(57) [Claims] An oscillating circuit for erasing; a power supply drive transistor provided on a power supply line for supplying power for operating the oscillating circuit; one end of a power supply line between the drive transistor and the oscillating circuit for erasing; And a microcomputer for removing ripples, the other end of which is grounded, a microcomputer, and a control signal output from the microcomputer at the time of recording of a VTR to control the operation / non-operation of the power supply drive transistor. A switching transistor to be controlled; and a protection diode for controlling the switching transistor to turn off the power supply drive transistor when both ends of the capacitor are short-circuited. One end of the capacitor and a control input terminal of the switching transistor. With Power supply device for erase signal generating circuit, characterized in that provided in the.