JP3151599B2 - Switching power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PWM control type switching power supply capable of suppressing generation of an excessive voltage due to a failure in a control circuit.

[0002]

2. Description of the Related Art A conventional PWM type switching power supply comprises a DC-DC converter circuit 2 as a voltage adjusting circuit connected to a DC power supply 1 and a control circuit 3 as shown in FIG. 1 is adjusted by the DC-DC converter circuit 2 and the load 6 between the output terminals 4 and 5 is adjusted.
Is configured to supply a constant voltage to the.

The DC-DC converter circuit 2 as a voltage adjustment circuit includes an output transformer 7, a transistor 8 as a switching element, an output rectifier diode 9, and an output smoothing circuit 10. The series circuit of the primary winding 7a of the transformer 7 and the transistor 8 is connected between one end and the other end of the DC power supply 1. The DC power supply 1 is composed of a rectifying and smoothing circuit or a battery connected to an AC power supply. The output rectifier diode 9 is connected to the secondary winding 7b of the transformer 7. The smoothing circuit 10 includes a reactor 11, a capacitor 12, and a diode 13, and is connected between the output rectifier diode 9 and a pair of output-side lines.

A control circuit 3 for generating a PWM control signal for controlling the transistor 8 includes a voltage detection resistor as first output voltage detection means connected between output terminals 4 and 5 of the DC-DC converter circuit 2. It has 14 and 15 series circuits. The resistors 14 and 15 are for obtaining first detection voltages necessary for controlling the output voltage to a constant value at these voltage dividing points. Reference numeral 16 denotes a first control signal forming circuit, which comprises a first error amplifying transistor 17, a first Zener diode 18 for a reference voltage source, a resistor 19, and a first light emitting diode 20. The base of the transistor 17 is connected to the connection point (voltage division point) between the resistors 14 and 15, the emitter is connected to the ground via a Zener diode 18, and the collector is connected to the output terminal 4 via a light emitting diode 20. , The resistor 19 is connected between the output terminal 4 and the cathode of the Zener diode 18. Therefore, the first control signal forming circuit 16 compares the first detection voltage at the voltage dividing point of the two resistors 14 and 15 with the first reference voltage obtained by the Zener diode 18 using the transistor 17, and compares the two. Form an error output corresponding to the difference Transistor 17 as output terminal of error amplifier circuit
The first light emitting diode 20 is connected between the collector of the transistor 1 and the converter output terminal 4 so that the transistor 1
A first control signal comprising an optical signal having a strength corresponding to the error output of No. 7 is obtained from the first light emitting diode 20. The first light emitting diode 20 as a first control signal
The light output level changes in proportion to the output voltage of the DC-DC converter circuit 2.

A resistor 2 as a second output voltage detecting means
Reference numerals 1 and 22 are connected between the output terminals 4 and 5 of the DC-DC converter 2 to obtain a second detection voltage required for overvoltage protection at a voltage dividing point. The second control signal forming circuit 23 includes an error amplification transistor 24, a second Zener diode 25 as a second reference voltage source, a resistor 26, and a second light emitting diode 27. The base of the transistor 24 includes two voltage detecting resistors 21 and 22.
The emitter is connected to the ground via a Zener diode 25, and the collector is connected to the output terminal 4 via a second light emitting diode 27.
, And the resistor 26 is connected between the output terminal 4 and the cathode of the Zener diode 25. The second control signal forming circuit 23 includes the first control signal forming circuit 16
Or D due to the failure of the PWM control circuit part due to this output
The transistor is provided to prevent an abnormal increase in the output voltage of the C-DC converter circuit 2 or an abnormal increase in the output voltage due to a failure of the other switching power supply device when a plurality of switching power supply devices are connected in parallel. 24, a signal corresponding to the difference between the second detection voltage obtained from the voltage dividing point of the two resistors 21 and 22 and the second reference voltage based on the Zener diode 25, that is, an error signal, and the second control An optical signal corresponding to the error signal is output from the second light emitting diode 27 as a signal.

First and second light emitting diodes 20, 27
And first and second phototransistors 28 and 29 as first and second control elements are provided. One ends (collectors) of the first and second phototransistors 28 and 29 are connected to one terminal of the control power supply 30, respectively. The other end (emitter) of the first phototransistor 28 is connected to the other terminal of the control power supply 30 via the first resistor 31. The other end (emitter) of the second phototransistor 29 is connected to the control power supply 3 via the second resistor 32.
0 is connected to the other terminal. Further, a resistor 28a is connected in parallel with the first phototransistor 28.
A connection point 33 between the first phototransistor 28 and the first resistor 31 is connected to a positive input terminal of a PWM pulse forming comparator 36 via a first diode 35 forming an OR gate circuit 34. A triangular wave generating circuit 37 is connected to a negative input terminal of the comparator 36. The output terminal of the comparator 36 is connected to the base of the transistor 8 via the NOT circuit 38.

A noise removing capacitor 39 is connected in parallel with the second resistor 32. Reference numeral 40 denotes a third reference voltage source, which is a third reference voltage source for detecting an overvoltage state of the output voltage.
Of the reference voltage. The positive input terminal of the overvoltage detection comparator 41 is the second phototransistor 29
The negative input terminal is connected to a connection point 42 of the second resistor 32, that is, the upper end of the capacitor 39, and a third reference voltage source 40
It is connected to the. The overvoltage detection comparator 41 is configured to switch from a low level output voltage to a high level output voltage when the voltage of the capacitor 39 becomes equal to or higher than the third reference voltage. The comparator 41 has a response delay between its input and output. The set terminal S of the flip-flop 43 as a latch circuit is connected to the comparator 4
The output terminal Q is connected to the positive input terminal of the comparator 36 via a diode 44. The reset terminal R of the flip-flop 43 is DC
-It is connected to a reset circuit (not shown) that generates a reset signal when the DC converter circuit 2 starts or restarts. Accordingly, the flip-flop 43 enters the set state in response to the output indicating the overvoltage detection of the comparator 41, latches the overvoltage detection, and outputs an overvoltage protection signal from the output terminal Q. The voltage level of the output terminal Q of the flip-flop 43 is set to be low when there is no overvoltage, and set so that the width of the PWM pulse obtained from the NOT circuit 38 becomes zero or near zero when overvoltage occurs. The state change of the output terminal Q of the flip-flop 43 has a delay with respect to the set input.

The reference voltage source 45 supplies a fourth reference voltage for limiting the maximum duty ratio of the PWM pulse to a predetermined value smaller than 100%. That is, the reference voltage source 45 sets the maximum pulse width of the PWM pulse. The reference voltage source 45 is connected to the positive input terminal of the comparator 36 via the diode 46.

The OR gate circuit 34 includes diodes 35, 3
The voltages V1 and V2 between the anodes 4 and 46 and the ground
, V3 are selected and output.

The part of the OR gate circuit 34, the comparator 36 and the NOT circuit 38 can be called a switch control signal forming circuit, and is selected from three input voltages V1, V2 and V3 of the OR gate circuit 34. A PWM signal is formed by comparing one of the signals with the triangular wave voltage in a normal state, and a control signal for making the width of the PWM pulse zero in the case of an overvoltage is formed and output.

[0011]

Next, the operation of the conventional switching power supply of FIG. 1 will be described with reference to FIGS. When a PWM pulse is generated from the control circuit 3, the transistor 8
On / off in response to the WM pulse, the voltage of the DC power supply 1 is interrupted. The voltage obtained in the secondary winding 7b of the transformer 7 based on the intermittent voltage is rectified by the diode 9 and then smoothed by the smoothing circuit 10.

When the voltage between the output terminals 4 and 5 becomes higher than a target value (reference value) due to a voltage fluctuation of the power supply 1 or a fluctuation of the load 6 during normal operation of the switching power supply, the error amplifying transistor is used. Since the base potential of the transistor 17 increases and the difference between the base voltage and the first reference voltage of the Zener diode 18 increases, the base current of the transistor 17 increases, and the resistance of the transistor 17 decreases.
The current of the first light emitting diode 20 increases, and the light intensity of the optical signal as the first control signal increases. As a result, the resistance value of the first phototransistor 28 changes in inverse proportion to the light output of the first light emitting diode 20 and decreases, and the voltage V1 across the first resistor 31, that is, the connection point 3
3, the PWM control potential increases. In a normal state, the diodes 44 and 46 of the OR gate circuit 34 are off and only the diode 35 is on, so that the comparator 36
In FIG. 2A, the first voltage V1 between the connection point 33 and the ground and the triangular wave voltage Vt of the triangular wave voltage generating circuit 37 are shown in FIG.
And the first voltage V1 is equal to the triangular wave voltage V
A negative pulse (low-level output) is obtained in a section lower than t, and this is inverted by the NOT circuit 38 to form a positive PWM pulse train shown in FIG. 2B, and the transistor 8 corresponds to the width of the PWM pulse. Turn on. Now, assuming that the output voltage V0 has risen above the target value, the first
When the voltage V1 becomes higher, the width of the PWM pulse in the section before t0 in FIG. 2B becomes narrower than before.
The output voltage V0 decreases toward the target value. Output voltage V0
Is lower than the target value, an operation opposite to the above-mentioned case occurs.

Note that the output voltage V0 is significantly reduced, and the first voltage V1 is also reduced accordingly. The first voltage V1 is lower than the third voltage V3 of the maximum pulse width limiting reference voltage source 45. Is also low, the diode 35 is in a reverse bias state, and is in an off state. As a result, the comparator 36 forms a PWM pulse having the maximum pulse width determined by the third voltage V3.

The first light emitting diode 20 in the first control signal forming circuit 16 for constant voltage control in the circuit of FIG.
When the output voltage V0 rises abnormally due to the failure of the transistor to open (open) state or the failure of the collector, base or emitter of the transistor 17 to become open, or when the DC-DC converter When the output voltage V0, that is, the voltage of the common load rises abnormally due to the failure of another DC-DC converter circuit while the circuit 2 is connected in parallel with another DC-DC converter circuit, it is possible to limit this. Will be needed. The second control signal forming circuit 23 is provided to prevent the above abnormal overvoltage. Assuming that the first light emitting diode 20 is in an open state at time t0 in FIG. 2, the potential V1 at the connection point 33 is higher than the reference voltage V3 because the resistance value of the first phototransistor 28 is increased. As a result, the width of the PWM pulse is increased as shown in FIG. The second control signal forming circuit 23 is the first control signal forming circuit 1
6, the level of the optical signal as the second control signal obtained from the second light emitting diode 27 increases as the output voltage V0 increases, and the resistance value of the second phototransistor 29 increases. Changes inversely proportional to the optical signal and decreases. As a result, the voltage across the second resistor 32 increases. The voltage of the second resistor 32 is not directly input to the overvoltage detection comparator 41, but is used for charging the noise removal capacitor 41. That is, although the charging current flows through the noise removing capacitor 41 due to the lowering of the resistance value of the second phototransistor 29, the capacitor 41 is not immediately charged to the voltage across the second resistor 32 and has a time constant. To be charged. Therefore, a noise component having a narrow time width is absorbed by the capacitor 39, and accurate overvoltage detection can be performed. When the voltage of the capacitor 39 becomes higher than the reference voltage indicating the overvoltage level of the reference voltage source 40 due to the overvoltage state, the output of the comparator 41 changes from a low level (first state) to a high level (second state). The transition from the low level to the high level triggers the flip-flop 43 to be set. When the flip-flop 43 is set, the voltage V2 at the output terminal Q changes from a low level to a high level at t1 which is later than t0. The high level of the voltage V2 is set higher than the reference voltage V3 and higher than the peak value of the triangular wave voltage Vt, or the triangular wave voltage Vt near the peak.
Are set to intersect. At the time of overvoltage, only the diode 44 is turned on because the second voltage V2 is higher than V1 and V3, and the high-level second voltage V2 becomes the input of the comparator 36, and the output of the comparator 36 continuously becomes high. . As a result, the output of the NOT circuit 38 continuously goes low, and the transistor 8 is continuously turned off. When the transistor 8 is continuously turned off, the output voltage decreases and the second light emitting diode 27
Also decreases, the resistance of the second phototransistor 29 increases, and the voltage of the capacitor 39 decreases. However, the output indicating the overvoltage state is held in the flip-flop 43 until the reset signal is input. I have. The high level of the second voltage V2 is changed to the triangular wave voltage Vt shown in FIG.
Is set to intersect the vicinity of the peak, a narrow PWM pulse is obtained, and the output voltage V0 is suppressed.

[0015]

By the way, in the switching power supply device shown in FIG. 1, the DC voltage becomes low after the abnormality of the constant voltage control system such that the first light emitting diode 20 is opened at t0 in FIG. A capacitor 39, a comparator 41, and a flip-flop 4 until the on / off operation of the transistor 8 of the DC converter 2 is stopped;
There was a response delay due to 3 or the like, during which the output voltage V0 could abnormally rise. FIG. 3 illustrates this. For example, when the first light emitting diode 20 is opened at time t0 in FIG. 3, the light output level of the first light emitting diode 20 becomes zero, so that the resistance value of the first phototransistor 28 increases, The value of the voltage V1 becomes smaller, the operation of increasing the width of the PWM pulse starts, and the output voltage V0 starts increasing gradually from t0.
The change of the output voltage V0 is determined by the spare second control signal forming circuit 2.
3, the voltage of the capacitor 39 changes in proportion to the output voltage V0, the voltage of the capacitor 39 is compared with the voltage of the reference voltage source 40 by the comparator 41, and the voltage of the capacitor 39 is When the voltage crosses, the output state of the comparator 41 changes, an overvoltage is detected, and the on / off operation of the transistor 8 of the DC-DC converter 2 is stopped through the path of the flip-flop 43, the diode 44, the comparator 36, and the NOT circuit 38. Is achieved at time t2 in FIG. That is, when an overvoltage is detected, the on / off operation of the transistor 8 is stopped with a delay of t0 to t1 in FIG. 2 and a delay of t0 to t2 in FIG. Transistor 8
Since the output voltage V0 rises until the on / off operation is stopped, not only does the generation period of the output voltage higher than the overvoltage level Va become relatively long as shown in FIG. The value became a high level, and the load 6 could be broken.

SUMMARY OF THE INVENTION An object of the present invention is to provide a PWM switching power supply capable of suppressing an increase in output voltage during a delay period of an overvoltage prevention operation.

[0017]

In order to achieve the above object, according to the present invention, a switching element is turned on by a PWM pulse.
A voltage adjustment circuit formed so as to obtain a controlled output voltage by performing off-control, and detecting the output voltage in order to control the output voltage of the voltage adjustment circuit to a constant value, thereby forming a first detection voltage. Output voltage detecting means for obtaining a first control signal corresponding to a difference between the first detected voltage detected by the output voltage detecting means and a first reference voltage. A circuit for obtaining a second detection voltage used to detect whether or not the output voltage has reached a predetermined overvoltage level higher than the predetermined value; and a second detection voltage and a second detection voltage. A second control signal forming circuit for forming a second control signal corresponding to a difference between the reference voltage and a reference voltage, a triangular wave voltage generating circuit for generating a triangular wave voltage having the same cycle as the on / off cycle of the switching element, A control power supply; A first control element, one end of which is connected to one terminal of the control power supply, the other end of which is connected to the other end of the first control element. A first resistor connected between the other end of the control power supply and a resistance value changing in response to the second control signal, one end of which is connected to one terminal of the control power supply; A connected second control element, a second resistor connected between the other end of the second control element and the other terminal of the control power supply, and a second resistor connected in parallel to the second resistor. A noise removing capacitor, a third reference voltage source for providing a third reference voltage for detecting an overvoltage state of the output voltage, and comparing the voltage of the capacitor with the third reference voltage. , The voltage of the capacitor is the third
Latching the output of the comparator indicating that the voltage of the capacitor has reached the third reference voltage, and latching the output of the comparator indicating that the voltage of the capacitor has reached the third reference voltage. A latch circuit that outputs an overvoltage protection signal having a voltage level for making the voltage zero or near zero, a PWM control potential obtained at a connection point between the first control element and the first resistor, and the triangular wave voltage And forming the PWM pulse for controlling the switching element by comparing the overvoltage protection signal obtained from the latch circuit with the triangular wave voltage, indicating that the overvoltage protection signal indicates an overvoltage. Said P
In a switching power supply device having a switch control signal forming circuit for generating an output for setting the width of a WM pulse to zero or near zero, a diode for overvoltage suppression is provided, and one terminal of the diode is connected to one terminal of the diode. Connected between the second control element and the second resistor, and the other terminal of this diode is connected between the first control element and the first resistor. The present invention relates to a characteristic switching power supply device. Preferably, the outputs of the first and second control signal forming circuits are optical signals, respectively, and the first and second control elements are phototransistors, respectively. In addition, the switch control signal forming circuit includes a selection circuit such as an OR gate circuit using a diode for taking out a higher one of the PWM control potential and the voltage level of the overvoltage protection signal. It is desirable that the comparator be configured with a comparator that compares the output of the selection circuit with the triangular wave voltage.

[0018]

In the invention of each claim, when an overvoltage occurs, the overvoltage control diode conducts, and a voltage capable of reducing the width of the PWM pulse is input to the switch control signal forming circuit as a PWM control system signal. The overvoltage protection control system includes a capacitor for noise removal, a comparator,
And a latch circuit, the response delay of the overvoltage protection occurs. However, since the PWM control system has a faster response than the overvoltage protection control system, a large increase in the width of the PWM pulse is suppressed in the switch control signal forming circuit. The operation occurs quickly, and a large increase in the output voltage during the response delay period can be prevented. When the overvoltage protection signal is output after the response delay, an operation of stopping the ON / OFF of the switching element or extremely narrowing the width of the PWM pulse occurs, and the overvoltage protection is completely achieved. As described above, according to the invention of each claim, overvoltage during a response delay period can be reliably suppressed by a simple circuit. According to the second aspect of the present invention, since the portion for detecting the output voltage and forming the first and second control signals and the portion for forming the PWM pulse are optically coupled, the two are electrically separated. Can be. According to the third aspect of the present invention, one comparator is connected to the PW
M pulse formation and overvoltage protection can be shared, simplifying the circuit configuration.

[0019]

Next, a PWM type switching power supply according to an embodiment of the present invention will be described with reference to FIGS. However, in FIG. 4, substantially the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. The switching power supply shown in FIG. 4 has the same configuration as that of FIG. 1 except that an overvoltage suppressing diode 47 is added to the conventional switching power supply of FIG. One end, that is, the anode, of the overvoltage suppressing diode 47 is connected between the second phototransistor 29 and the second resistor 32, and the other end (cathode) of the diode 47 is connected to the first phototransistor 28. And the connection point 33 of the first resistor 31. The overvoltage suppression diode 47 is connected to the connection point 42, that is, the capacitor 3
It has a direction of conduction when the potential of 9 is higher than the potential of the connection point 33.

[0020]

[Operation] When the switching power supply of FIG. 4 is operating normally at a constant voltage, that is, before the time t0 of FIGS. 5 and 6, the output voltage V0 is in a non-overvoltage state.
The potential of the anode of the overvoltage suppressing diode 47 is lower than the potential of the connection point 33. Therefore, the overvoltage suppression diode 47 is in a non-conductive state, and the switching power supply of FIG. 4 operates in the same manner as the switching power supply of FIG.
FIG. 5 based on a comparison between the voltage V1 of FIG.
A (B) PWM pulse is formed, and in response to this, the transistor 8 is turned on and off.

At time t0 in FIG. 5 and FIG. 6, when a failure such as an open of the first light emitting diode 20 occurs and the optical input of the first phototransistor 28 cannot be obtained, The resistance value increases and the connection point 3
The potential of No. 3 decreases. As a result, the potential of the connection point 33 becomes lower than the potential of the connection point 42, the overvoltage suppressing diode 47 conducts, for example, at time t1 in FIG. 5, and the potential of the connection point 33, that is, the first voltage V1 It rises in synchronization with the rise in voltage. As a result, the width of the PWM pulse gradually narrows as shown in the section from t1 to t2 in FIG. 5, the rise of the output voltage V0 is limited as shown in FIG. 6, and the output voltage V0 is lower than the predetermined overvoltage level Va. The high period T is shorter than in FIG. In addition, the maximum value of the overvoltage is smaller than that in FIG. 3, and the load 6 can be reliably prevented from being overvoltage. In FIG. 5, the voltage V2 for overvoltage protection changes from a low level to a high level at time t2, and the on / off operation of the transistor 8 stops.

[0022]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) Instead of inputting the output of the OR gate circuit 34 to the comparator 36 in FIG.
Four comparators 36a, 36b, 36c are provided, each negative input terminal is connected to the triangular wave generation circuit 37, the positive input terminal of the first comparator 36a is connected to the connection point 33 in FIG. 4, and the positive input of the second comparator 36b is connected. The input terminal is connected to the flip-flop 43, the third comparator 36c is connected to the reference voltage source 45, and the three comparators 36a,
The output terminals of 6b and 36c can be connected to the NOT circuit 38 of FIG. 4 via the OR gate circuit 34a. (2) The first and second control signal forming circuits 16 of FIG.
23 is an error amplifier 50 and a reference voltage source 5 as shown in FIG.
1, a transistor 52 and a light emitting diode 53. The positive input terminal of the error amplifier 50 of FIG. 8 is a voltage dividing point of the resistors 14 and 15 or the resistors 21 and 22 of FIG.
The light-emitting diode 53 is optically coupled to the first phototransistor 28 or the second phototransistor 29. (3) The DC-DC converter circuit 2 can be replaced with a converter or an inverter circuit including a plurality of switching elements. (4) As a second output voltage detecting means for applying a detection voltage to the second control signal forming circuit 23, the resistance 2
Instead of providing 1 and 22, resistors 14 and 15 can be used as well, and this arbitrary voltage dividing point can be connected to the base of the transistor 24 or the amplifier 50 of FIG. (5) A third resistor is connected between the emitter of the second phototransistor 29 and the connection point 42, and the anode of the overvoltage suppressing diode 47 is connected to the phototransistor 29 and the third transistor.
Can be connected between the resistors.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a conventional switching power supply device.

FIG. 2 is a waveform diagram showing voltages of respective parts in FIG.

FIG. 3 is a diagram showing a change in output voltage when the circuit of FIG. 1 is abnormal.

FIG. 4 is a circuit diagram showing a switching power supply device according to an embodiment of the present invention.

FIG. 5 is a waveform chart showing voltages of respective parts in FIG.

6 is a diagram showing a change in output voltage when the circuit of FIG. 4 is abnormal.

FIG. 7 is a diagram illustrating a control signal forming circuit according to a modified example.

FIG. 8 is a diagram illustrating a switch control signal forming circuit according to a modification.

[Explanation of symbols]

 2 DC-DC converter circuit 16, 23 First and second control signal forming circuits 28, 29 First and second phototransistors 39 Noise removal capacitor 47 Overvoltage suppression diode

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasuya Murakawa 3-6-3 Kitano, Niiza-shi, Saitama Sanken Electric Co., Ltd. (72) Inventor Nobuhiko Yamashita 3-9-1, Nishishinjuku, Shinjuku-ku, Tokyo No. Within Nippon Telegraph and Telephone Corporation (72) Inventor Toshiaki Taniuchi 3-19-2 Nishi-Shinjuku, Shinjuku-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Naoki Murakami 3--19, Nishishinjuku, Shinjuku-ku, Tokyo No. 2 Nippon Telegraph and Telephone Corporation (72) Inventor Mamoru Sekiguchi 2-2-1 Otemachi, Chiyoda-ku, Tokyo Shindengen Kogyo Co., Ltd. (72) Inventor Koji Arai 1-chome Takada, Toshima-ku, Tokyo No. 18 No. 1 Origin Electric Co., Ltd. (56) References JP-A-5-199743 (JP, A) JP-A-7-312861 (JP, A) JP-A-6-284714 (JP, A) (58) )investigated Field (Int.Cl. ^7, DB name) H02M 3/28

Claims (3)

(57) [Claims] 1. A voltage adjusting circuit formed so as to obtain a controlled output voltage by controlling on / off of a switching element by a PWM pulse, and for controlling an output voltage of the voltage adjusting circuit to a constant value. Output voltage detection means for detecting the output voltage to obtain a first detection voltage; and a second voltage corresponding to a difference between the first detection voltage detected by the output voltage detection means and a first reference voltage. A first control signal forming circuit for forming a first control signal, and a second detection voltage used for detecting whether the output voltage has reached a predetermined overvoltage level higher than the fixed value. Means, a second control signal forming circuit for forming a second control signal corresponding to a difference between the second detection voltage and a second reference voltage, the same as the ON / OFF cycle of the switching element Periodic triangular wave voltage A generated triangular-wave voltage generating circuit, a control power supply, and a resistance variable in response to the first control signal, one end of which is connected to one terminal of the control power supply. A control element, a first resistor connected between the other end of the first control element and the other end of the control power supply, and a resistance value that changes in response to the second control signal A second control element having one end connected to one terminal of the control power supply, and one end connected between the other end of the second control element and the other terminal of the control power supply. A second resistor, a noise removing capacitor connected in parallel to the second resistor, and a third reference voltage source for providing a third reference voltage for detecting an overvoltage state of the output voltage. Comparing the voltage of the capacitor with the third reference voltage, A comparator for generating an output indicating whether or not the voltage of the capacitor has reached the third reference voltage; and latching an output of the comparator indicating that the voltage of the capacitor has reached the third reference voltage, The PW
A latch circuit for outputting an overvoltage protection signal having a voltage level for setting the pulse width of the M pulse to zero or near zero, and PWM control obtained at a connection point between the first control element and the first resistor The PWM pulse for controlling the switching element is formed by comparing the potential for use with the triangular wave voltage, and the overvoltage protection signal obtained from the latch circuit is compared with the triangular wave voltage to generate the overvoltage protection. A switching control signal generating circuit for generating an output for setting the width of the PWM pulse to zero or near zero when the signal indicates an overvoltage, wherein an overvoltage suppressing diode is provided; One terminal of the diode is connected between the second control element and the second resistor, and the other terminal of the diode is connected to the first terminal.
The switching power supply device is connected between the control element and the first resistor. 2. Each of the first and second control signals output from the first and second control signal forming circuits is an optical signal, and each of the first and second control elements is a photo signal. 2. The switching power supply according to claim 1, wherein the switching power supply is a transistor. 3. A switch control signal forming circuit, comprising: a selection circuit for extracting a higher one of a level of the PWM control potential and a voltage level of the overvoltage protection signal; and an output of the selection circuit. 3. The switching power supply according to claim 1, further comprising a comparator for comparing the voltage with the triangular wave voltage.