JP3147808B2 - Error detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for detecting an abnormal bias current value, and more particularly to a circuit for detecting an abnormal bias current value of a transistor of an amplifier using a transistor.

[0002]

2. Description of the Related Art Conventionally, this type of current value abnormality detection circuit mainly cuts off the power supply when a biased element such as a transistor is in an overcurrent state, prevents burning of the element and peripheral parts, and It is provided for the purpose of protecting. As a current value abnormality detection circuit for such a purpose, for example, F
56-9 as the ET bias voltage abnormality detection circuit
No. 6724 (first prior art), Japanese Patent Application Laid-Open No. 62-276907 (second conventional technology) as an amplifier overcurrent detection circuit, and Japanese Unexamined Patent Application Publication No.
No. 184405 (third prior art). Further, a circuit for detecting a decrease in current and outputting a warning is provided.
No. 14316 (fourth prior art).

[0003]

Among the above various prior arts, the first to third prior arts mainly relate to the detection of an overcurrent state, and there is no particular description about the detection when the current decreases. .

On the other hand, the fourth prior art relates to a circuit for detecting an abnormal increase or decrease in current, but this circuit simply monitors a current value and detects an increase or decrease in current to reduce the device. It merely proposes a mechanism for determining abnormalities.

Here, a fourth prior art will be described with reference to the drawings.

FIG. 5 is a block diagram for explaining an abnormal bias current drop detecting means according to a fourth prior art.

In FIG. 1, a bias supply 1 is supplied to a bias supply 1 from a bias supply power supply terminal 10, and a bias current detecting means 2 is provided therebetween.

[0008] The bias current obtained by the bias current detecting means 2 is output to the bias current drop alarm output means 3.
When the bias current falls below a predetermined value, the alarm current is output to the alarm output terminal 11.

Here, the power supply for the bias current drop warning output means 3 is supplied from a power supply different from the bias supply 1 and the bias current detection means 2 from the separate power supply terminal 10b for the warning circuit.

In practice, a circuit is usually provided to prevent burnout, for example, by turning off the power supply at the time of alarm output. However, simply outputting an alarm as shown in FIG. Therefore, there is an inconvenience of erroneously recognizing an abnormal state. In order to avoid this, it is necessary to add a malfunction prevention means such as a special sequence circuit. That is, according to this conventional technique, only a decrease in the current is detected, and a means for determining whether the decrease in the current is due to a failure of the device to be biased or the like or because the power is not applied is provided. There is no description, and the problem with the malfunction is not addressed.

[0011]

As described above, the abnormality detection circuit of the present invention uses a common power supply as a bias supply power supply and does not add a malfunction prevention means such as a special sequence circuit. The purpose is to prevent erroneous recognition at the time of turning on the power by simple means.

According to a first aspect of the present invention, there is provided an abnormality detection circuit for detecting an abnormality in a bias current value, wherein the abnormality detection circuit supplies a bias current to a bias supply. The power supply is configured to be operated by a power supply , and the abnormality detection circuit includes a bias current value.
Alarm from the bias power supply
Output bias power supply voltage to output terminal through load
It is characterized by having comprised so that it might be.

Further, the abnormality detecting circuit according to the present invention is characterized in that:
According to the above, between the alarm output terminal and the earth (GND)
An intermittent switching means for detecting an abnormality in the bias current value;
When no detection is made, the switching means is closed and normal (non-alarm)
As a signal, the switching means from the ground to the alarm output terminal
2. The abnormality detection circuit according to claim 1, wherein the circuit is configured to output a ground voltage through the ground .

According to the third aspect, the abnormality detecting circuit detects that the bias current value has fallen below a prescribed value.
Output current drop detection means and bias current value are specified values
The abnormality detection circuit according to claim 1 or 2, further comprising current increase detection means for detecting an increase .

Further, according to the present invention, the abnormality detection circuit outputs an alarm signal when a bias current value is detected to be lower than a specified value.
And that the bias current value has increased from the specified value.
4. An abnormality detection circuit according to claim 3, further comprising a current increase alarm output terminal that outputs an alarm signal when the alarm signal is output .

According to a fifth aspect, the abnormality detection circuit includes:
In high frequency power amplifier using FET transistor
To detect an abnormality in the bias current value of the FET transistor.
An abnormality detection circuit according to one of claims 1 to 4, characterized in that output.

[0017]

[0018]

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of the abnormality detection circuit of the present invention.

In FIG. 1, a bias supply power supply terminal 10
, A bias current supplied to the bias supply 1 is detected by the bias current detecting means 2.

The bias power supply is branched at point A,
It is also supplied to the alarm output means 3 upon detection of a decrease in bias current. The alarm output means 3 upon detection of a decrease in bias current includes a load means 5 and a switching means 4.

The switching means 4 closes the switching means 6 based on the bias current from the bias current detection means 2 and connects the potential at the point D to the ground (GND) in a normal state, thereby setting the potential to the LOW level. On the other hand, when abnormal, the switch means 6 is opened to set the point D to a HIGH level.

The load means 5 is disposed between the bias power supply terminal 10 and the switching means 4 and has a function of limiting a load current of the alarm circuit and improving operation characteristics.

Next, various circuits can be considered for the configuration of the bias current detecting means 2. For example, a configuration using an operational amplifier (OP1) 24 and a current detecting resistor (RL) 22 as shown in FIG. Can be used.

That is, in FIG. 2, the voltage across the current detecting resistor 22 is applied to the operational amplifier 24 and the resistors (R1, R2).
2) It can be detected by the differential amplifier composed of 22.

The bias current drop warning output means 3
Is applicable to a block diagram as shown in FIG.

That is, in FIG. 3, the switching means 4
Transistor (TR1) 41 and bias resistors (R4, R
5) 42. The transistor 41 is turned on when the output voltage of the bias current detecting means 2 exceeds a predetermined value, and the collector voltage becomes low.

On the other hand, when the output voltage of the bias current detecting means 2 becomes lower than a predetermined value, the transistor 41 is opened.

The load means 5 comprises, for example, a resistor (R3) 52 and a Zener diode (D1) 53 connected to the collector of the transistor 41. Embodiments Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 4 shows a field effect transistor (hereinafter referred to as an FET).
FIG. 7 is a circuit diagram showing a specific embodiment in which the abnormality detection circuit of the present invention is applied to a drain bias supply circuit of a high-frequency power amplifier using the above-mentioned method. This circuit has a function to output an alarm in both cases of overcurrent and current drop.

In general, when the FET is destroyed, a normal short mode or open mode is set. In the short mode, the power supply may be overloaded or the resistors and other peripheral parts may be burned. On the other hand, in the open mode, the single-ended configuration does not cause burnout or the like as in the short-circuit mode. There is a possibility that the balance may be lost and other FETs may be damaged or the terminator may be damaged. Therefore, even when the FET is destroyed in the open mode, it is necessary to protect it by detecting an abnormality and turning off the power.

In the embodiment shown in FIG. 4, the drain current of the FET 1 is set to 10 Atyp, which is about twice as large as 2 A.
An overcurrent alarm is output at an overcurrent of 0 A or more, and an alarm is output as a current lowering state when the current is reduced to about half of 5 A or less.

The current detecting means 2 detects the voltage drop of the low resistance RL for detection and amplifies it by the operational amplifier 24, and then outputs an alarm signal to the terminal 11 'as an overcurrent alarm.
Terminal 1 at the time of low current through the alarm output means 3 at the time of current drop
1 outputs an alarm signal.

The alarm output means 3 at the time of current drop is set so as to turn on / off TR1 by the output voltage of the current detection means 2. In the case of this embodiment, the voltage at the point C is usually about 1.5 V, but the connection point between R4 and R5 is TR1.
Becomes lower than the base-emitter voltage VBE (up to 0.7 V) or less, TR1 is turned off, and the HIGH level of the power supply voltage is output to the terminal 11 via the Zener diode D1, R3, OR diode D3 and resistor R7. Is recognized as abnormal.

Since TR1 is in the ON state in the normal state, the point D
Is at the GND level, so that the terminal 11 is at the LOW level (OPEN).

Accordingly, when the power is turned on, the low current alarm does not malfunction since the low level changes from the LOW level, and the low current alarm does not malfunction even though the power supply voltage is normally applied. It becomes possible to detect.

Although the Zener diode D1 is not always necessary in the drawing, it operates so as not to malfunction as an abnormal state until the power supply voltage rises by more than the Zener voltage, and the circuit operation becomes more accurate.

Since R3 is 1 kΩ, TR1 is normal in normal operation.
Is in the ON state, the collector current of TR1 is about 10 m
A.

When the low current is abnormal, the Zener voltage is set to 6 V, the drop of the diode D3 is set to 0.7V, and a voltage determined by the voltage dividing ratio with the load resistor R10 is output to the terminal 11.

Since the terminals 11 and 11 'are configured so as to enable a diode OR, they can be connected together and output as one alarm.

The current detection means 2 and the alarm output means 3 at the time of a current drop shown in FIG. 4 are merely examples for realizing the function of the present invention, and are realized by other means having the same function. Needless to say, it is good. For example, the operational amplifier can achieve the same function by a transistor, and the TR1 can be an FET or a relay.

[0042]

The first effect is that, according to the abnormality detection circuit of the present invention, it is possible to use a simple power supply using a common power supply as a bias supply power supply and without adding a malfunction prevention means such as a special sequence circuit. By this means, it is possible to prevent erroneous recognition of a low-current abnormality at power-on and prevent erroneous operation.

The reason is that a power supply common to the bias supply power supply is used, and a HIGH level having the same polarity as the bias supply power supply is set as an alarm signal in an abnormal state. As a result, it is possible to prevent a problem that the apparatus (power supply) does not start up when the power is turned on, and to realize the apparatus without adding a malfunction prevention means such as a special sequence circuit.

The second effect is that it can be realized with a simple configuration that only when the power supply voltage is normally applied and the current value is lower than the specified value is recognized as abnormal.

The reason is that a logic circuit is constructed by intentionally using a bias power supply voltage as an output signal of the alarm output means.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a bias current detecting means 2 of FIG.

FIG. 3 is a diagram showing a configuration of a bias current drop warning output unit 3 of FIG. 1;

FIG. 4 is a diagram showing an embodiment of the abnormality detection circuit of the present invention.

FIG. 5 is a diagram illustrating a configuration of a conventional abnormality detection circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Bias supply thing 2 Bias current detection means 3 Alarm output means at the time of a bias current fall 4 Switching means 5 Load means 6 Switching means 10 Bias supply power supply terminal 10b Power supply terminal for another alarm circuit 11 Alarm output terminal 21 Transistor 22,42,42 52, 62, 63 Resistance 53 Zener diode 24 FET 25, 61 Diode 24 Operational amplifier

Claims (5)

(57) [Claims] 1. An abnormality detection circuit for detecting an abnormality in a bias current value , wherein the abnormality detection circuit is configured to operate by a bias supply power supply that supplies a bias current to a bias supply , and the abnormality detection circuit includes: Indicates that the bias current value is abnormal.
When detected, an alarm signal is output from the bias power
Output bias power supply voltage to the
An abnormality detection circuit characterized by comprising. 2. The abnormality detection circuit includes switching means for switching between the alarm output terminal and ground (GND), and closes the switching means when no abnormality is detected in the bias current value. and, normally as (non-alarm) signal, the abnormality detection circuit according to claim 1, characterized by being configured to output a earthed voltage through said switching means to said alarm output terminal from the earthed. 3. The abnormality detection circuit according to claim 1, wherein the abnormality detection circuit includes a current drop detection unit that detects that the bias current value has dropped below a predetermined value, and a current increase detection unit that detects that the bias current value has exceeded a predetermined value. Claim 1.
Alternatively, the abnormality detection circuit according to claim 2 . 4. The abnormality detection circuit detects a current decrease alarm output terminal for outputting an alarm signal when detecting that the bias current value has dropped below a prescribed value, and detects that the bias current value has risen above the prescribed value. 4. The abnormality detection circuit according to claim 3, further comprising a current increase alarm output terminal for outputting an alarm signal when the operation is performed. Wherein said abnormality detection circuit in the high frequency power amplifier using the FET transistor, the abnormality according to one of claims 1 to 4, characterized in that detecting an abnormality in the bias current of the FET transistor Detection circuit.