JP3146821B2 - Manufacturing method of semiconductor optical integrated device - Google Patents

Manufacturing method of semiconductor optical integrated device

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Publication number
JP3146821B2
JP3146821B2 JP34700293A JP34700293A JP3146821B2 JP 3146821 B2 JP3146821 B2 JP 3146821B2 JP 34700293 A JP34700293 A JP 34700293A JP 34700293 A JP34700293 A JP 34700293A JP 3146821 B2 JP3146821 B2 JP 3146821B2
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Japan
Prior art keywords
layer
semiconductor
light guide
integrated device
region
Prior art date
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Expired - Fee Related
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JP34700293A
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Japanese (ja)
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JPH07193210A (en
Inventor
信司 高野
秀世 蓮見
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NEC Corp
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NEC Corp
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体光集積素子および
その製造方法に関する。
The present invention relates to a semiconductor optical integrated device and
It relates to the manufacturing method .

【0002】[0002]

【従来の技術】光技術を用いた超高速大容量伝送および
情報処理が急速に進展している。中でもMOVPE(有
機金属気相成長)法など成長技術の進展により高性能な
多重量子井戸構造半導体レーザ(MQW−LD)が実現
され、超高速変調素子やコヒーレント伝送用素子あるい
はアナログ変調素子など様々なシステム応用についての
研究開発が活発化している。例えば、超高速光半導体素
子としては、分布帰還型半導体レーザ(Distributed Fe
edback Laser Diode : DFB LD)や分布反射半導体
レーザ(Distributed Bragg Reflector Diode : DBR
LD)などがある。しかし、半導体レーザを直接変調
した場合には、注入キャリアの変動に起因するレーザ媒
質の屈折率変動により、スペクトル幅の増大、いわゆる
動的波長チャーピングが生じる。この波長チャーピング
は、高速変調時の伝送距離を制限する要因となるため、
直接変調に依らない外部変調器が提案されている。
2. Description of the Related Art Ultra-high-speed large-capacity transmission and information processing using optical technology are rapidly advancing. Among them, a high performance multiple quantum well structure semiconductor laser (MQW-LD) has been realized by the development of growth technology such as MOVPE (metal organic chemical vapor deposition), and various devices such as an ultra-high-speed modulation device, a coherent transmission device, and an analog modulation device have been realized. R & D on system applications is active. For example, a distributed feedback semiconductor laser (Distributed Fe
edback Laser Diode: DFB LD and Distributed Bragg Reflector Diode: DBR
LD). However, when the semiconductor laser is directly modulated, the spectral width increases, that is, so-called dynamic wavelength chirping occurs due to the refractive index fluctuation of the laser medium caused by the fluctuation of the injected carrier. This wavelength chirping is a factor that limits the transmission distance during high-speed modulation.
External modulators that do not rely on direct modulation have been proposed.

【0003】半導体を用いた変調器では、吸収層にバル
ク半導体を用い、フランツーケルデッシュ(Franz-Keld
ysch)効果による吸収端の変化を利用したバルク構造変
調器、またバルク構造よりも大きな吸収端の変化が生じ
る量子閉じ込めシュタルク効果(QCSE:Quantum Co
nfined Stark Effect)を利用した量子井戸構造変調器
がある。他にも、マッハツェンダー(Mach-Zehnder)干
渉計の原理である光の位相変調を応用したマッハツェン
ダー型変調器がある。
[0003] In a modulator using a semiconductor, a bulk semiconductor is used for an absorption layer, and a Franz-Keld
modulator using the change of the absorption edge due to the ysch) effect, and the quantum confined Stark effect (QCSE: Quantum Co
There is a quantum well structure modulator using an nfined stark effect). In addition, there is a Mach-Zehnder modulator that applies phase modulation of light, which is the principle of a Mach-Zehnder interferometer.

【0004】また結晶成長技術として、近年、有機金属
気相エピタキシー(MOVPE)法、分子線エピタキシ
ー(MBE)法等の薄膜結晶成長技術の急速な進展に伴
い、単原子層の厚さの精度で急峻な組成変化を持った良
質な半導体ヘテロ接合界面が製作されるようになった。
これらヘテロ接合によって形成されるポテンシャル井戸
構造、超格子構造では電子の波動性に起因する特異な光
学特性、電気特性を有しており、デバイス応用への研究
開発が活発化している。特に近年、基板面内で半導体層
の組成や層厚を制御する方法が提案され注目されてい
る。O.カイザーは1991年のジャーナル・オブ・クリス
タル・グロース誌第107巻、989-998頁(O. Kayser : Jo
urnal of Crystal Growth 107(1991)989-998)で、また
E.コラス等は同誌第107巻、226-230頁(E. Colas et
al.: Journal of Crystal Growth 107(1991)226-230)
でSiO2をマスクとして用いた選択成長について詳細
に報告している。また、T.カトー等は1991年の国際会
議ECOC’91(European Conference on Optical C
ommunication)のWeB7−1で、上記の選択成長のメ
カニズムを応用した光変調器集積型MQW−DFB−L
D、さらにS.タカノ等は1992年の国際会議ECOC’
92のTuB5−3で同様に選択成長を利用した波長可
変MQW−DBR−LDに関して報告している。上記の
ような集積型素子では、光ファイバーとの結合損失が無
いため高出力が得られる、複雑な光学系を用いないので
取扱いが容易で安定性が高い、などの長所を有してい
る。
In recent years, with the rapid progress of thin film crystal growth techniques such as metalorganic vapor phase epitaxy (MOVPE) and molecular beam epitaxy (MBE) as crystal growth techniques, the accuracy of the thickness of a monoatomic layer has been increased. A high-quality semiconductor heterojunction interface having a steep composition change has been manufactured.
The potential well structure and the superlattice structure formed by these heterojunctions have unique optical characteristics and electric characteristics due to the wave nature of electrons, and research and development for device application is active. In particular, in recent years, a method for controlling the composition and thickness of a semiconductor layer within a substrate surface has been proposed and attracted attention. O. Kaiser, 1991, Journal of Crystal Growth, Vol. 107, pp. 989-998 (O. Kayser: Jo
urnal of Crystal Growth 107 (1991) 989-998). Colas et al., Vol. 107, pp. 226-230 (E. Colas et.
al .: Journal of Crystal Growth 107 (1991) 226-230)
Report on selective growth using SiO 2 as a mask. Also, T.I. Kato et al., 1991, European Conference on Optical C
Optical modulator integrated MQW-DFB-L using the selective growth mechanism described above in WebB 7-1
D; Takano and others at the 1992 International Conference ECOC '
92 TuB5-3 similarly reports on a wavelength tunable MQW-DBR-LD utilizing selective growth. The integrated device as described above has advantages in that high output can be obtained because there is no coupling loss with the optical fiber, and handling is easy and stability is high because a complicated optical system is not used.

【0005】図6は、上記の選択成長のメカニズムを応
用した光変調器集積型MQW−DFB−LD素子の選択
成長マスク(SiO2)の形状(図6(a))、選択成
長層の光導波路方向の素子断面図(図6(b))および
バンドギャップ(図6(c))を示したものである。図
中、9はSiO2マスク、10は半導体基板、12は回
折格子、15,16は光導波路層、21は選択成長部
で、そのうち21aは変調器領域側、21b側はLD領
域側、51は量子井戸層で、そのうち51aは変調器
部、51bはLD部である。また、60はp−InPク
ラッド層、65はp−InP層、70はp+−InGa
AsP層、91a,91bは電極である。
FIG. 6 shows the shape of a selective growth mask (SiO 2 ) (FIG. 6A) of an optical modulator integrated type MQW-DFB-LD device to which the above-described selective growth mechanism is applied, and FIG. FIG. 6 shows a cross-sectional view of the element in the wave path direction (FIG. 6B) and a band gap (FIG. 6C). In the figure, 9 is an SiO 2 mask, 10 is a semiconductor substrate, 12 is a diffraction grating, 15 and 16 are optical waveguide layers, 21 is a selective growth portion, 21a is a modulator region side, 21b side is an LD region side, 51 Is a quantum well layer, of which 51a is a modulator section and 51b is an LD section. 60 is a p-InP cladding layer, 65 is a p-InP layer, 70 is p + -InGa
AsP layers, 91a and 91b are electrodes.

【0006】[0006]

【発明が解決しようとする課題】しかし前述のような集
積型の素子では、変調器部やDBR部をパルス変調ある
いは周波数(FM)変調した場合に、レーザ部との間で
キャリアの移動・拡散によるクロストークが生じていた
ために副モード抑圧比の低下や雑音の増大などレーザ動
作の不安定を招くという欠点を有していた。本発明の目
的は、このような従来の問題点を解決した半導体光集積
素子を提供することにある。
However, in the above-mentioned integrated device, when the modulator and the DBR are pulse-modulated or frequency-modulated (FM), the movement and diffusion of carriers between the laser and the laser are performed. However, there is a disadvantage that the laser operation becomes unstable such as a decrease in the sub-mode suppression ratio and an increase in noise due to the occurrence of crosstalk due to the above. An object of the present invention is to provide a semiconductor optical integrated device which solves such a conventional problem.

【0007】[0007]

【課題を解決するための手段】前述の課題を解決するた
めに本発明が提供する手段は、半導体基板上の隣合う素
子領域間の領域に結晶成長を阻止するために形成され、
前記隣合う素子領域において、それぞれ幅の異なるマス
クを形成する工程と、前記マスクから露出した前記半導
体基板の前記隣合う素子領域のそれぞれの領域に同時
に、光ガイド層を含む複数の半導体層を順次結晶成長し
て積層する工程と、前記隣合う素子領域間の領域に前記
光ガイド層よりもバンドギャップの大きな半導体層を埋
め込み成長する工程とを有し、前記バンドギャップの大
きな半導体層により前記隣合う素子がそれぞれ含む光ガ
イド層が前記隣合う素子領域間の領域で途切れており、
前記隣合う素子領域ごとに前記半導体層の層厚が異なっ
ていることを特徴とする半導体光集積素子の製造方法で
ある。ここで、前記光ガイド層は、量子井戸構造からな
るものが好適である。
In order to solve the above-mentioned problems, a means provided by the present invention is formed to prevent crystal growth in a region between adjacent device regions on a semiconductor substrate,
In the adjacent element regions , cells having different widths are used.
Simultaneously forming a plurality of semiconductor layers including a light guide layer by crystal growth on each of the adjacent element regions of the semiconductor substrate exposed from the mask; Embedding and growing a semiconductor layer having a larger band gap than the light guide layer in a region between the matching element regions, wherein the light guide layer included in each of the adjacent elements is adjacent to the light guide layer by the semiconductor layer having a larger band gap. It is interrupted in the area between the matching element areas,
A method of manufacturing a semiconductor optical integrated device, wherein the thickness of the semiconductor layer is different for each of the adjacent element regions. Here, the light guide layer preferably has a quantum well structure.

【0008】[0008]

【実施例】次に本発明の実施例について、図面を参照し
て説明する。 実施例1 本発明による第一の実施例として光変調器集積型MQW
−DFB−LD素子を例に図を参照して詳細に説明す
る。図1(a)、(b)、(c)にそれぞれ本発明によ
る素子の選択成長マスク(SiO2)の形状、選択成長
層の光導波路方向の素子断面およびバンドギャップを示
す。また、図2は本発明による素子の斜視図である。図
1および図2において、8はSiO2マスク、10は半
導体基板、12は回折格子、15,16は光導波路層、
21aは選択成長部(変調器領域)、21bは選択成長
部(LD領域)、50a,50bは量子井戸層、60は
p−InPクラッド層、65はp−InP層、70はp
+−InGaAsP層、91a,91bは電極である。
本発明が従来技術と異なるのは、図1(a)に示すよう
に、両領域間の遷移領域にSiO2マスクを残し、LD
部と変調器部との選択成長部を隔て、後に光ガイド層よ
りもバンドギャップの大きな半導体層での埋め込み成長
(図1(b),(c))をすることによって、キャリア
の移動・拡散を抑制し、クロストークを低減する点にあ
る。また、この部分の長さは4μmと短いため、LD光
出力の変調器部への結合効率は90%以上と極めて良好
である。
Next, an embodiment of the present invention will be described with reference to the drawings. Embodiment 1 As a first embodiment according to the present invention, an optical modulator integrated type MQW
This will be described in detail with reference to the drawings, taking a DFB-LD element as an example. 1 (a), 1 (b) and 1 (c) show the shape of the selective growth mask (SiO 2 ), the cross section of the selective growth layer in the optical waveguide direction, and the band gap, respectively, of the device according to the present invention. FIG. 2 is a perspective view of an element according to the present invention. 1 and 2, 8 is a SiO 2 mask, 10 is a semiconductor substrate, 12 is a diffraction grating, 15 and 16 are optical waveguide layers,
21a is a selective growth portion (modulator region), 21b is a selective growth portion (LD region), 50a and 50b are quantum well layers, 60 is a p-InP cladding layer, 65 is a p-InP layer, and 70 is a p-InP layer.
+ -InGaAsP layers, 91a and 91b are electrodes.
The present invention differs from the prior art, as shown in FIG. 1 (a), leaving the SiO 2 mask the transition region between both regions, LD
By selectively burying the semiconductor layer having a band gap larger than that of the optical guide layer (FIGS. 1 (b) and 1 (c)), the carrier is moved and diffused by separating the selective growth portion between the portion and the modulator portion. And the crosstalk is reduced. In addition, since the length of this portion is as short as 4 μm, the coupling efficiency of the LD light output to the modulator portion is extremely good at 90% or more.

【0009】次に、上記の素子の作製方法を図3(a)
〜(c)に順次示す。まず部分的に回折格子12を形成
した半導体基板10上にSiO2マスク8を回折格子上
部の選択成長部(LD領域:長さ420μm)21bで
12μm幅、他の部分(変調器領域:長さ150μm)
21aで4μm幅に形成した。開口部の幅は1.5μm
である。マスク形成後、光導波路層15(1.2μm組
成InGaAsP、層厚:0.1μm)、量子井戸層5
0(7層ウエル)、光導波路層16(1.2μm組成I
nGaAsP、層厚:0.1μm)、p−InPクラッ
ド層60(層厚:0.05μm、キャリア濃度:5x1
17cm-3)を順次積層して図3(a)に示す構造とし
た。この場合、前述のようにマスク幅に応じて組成およ
び層厚が素子内で異なっている(上記では全て変調部に
おける層厚を示した。)。すなわち変調器領域ではLD
領域に比べ組成は短波長化し、層厚は薄くなっている。
すなわち、LD領域の量子井戸50bではウエル層は歪
InGaAsP(圧縮歪+0.8%、波長組成1.72
μm:層厚5.5nm)、バリア層はInGaAsP
(無歪1.15μm組成:層厚7nm)であり、1.5
5μmの波長に対応するバンドギャップ・エネルギー
(0.8eV)を有している。一方、変調器領域の量子
井戸50aではウエル層は歪InGaAsP(圧縮歪+
0.5%、波長組成1.66μm:層厚3.8nm)、
バリア層はInGaAsP(1.1μm組成:層厚5n
m)であり、1.48μmの波長に対応するバンドギャ
ップ・エネルギー(0.84eV)を有している。
Next, a method of manufacturing the above-described device is shown in FIG.
To (c). First, an SiO 2 mask 8 is formed on a semiconductor substrate 10 on which a diffraction grating 12 is partially formed by using a selective growth portion (LD region: length 420 μm) 21b on the diffraction grating 21b with a width of 12 μm, and another portion (modulator region: length) 150 μm)
21a was formed with a width of 4 μm. The width of the opening is 1.5 μm
It is. After forming the mask, the optical waveguide layer 15 (1.2 μm composition InGaAsP, layer thickness: 0.1 μm), the quantum well layer 5
0 (7-well), optical waveguide layer 16 (1.2 μm composition I)
nGaAsP, layer thickness: 0.1 μm), p-InP cladding layer 60 (layer thickness: 0.05 μm, carrier concentration: 5 × 1)
0 17 cm -3 ) were sequentially laminated to obtain a structure shown in FIG. In this case, as described above, the composition and the layer thickness are different in the device according to the mask width (the above all show the layer thickness in the modulation section). That is, LD in the modulator area
The composition is shorter in wavelength and the layer thickness is smaller than in the region.
That is, in the quantum well 50b in the LD region, the well layer has strained InGaAsP (compression strain + 0.8%, wavelength composition 1.72).
μm: 5.5 nm in thickness), and the barrier layer is InGaAsP
(Strain-free 1.15 μm composition: layer thickness 7 nm) and 1.5
It has a band gap energy (0.8 eV) corresponding to a wavelength of 5 μm. On the other hand, in the quantum well 50a in the modulator region, the well layer has strained InGaAsP (compressive strain +
0.5%, wavelength composition 1.66 μm: layer thickness 3.8 nm),
The barrier layer is composed of InGaAsP (1.1 μm composition: layer thickness 5 n)
m) and has a bandgap energy (0.84 eV) corresponding to a wavelength of 1.48 μm.

【0010】次に選択成長に用いたマスクの開口部をス
トライプ状で幅約5μmに広げ、p−InP半導体層6
5(層厚は約1.3μm、キャリア濃度:5x1017
-3)、p+−InGaAsコンタクト層70(層厚は
約0.25μm、キャリア濃度:8x1018cm-3)に
より埋め込み成長後(図3(b))、素子間のInGa
Asコンタクト層を一部除去して素子分離を行い、Si
2絶縁膜80、およびパッド状の電極91a,91b
を形成した(図3(c),図2)。図4は、LD部と変
調器部との選択成長部を隔てている部分の断面図であ
る。この素子において、LD特性として閾値電流10m
A、光出力20mW以上、また変調部は変調電圧3Vで
15dB以上の良好な消光比および5Gb/sの変調時
においても極めて良好な変調特性が得られた。さらに従
来、変調時35dB以下であった副モード抑圧比は45
dB以上に改善され、また相対雑音強度も従来の−14
0dB/Hz程度から−155dB/Hz以下に減少
し、発生したキャリアによる素子間のクロストークが大
幅に低減した。また前述のように選択成長を利用してい
るため、導波路としての内部損失も小さく高出力が得ら
れ、さらに製作工程が気相成長とパターニングによるた
め歩留まりも高い。
Next, the opening of the mask used for the selective growth is expanded in a stripe shape to a width of about 5 μm, and the p-InP semiconductor layer 6 is formed.
5 (layer thickness is about 1.3 μm, carrier concentration: 5 × 10 17 c
m −3) , after buried growth by ap + -InGaAs contact layer 70 (layer thickness: about 0.25 μm, carrier concentration: 8 × 10 18 cm −3 ) (FIG. 3B),
Part of the As contact layer is removed to perform element isolation, and the Si contact layer is removed.
O 2 insulating film 80 and pad-shaped electrodes 91a and 91b
Was formed (FIGS. 3C and 2). FIG. 4 is a cross-sectional view of a portion separating a selective growth portion between an LD portion and a modulator portion. In this device, the threshold current is 10 m as the LD characteristic.
A, the optical output was 20 mW or more, and the modulation section obtained a good extinction ratio of 15 dB or more at a modulation voltage of 3 V and extremely good modulation characteristics even at the time of modulation of 5 Gb / s. Further, the sub-mode suppression ratio which was 35 dB or less in the conventional modulation is 45 dB.
dB, and the relative noise intensity is -14
From about 0 dB / Hz to -155 dB / Hz or less, crosstalk between elements due to the generated carriers was significantly reduced. Further, since selective growth is used as described above, a high output can be obtained with a small internal loss as a waveguide, and the yield is high because the manufacturing process is performed by vapor phase growth and patterning.

【0011】実施例2 本発明による第二の実施例について、図を参照して説明
する。図5は、本実施例による光変調器集積型DFB−
LDの斜視図および断面図である。第一の実施例と異な
る点は、活性層としてバルク半導体を用いていることで
ある。また素子構造はいわゆるバットジョイント(butt
-joint)構造である。作製法は、部分的に回折格子12
を形成した基板10上に光導波路層17(1.3μm組
成InGaAsP、層厚:0.1μm)、バルク活性層
58(1.55μm組成InGaAsP、層厚0.1μ
m)、光導波路層18(1.3μm組成InGaAs
P、層厚:0.04μm)を成長後、変調器部形成のた
め部分的に上記成長層18,58,17を順次エッチン
グにて取り除き、全面に光導波路層19(1.47μm
組成InGaAsP、層厚:0.16μm)を成長す
る。さらに、本発明では、LD部と変調器部との間を一
部除去後、p−InP半導体層65(層厚は約1.5μ
m、キャリア濃度:7x1017cm-3)を形成した後、
+−InGaAsコンタクト層70(層厚は約0.2
5μm、キャリア濃度:8x1018cm-3)を成長し
た。その後、リッジ状に導波部を形成し、半絶縁性In
P(Feドープ)62により埋め込み成長後、SiO2
絶縁膜80、およびパッド状の電極91,92を形成し
た。
Embodiment 2 A second embodiment of the present invention will be described with reference to the drawings. FIG. 5 shows an optical modulator integrated DFB-
It is the perspective view and sectional view of LD. The difference from the first embodiment is that a bulk semiconductor is used as the active layer. The element structure is a so-called butt joint.
-joint) structure. The manufacturing method partially includes the diffraction grating 12.
An optical waveguide layer 17 (1.3 μm composition InGaAsP, layer thickness: 0.1 μm), a bulk active layer 58 (1.55 μm composition InGaAsP, 0.1 μm layer thickness)
m), the optical waveguide layer 18 (1.3 μm composition InGaAs)
After growing P, a layer thickness: 0.04 μm), the growth layers 18, 58, and 17 were partially removed by etching in order to form a modulator portion, and the entire surface of the optical waveguide layer 19 (1.47 μm) was removed.
A composition InGaAsP (layer thickness: 0.16 μm) is grown. Further, in the present invention, after a portion between the LD section and the modulator section is partially removed, the p-InP semiconductor layer 65 (having a thickness of about 1.5 μm) is formed.
m, carrier concentration: 7 × 10 17 cm −3 )
p + -InGaAs contact layer 70 (layer thickness is about 0.2
5 μm, carrier concentration: 8 × 10 18 cm −3 ). Thereafter, a waveguide portion is formed in a ridge shape, and semi-insulating In
After burying and growing by P (Fe doping) 62, SiO 2
An insulating film 80 and pad-shaped electrodes 91 and 92 were formed.

【0012】本素子において、LD特性として閾値電流
15mA、光出力20mW以上、また変調部は変調電圧
3Vで15dB以上の良好な消光比が得られた。また半
絶縁性半導体埋め込みにより10Gb/sの変調時にお
いても極めて良好な変調特性が得られた。副モード抑圧
比、相対雑音強度も第一の実施例と同様に良好であり、
素子間のクロストークについても大幅に低減した。以上
の実施例はInP系半導体を例に説明したが、GaAs
系半導体においても有効である。
In this device, a threshold current of 15 mA and an optical output of 20 mW or more were obtained as LD characteristics, and a good extinction ratio of 15 dB or more was obtained in the modulation section at a modulation voltage of 3 V. Also, by embedding the semi-insulating semiconductor, very good modulation characteristics were obtained even at the time of modulation of 10 Gb / s. The submode suppression ratio and the relative noise intensity are also good as in the first embodiment,
The crosstalk between elements has also been significantly reduced. In the above embodiment, an InP-based semiconductor has been described as an example.
It is also effective for system semiconductors.

【0013】[0013]

【発明の効果】以上述べてきたように、本発明によれ
ば、光ガイド層あるいは光能動層を含む半導体層からな
る素子を複数集積してなる半導体光集積素子において、
前記素子のうち少なくとも2つの素子を光ガイド層より
もバンドギャップの大きな半導体によって隔てる構造と
することにより、パルス変調あるいは周波数(FM)変
調した場合に、レーザ部との間で生じるキャリアの移動
・拡散によるクロストークを抑制できる。
As described above, according to the present invention, there is provided a semiconductor optical integrated device in which a plurality of devices including a semiconductor layer including an optical guide layer or an optical active layer are integrated.
A structure in which at least two of the elements are separated by a semiconductor having a band gap larger than that of the optical guide layer, so that when a pulse modulation or a frequency (FM) modulation is performed, the movement of carriers generated between the laser unit and the laser unit. Crosstalk due to diffusion can be suppressed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による半導体光集積素子の一実施例の説
明図である。
FIG. 1 is an explanatory diagram of one embodiment of a semiconductor optical integrated device according to the present invention.

【図2】本発明による半導体光集積素子の一実施例の斜
視図である。
FIG. 2 is a perspective view of one embodiment of a semiconductor optical integrated device according to the present invention.

【図3】本発明による半導体光集積素子の一実施例の作
製方法を説明するための工程断面図である。
FIG. 3 is a process cross-sectional view for explaining a manufacturing method of one embodiment of the semiconductor optical integrated device according to the present invention.

【図4】本発明による半導体光集積素子のLD部と変調
器部との選択成長部を隔てている部分の断面図である。
FIG. 4 is a sectional view of a portion of a semiconductor optical integrated device according to the present invention, which separates a selectively grown portion of an LD portion and a modulator portion.

【図5】本発明による半導体光集積素子の別の一実施例
の斜視図および断面図である。
FIG. 5 is a perspective view and a sectional view of another embodiment of the semiconductor optical integrated device according to the present invention.

【図6】従来例による半導体光集積素子の説明図であ
る。
FIG. 6 is an explanatory diagram of a semiconductor optical integrated device according to a conventional example.

【符号の説明】 8,9 SiO2マスク 10 半導体基板 12 回折格子 15,16,17,18,19 光導波路層 21a 選択成長部(変調器領域) 21b 選択成長部(LD領域) 50a 量子井戸層(変調器部) 50b 量子井戸層(LD部) 58 バルク活性層 60 p−InPクラッド層 62 半絶縁性InP(Feドープ)層 65 p−InP層 70 p+−InGaAsP層 80 絶縁膜 91a,91b 電極[Description of Reference Numerals] 8, 9 SiO 2 mask 10 Semiconductor substrate 12 Diffraction grating 15, 16, 17, 18, 19 Optical waveguide layer 21a Selective growth portion (modulator region) 21b Selective growth portion (LD region) 50a Quantum well layer (Modulator part) 50b Quantum well layer (LD part) 58 Bulk active layer 60 p-InP clad layer 62 Semi-insulating InP (Fe-doped) layer 65 p-InP layer 70 p + -InGaAsP layer 80 Insulating film 91a, 91b electrode

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭54−37595(JP,A) 特開 平5−29602(JP,A) 特開 平1−319986(JP,A) 特開 平4−268765(JP,A) 特開 平5−82909(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 27/15 H01S 5/00 - 5/50 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-54-37595 (JP, A) JP-A-5-29602 (JP, A) JP-A-1-339996 (JP, A) JP-A-4- 268765 (JP, A) JP-A-5-82909 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 27/15 H01S 5/00-5/50

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体基板上の隣合う素子領域間の領域
に結晶成長を阻止するために形成され、前記隣合う素子
領域において、それぞれ幅の異なるマスクを形成する
程と、前記マスクから露出した前記半導体基板の前記隣
合う素子領域のそれぞれの領域に同時に、光ガイド層を
含む複数の半導体層を順次結晶成長して積層する工程
と、前記隣合う素子領域間の領域に前記光ガイド層より
もバンドギャップの大きな半導体層を埋め込み成長する
工程とを有し、前記バンドギャップの大きな半導体層に
より前記隣合う素子がそれぞれ含む光ガイド層が前記隣
合う素子領域間の領域で途切れており、前記隣合う素子
領域ごとに前記半導体層の層厚が異なっていることを特
徴とする半導体光集積素子の製造方法。
A step of forming masks having different widths in the adjacent element regions to prevent crystal growth in a region between adjacent element regions on the semiconductor substrate; A step of simultaneously crystal-growing and stacking a plurality of semiconductor layers including a light guide layer in each of the adjacent element regions of the semiconductor substrate exposed from the mask, and in a region between the adjacent element regions. Burying and growing a semiconductor layer having a band gap larger than that of the light guide layer, wherein the light guide layers included in the adjacent elements are formed by the semiconductor layer having a larger band gap in a region between the adjacent element regions. A method for manufacturing a semiconductor optical integrated device, wherein the semiconductor layer is discontinuous and the thickness of the semiconductor layer is different for each of the adjacent device regions.
【請求項2】 前記光ガイド層が量子井戸構造からなる
ものである請求項1記載の半導体光集積素子の製造方
法。
2. The method according to claim 1, wherein the light guide layer has a quantum well structure.
【請求項3】 前記半導体基板がInPからなり、前記
光ガイド層がInXGa1-XAsY1-Y(0≦X≦1,0
≦Y≦1)からなるものである請求項1記載の半導体光
集積素子の製造方法。
3. The semiconductor substrate is made of InP, and the light guide layer is made of In x Ga 1 -x As Y P 1 -y (0 ≦ X ≦ 1,0
≦ Y ≦ 1). The method of manufacturing a semiconductor optical integrated device according to claim 1, wherein
JP34700293A 1993-12-27 1993-12-27 Manufacturing method of semiconductor optical integrated device Expired - Fee Related JP3146821B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34700293A JP3146821B2 (en) 1993-12-27 1993-12-27 Manufacturing method of semiconductor optical integrated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34700293A JP3146821B2 (en) 1993-12-27 1993-12-27 Manufacturing method of semiconductor optical integrated device

Publications (2)

Publication Number Publication Date
JPH07193210A JPH07193210A (en) 1995-07-28
JP3146821B2 true JP3146821B2 (en) 2001-03-19

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Country Link
JP (1) JP3146821B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1075009A (en) * 1996-08-30 1998-03-17 Nec Corp Optical semiconductor device and its manufacture
JPH10173291A (en) * 1996-12-11 1998-06-26 Mitsubishi Electric Corp Semiconductor laser device
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