JP3144205B2 - Ultra high frequency device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to an ultra-high frequency device used in a millimeter wave band.

[0002] Ultra-high frequency devices include field effect transistors,
It consists of passive elements and wiring patterns connecting them, and is used when configuring microwave, millimeter-wave band amplifiers, mixers, and oscillators, but has more efficient operation and wider bandwidth characteristics as the device itself. It is necessary.

[0003]

2. Description of the Related Art FIG. 9 is an explanatory view of a main part of a conventional example, in which (a) is a configuration diagram and (b) is a sectional view of a via hole. In FIG. 9- (a), ribbon-shaped source electrodes (S ₁ , S ₂ , S ₃ ) are connected at right angles to a source connection pattern 57 having via holes 51, 52 connected to both ends at a predetermined interval. As shown in FIG. 9 (b), the via hole is a square conductor pattern on the surface of the substrate on which the FET electrodes are formed, and the back surface of this pattern is connected to the ground surface on the back surface of the substrate via an inclined through hole. are doing.

[0004] A ribbon-like drain electrode (a drain electrode () is connected to the drain connection pattern 53 connected to the drain pad 54.
D ₁ , D ₂ ) are connected at a predetermined interval, but the source electrode and the drain electrode are in a parallel state.

Further, gate electrodes (hereinafter, referred to as gate fingers) G ₁ , G ₂ , G ₃ , G ₄ are connected to the gate connection pattern 55 to which the gate pad 56 is connected at a predetermined interval. The gate fingers are arranged in parallel between the source electrode and the drain electrode as shown in the figure.

The signal applied to the gate pad 56 in the figure is distributed to the four gate fingers via the gate connection pattern, but the signal distributed to the gate fingers G ₁ and G ₂ is amplified. The signal distributed to the drain electrode D ₁ and the gate fingers G ₃ and G ₄ is amplified and
Respectively appear to D _2.

These signals are supplied to the drain connection pattern 53.
And output via the drain pad 54. To obtain a larger output power, the required number of unit transistors may be arranged in the horizontal direction.

The drain pad 54 and the gate pad 56
A feedback circuit composed of a resistor R and a capacitor C is provided between them. This is because when the device is used as an amplifier, the gain decreases as the operating frequency increases when no feedback is applied. , To achieve a wide band.

[0009]

As described above, since the via holes for grounding the source electrodes can be provided only at both ends of the FET, if the distance between the via holes is too large, the ground potential at each source electrode differs.

For example, the source electrodes S ₁ and S ₃ are
2, since 51 close to have become the ground potential, but the source electrode S ₂ will be connected with the via holes through the inductance component in order away from the via hole. Because of this,
Compared to the gain of a single FET composed of source electrodes S ₁ and S ₃ ,
Gain of a single FET composed of the source electrode S ₂ is decreased, efficient operation is not performed.

In particular, when dealing with high power, unless uniform power amplification is performed, power is concentrated on a specific portion, causing deterioration of the FET and lowering the reliability of the device. In addition, when a negative feedback circuit is provided between the drain side and the gate side, it is ideal to combine the signal that is fed back from the drain pad to the gate pad and the input signal in opposite phases. However, if a via hole is provided as shown in Fig. 9, connecting the resistor and capacitor to the output and input sides of the FET via the line pattern will result in
The line length of the feedback circuit increases, and the difference in phase shift due to the difference in signal frequency passing through this circuit increases. Since the signals whose phases are shifted are combined in this manner, it is difficult to widen the band.

That is, there is a problem that efficient operation is not performed and it is difficult to widen the band. An object of the present invention is to improve the operation efficiency and widen the band.

[0013]

The above object is shown in FIG.
Resolved by configuration. That is, microwave equipment of the present invention
A source electrode and a source electrode provided in parallel with the source electrode.
Drain electrodes in the direction perpendicular to the longitudinal direction of the electrode.
Gate finger between each source electrode and drain electrode
An electric field composed of multiple unit elements
Effect transistor and these multiple unit elements
In a super-high frequency device having a continuous wiring pattern ,
The plurality of unit elements constituting the field-effect transistor
Each of the plurality of gate electrodes and drain electrodes has the length of each electrode.
Adjacent to the electrode in a direction perpendicular to the hand
The gate connection pattern and drain connection pattern
Topaddo, are connected via a drain pad, the electric field
A plurality of unit elements constituting the effect transistor
The source electrode is connected to the gate with respect to the field-effect transistor.
Port connection pattern, the position opposite to the drain connection pattern
At a right angle to the longitudinal direction of the source electrode.
Also, a via hole for grounding, and a source connection pattern of equal length
It is connected via a down signal input to the gate connection pattern
Direction and the signal output direction from the drain connection pattern
It has the opposite direction and responds to the input signal applied to the input connection pattern.
From the unit element of the field-effect transistor
The output phase of the output signal is determined by the output point of the drain connection pattern.
, A plurality of
Field-effect transistors consisting of unit elements,
Having a wiring pattern for interconnecting a number of unit elements,
High-frequency device ". Furthermore, using the symbols shown in FIG.
More specifically, the above-described problems are caused by the source electrodes S _{1 to} S ₃
Of the source electrode is provided in a direction perpendicular to the longitudinal direction of the source electrode.
To the hole 11 through the same length source connection pattern
Connect the other of the drain electrode D _1, D ₂ and the gate electrode G ₁ ~G ₄
Make the end perpendicular to the longitudinal direction of the drain and gate electrodes.
Connection pattern 131 for drain and gate connection
Via the connection patterns 121, drain pad and Getopa
It can be solved by connecting to a pad .

[0014]

According to a first aspect of the present invention, there is provided a via hole in which one end of each of source electrodes S ₁ , S ₂ and S ₃ is provided in a direction perpendicular to the longitudinal direction of the source electrode.
Connect to 11 equidistant. The other ends of the drain and gate electrodes are connected to drain connection patterns 131 and gate connection patterns 121 provided in a direction perpendicular to the longitudinal direction of the drain and gate electrodes.

That is, the ground potentials of the source electrodes all have the same value. The drain and gate have a comb-like structure with electrodes and connection patterns perpendicular to the electrodes.
The passing phase of the signal from the branch point on the gate connection pattern to the synthesis point on the drain connection pattern becomes the same.
As a result, all the FETs are in the same operation state, and the signals at the combining points are in-phase combined because they have the same passing path length.

In the second and third aspects of the present invention, the ground potentials of the source electrodes are all the same as in the first aspect of the present invention. The phases of the signals applied to the gate electrodes are the same, and the signals are combined at the combining point c on the drain connection pattern.

According to a fourth aspect of the present invention, for example, first and second gate connection patterns are provided for a mixer, and mixer outputs are combined in phase at a combining point c. According to the fifth aspect of the present invention, a feedback circuit is formed by connecting a capacitor and a resistor between the drain connection pattern and the gate connection pattern, but the circuit length is shorter than that of the conventional example. , The input signal and the feedback signal are combined in opposite phases.

According to a sixth aspect of the present invention, a Schottky gate is provided on the n-type active layer in the resistor according to the fifth aspect of the invention, and the resistance value is changed by changing the voltage applied to the gate. Thereby, the feedback amount can be changed.

In a seventh aspect of the present invention, a high output is achieved by using two ultra-high frequency devices in a balanced structure. In the eighth and ninth aspects of the present invention, a Wilkinson hybrid or a balance resistor is provided between the drain connection patterns in order to obtain isolation between the two ultrahigh frequency devices.

That is, the ground potential of the source electrode is the same,
Since the distances to the combining points are equal, the phase relationship of the signals to be combined does not deviate, and efficient operation of the device can be performed. In addition, since the path length of the feedback circuit is shortened and the amount of feedback is made variable, a wider band can be realized.

[0021]

FIG. 1 is a block diagram of a main part of a first embodiment of the present invention.
FIG. 2 is a block diagram showing a main part of a second embodiment of the present invention, and FIG.
FIG. 4 is a main part configuration diagram of a fourth embodiment of the present invention, FIG. 5 is a main part configuration diagram of a fifth embodiment of the present invention, and FIG. FIG. 6 is a main part configuration diagram of an embodiment of the present invention,
FIG. 7 is a block diagram showing the main parts of the seventh and ninth embodiments of the present invention.
FIG. 21 is a configuration diagram of a main part of an eighth embodiment of the present invention.

Here, FIG. 7 is commonly used for the seventh and ninth inventions, but in the case of the seventh invention, the dotted lines 41 and 42 are deleted, and In the case of, a dotted line is added. The same reference numerals indicate the same objects throughout the drawings.

Hereinafter, FIGS. 1 to 8 will be described. The parts described in detail above will be schematically described, and the parts of the present invention will be described in detail. Note that all parts other than the drain electrode and the gate electrode in the drawing are the connection pattern for the drain and the connection pattern for the gate, and the drain pad and the gate pad are not shown. In the embodiments, the gate electrode in the claims is called a gate finger.

First, as shown in FIG. 1, the source electrodes S ₁ ,
Although S ₂ and S ₃ are connected to via holes 11 provided at right angles to the longitudinal direction of the source electrodes via the source connection patterns 14, since the distance between each source electrode and the via hole is equal, these source electrodes are connected to each other. The ground potentials are equal.

The drain electrodes D ₁ and D ₂ are connected to a drain pad (not shown) via a drain connection pattern 131 having a pattern in the longitudinal direction and the perpendicular direction of the drain electrode.
Connected to

Further, a flat electrode is provided between the drain electrode and the source electrode.
Gate finger G sandwiched between rows₁, G _Two, G_Three, G_FourBut the gate
Gate connection at right angles to the longitudinal direction of the finger
Connected to gate pad (not shown) via pattern 121
And has a comb structure.

Now, a part of the signal input through the gate connection pattern 121 is divided into the gate fingers at points a ₁ and a _2.
The signal amplified from G ₄ and G ₃ via the drain electrode D ₂ is sent to the drain connection pattern 131. Similarly, at the points a ₃ and a ₄ , the remaining signals from the gate fingers G ₁ and G ₂ through the drain electrode D ₁ through the drain connection pattern b
Sent to the point.

At this time, the distance from the point a ₁ → the drain electrode D ₂ → b point is equal to the distance from the point a ₁ → point a ₃ → drain electrode D ₁ → point b. ), The signals amplified at point b are combined in phase. Note that point a ₁
Is a branch point of the gate, and point b is a composite point of the drain.

In FIG. 2, the drain electrodes D ₁ and D ₂ are formed from an inverted U-shaped pattern portion connected to the other end of each electrode and an L-shaped pattern portion connected to the midpoint c of this portion. Through a drain connection pattern 131.

The gate fingers G ₁ , G ₂ and the gate fingers G ₃ , G ₄ have two patterns connected to the other ends of the respective electrodes, and the opposites connecting the midpoints b ₁ , b ₂ of these patterns. U-shaped pattern, midpoint a of inverted U-shaped pattern
Gate connection pattern 12 consisting of a pattern connected to
It is connected to a gate pad (not shown) via 2.
That is, the lengths of the connection paths from the drain connection pattern 131 and the gate connection pattern 122 to the corresponding electrodes are equal. Thereby, in-phase branching and in-phase synthesis of signals can be performed.

[0031] Figure 3 differs from Figure 1, the gate fingers between the drain electrode D ₂ and the source electrode S ₁ is not provided, the number of FET is halved as compared with FIG. But,
Distance between junction of gate finger and composite point of drain
(point a-c, point b-c) are the same, and the operating efficiency of the device is higher than in the case of FIG.

The source electrode S, the gate finger G, the drain electrode D, and the drain connection pattern 13 shown in FIG.
4 is the same as that of FIG. 1 except that first and second gate connection patterns 124a and 124b are provided, and gate fingers are alternately connected to the first and second gate connection patterns.

Then, the first gate connection pattern 124a
For example, when a high-frequency signal is applied to the second gate connection pattern 124b, for example, a local signal is applied, a signal whose frequency is converted from the drain electrode by the non-linear operation of the FET is obtained.

It should be noted that since the configuration is such that the frequency conversion output of another unit FET is combined in phase with the frequency conversion output of another unit FET at point c in the figure, it is effective to obtain a high power frequency conversion output. FIG. 5 shows the connection pattern 135 for the drain and the connection pattern 12 for the gate.
5 and a feedback circuit consisting of a capacitor C ₁ and a resistor R.As shown in the figure, a short distance is connected between the drain electrode and the gate finger. Can be synthesized. Thereby, a wider band can be achieved.

FIG. 6 shows that a Schottky gate is provided on the n-type active layer instead of the resistor in FIG. 5, and the control voltage applied to the Schottky gate is changed to reduce the depletion layer generated in the n-type active layer. The resistance value can be changed by changing the size. As a result, the amount of feedback can be varied, and fine adjustment of the frequency characteristics becomes possible.

FIG. 7 shows an ultrahigh-frequency device having the structure shown in FIG.
They are arranged symmetrically. As shown in the figure, the signal input from the gate connection pattern 127 is distributed and amplified by the left and right ultra-high frequency devices, and then combined and output by the drain connection pattern 137, but the number of unit FETs is large. Therefore, high output can be achieved.

If there is a difference between the drain voltages appearing in the two drain connection patterns, the combination cannot be performed properly. Therefore, as shown in FIG. 7, a resistance (for example, a resistance value of several KΩ) is applied between the drain connection patterns. ) To eliminate the voltage difference.

FIG. 8 shows that a known Wilkinson hybrid is provided between at least one of the drain connection pattern and the gate connection pattern in order to obtain isolation between the left and right super-high frequency devices. .

That is, since each source electrode is connected at the same distance as the via hole, the operation efficiency of the unit FET is improved as compared with the conventional case. Further, since an ideal feedback circuit is configured, the bandwidth of the ultra-high frequency device can be widened.

[0040]

As described in detail above, according to the present invention, there is an effect that the operation efficiency can be improved and the band can be widened.

[Brief description of the drawings]

FIG. 1 is a main part configuration diagram of a first embodiment of the present invention.

FIG. 2 is a main part configuration diagram of a second embodiment of the present invention.

FIG. 3 is a main part configuration diagram of a third embodiment of the present invention.

FIG. 4 is a main part configuration diagram of a fourth embodiment of the present invention.

FIG. 5 is a configuration diagram of a main part of a fifth embodiment of the present invention.

FIG. 6 is a configuration diagram of a main part of a sixth embodiment of the present invention.

FIG. 7 is a configuration diagram of main parts of a seventh and a ninth embodiments of the present invention.

FIG. 8 is a configuration diagram of a main part of an eighth embodiment of the present invention.

9A and 9B are explanatory views of a main part of a conventional example, in which FIG. 9A is a configuration diagram, and FIG. 9B is a cross-sectional view of a via hole.

[Explanation of symbols]

11 Via hole 14 Source connection pattern 121 Gate connection pattern 131 Drain connection pattern S _{1 to} S ₃ Source electrode G _{1 to} G ₄ Gate electrode D ₁ , D ₂ Drain electrode

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-111674 (JP, A) JP-A-1-96965 (JP, A) JP-A-60-107868 (JP, A) JP-A-1- 181574 (JP, A) JP-A-4-196543 (JP, A) JP-A-1-223757 (JP, A) JP-A-3-190310 (JP, A) JP-A-2-114561 (JP, A) JP-A-2-159055 (JP, A) JP-A-56-112954 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name)

Claims (3)

(57) [Claims] A source electrode provided in parallel with the source electrode;
The drain electrode in a direction perpendicular to the longitudinal direction of the electrode.
A plurality of gate electrodes are provided between each source electrode and drain electrode.
The sensor consists of a plurality of unit elements
Field effect transistor and these multiple unit elements
Ultra-high-frequency devices with interconnecting wiring patterns
Of the plurality of unit elements constituting the field-effect transistor.
Each of the plurality of gate electrodes and drain electrodes has the length of each electrode.
Adjacent to the electrode in a direction perpendicular to the hand
The gate connection pattern and drain connection pattern
Of the plurality of unit elements which are connected via a heat pad and a drain pad and constitute the field effect transistor.
A plurality of source electrodes are provided for the field effect transistor.
And the gate connection pattern and the drain connection pattern
In the opposite position, close to and perpendicular to the longitudinal direction of the source electrode
Provided via holes for ground and source connection of equal length
And a signal input direction to the gate connection pattern and the drain connection
The signal output direction from the continuation pattern has the opposite direction, and the electric field effect to the input signal applied to the input connection pattern.
Output positions of a plurality of output signals from the unit element of the transistor
Phases are approximately the same at the output point of the drain connection pattern.
A field-effect transistor comprising a plurality of unit elements, wherein
Has a wiring pattern that interconnects multiple unit elements
Ultra high frequency device. 2. The ultra-high frequency device according to claim 1, wherein the unit element includes the source electrode, the gate finger,
Limited to be composed of one set of the drain electrode
An ultra-high frequency device. 3. The ultra-high frequency device according to claim 1, wherein said gate connection pattern is provided in parallel.
One gate connection pattern, the second gate connection pattern
The first gate connection pattern includes an odd-numbered gate
In the second gate connection pattern.
Of the gate fingers, it characterized by connecting, ultrahigh
Frequency device.