JP3138675B2 - Multipoint network wiring method and electronic hardware device therefor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an electronic hardware device and a multipoint network automatic wiring method.

[0002]

2. Description of the Related Art A multipoint network wiring problem in which wiring resources are prepared in advance and a plurality of terminals are connected on the wiring resources in such a manner as to minimize the total cost such as the wiring length is not weighted. GMST (Graph Minimal Steine)
r Tree). Conventional methods for solving the GMST problem include (i) selecting a pair of terminals from a plurality of terminals constituting a network in order by some method and obtaining a wiring route between the pair of terminals, thereby finally obtaining the entire network. (Ii) Create a graph of only the terminals that make up the network as the initial solution, weight the branches as the shortest path between the terminals, then find the minimum spanning tree of the graph, and determine the branches of the graph. Returning to the original shortest path, finding the minimum spanning tree again, and removing extra branches and leaves; (iii) Focusing on the direction of signal flow, shortening the distance from the signal source terminal to the destination terminal Focused Path-FoldingArborescene (PF
A) Method; and other methods have been proposed.

The method (i) is to repeatedly apply an existing method for finding the shortest path between two points. The method (ii) is a method for shortening the total wiring length of the wiring path, and is described in detail in Acta Informatica, vol. 15, published in 1981, pages 141 to 145. “A fast algorithm for stein
Kou, G. Markowsky, L. Berman entitled “er trees”
Described in a paper by the authors. In addition, the method (iii) recursively repeats selecting two longest target terminals that share the shortest path from the signal source and combining them into one, so that the signal source is rooted. Is a method of generating a binary tree-shaped wiring path.
IEEE Transactions on issued by IEEE in 1996
Computer-Aided Design Vol. 15 No. 12 No. 1505
"New Performance-Dr" published from page pp. 1517
MJ ALEXAN entitled "iven FPGA Routing Algorithm"
DER, G. Robins et al.

[0004]

A wiring resource is prepared in advance, and a plurality of terminals are connected on the wiring resource.
Multipoint network wiring problem that minimizes the total cost such as wiring length, that is, GMST on weighted undirected graph
(Graph Minimal Steiner Tree) Among the methods proposed so far for solving the problem, (i) a terminal pair is selected in order from a plurality of terminals constituting the network, and the terminal pair is selected. The method of finally finding the wiring path of the entire network by finding the wiring path focuses only on minimizing the distance (cost) between the individual terminal pairs. However, there is a problem that the cost greatly depends on the order of selecting the terminal pairs.

[0005] Also, (ii) a graph of only the terminals constituting the network is created as an initial solution, and the weight of the branch is set to the shortest path between the terminals. Then, a minimum spanning tree of the graph is obtained. The method of removing the extra branches and vertices after returning to the original shortest path and then obtaining the minimum spanning tree again minimizes the total wiring length without considering the signal flow direction. However, there is a problem that it does not lead to reduction of signal propagation delay in

Further, the above-mentioned (iii) Path-Folding Arborescene (PFA) method which focuses on shortening the distance from the signal source terminal to the target terminal by paying attention to the direction of the flow of the signal, makes the vertices of the graph 2 Since only individual pieces are considered, there is a problem that a useless wiring path is generated depending on the wiring path pattern.

Accordingly, a technical problem of the present invention is a method of automatically obtaining a wiring path having a small propagation delay and a short total wiring length by paying attention to the direction of signal flow in an actual circuit. It is another object of the present invention to provide a multi-point network wiring method for automatically generating a wiring path suitable for high-speed operation with less propagation delay and electric capacity of wiring than before, and an electronic hardware device therefor.

[0008]

According to the present invention, a wiring material is provided.
In a weighted undirected graph in which the weight of each branch is determined from source information, a signal source terminal forming the graph is defined as a first vertex
From the first vertex, the end other than two or more signal sources
A first inter-vertex shortest path search unit for obtaining a shortest path candidate set from the first vertex to each vertex in the first vertex set when obtaining a path to the first vertex set of the child ; An overlapping cost calculation unit for obtaining an overlapping cost of a portion where the shortest path to each vertex in the first vertex set overlaps in the obtained shortest path candidate set, Wherein the second set of vertices that includes the path with the highest overlapping cost in the shortest path from the first vertex is removed from the first set of vertices, and the first
A second vertex which is an end point opposite to the vertex is regarded as a terminal instead of a new route search, and a target vertex adding unit to be added to the first vertex set as a vertex; A second inter-vertex shortest path search unit for finding the shortest path for the portion up to the second vertex, and the above-described series of processes of each unit are repeated until the first vertex set has one element. An electronic hardware device comprising an operation repeating unit for operating each unit is obtained.

That is, according to the present invention, the above configuration automatically generates a wiring path suitable for high-speed operation with small propagation delay and electric capacity of wiring.

Further, according to the present invention, the information of wiring resources
In the weighted directed graph in which the weight of each branch is determined, a signal source terminal constituting the graph is defined as a first vertex, and from the first vertex, a first terminal of terminals other than two or more signal sources is determined . A first branch direction shortest path search for obtaining a shortest path candidate set from the first vertex to each vertex in the first vertex set in accordance with a branch direction when obtaining a path to one vertex set; And an overlapping cost detecting unit for obtaining an overlapping cost of a portion of the obtained shortest path candidate set in which the shortest path to each vertex in the first vertex set shares a branch in the same direction. Out of the first set of vertices, the second set of vertices that includes the path with the highest overlap cost in the shortest path from the first vertex is removed from the first set of vertices,
A second vertex, which is an end point of the overlapping route opposite to the first vertex, is regarded as a substitute terminal for a new route search.
And, wherein the object vertex addition unit to add to the first vertex set, the second branch direction shortest path search for determining the shortest path in accordance with the branch direction for the portion from the second vertex set to a second vertex as the vertex An electronic hardware device comprising: a unit; and an operation repetition unit that operates the units so as to repeat the processing of each unit until one element of the first vertex set becomes one. .

Further, according to the present invention, information on wiring resources
In the weighted undirected graph in which the weights of the respective branches are determined, a signal source terminal constituting the graph is defined as a first vertex, and from the first vertex, terminals other than two or more signal sources are defined. A first inter-vertex shortest path search step of obtaining a shortest path candidate set from the first vertex to each vertex in the first vertex set when obtaining a path to the first vertex set; An overlapping cost calculating step of obtaining an overlapping cost of a portion where the shortest path to each vertex in the first vertex set overlaps in the obtained shortest path candidate set; The second set of vertices that includes the path with the highest overlap cost in the shortest path from the first vertex is removed from the first set of vertices, and instead, the first vertex of the overlapping path is removed. generation of a new path search for the second vertex is the opposite of the end point is the
A purpose adding step of considering the terminal as another terminal and adding it as a vertex to the first vertex set, and a second step of obtaining a shortest path from the second vertex set to the second vertex.
A step of searching for the shortest path of the vertex, and an iterative operation step of operating each of the steps so as to repeat the processing of the above series of steps until the element of the first vertex set becomes one. Is obtained.

Further, according to the present invention, information on wiring resources is provided.
In the weighted directed graph that determines the weight of each branch from
A signal source terminal constituting the graph is defined as a first vertex, and from this first vertex, a first terminal of terminals other than two or more signal sources is set.
When finding the path to the vertex set of
A first branch-directed shortest path search step for obtaining a shortest path candidate set from the first vertex to each vertex in the first vertex set; and A duplicate cost detection step of determining an overlap cost of a portion where the shortest path to each vertex in the vertex set shares a branch in the same direction; and a path having the highest overlap cost in the first vertex set. Is removed from the first set of vertices that includes the shortest path from the first vertex to the first set of vertices, instead of the Vertex 2 is replaced with a terminal instead of a new route search
A target vertex adding step of adding the vertex to the first vertex set as a vertex, and a second branch direction shortest path search for obtaining a shortest path according to a branch direction for a portion from the second vertex set to the second vertex. Steps and the above processing are performed in the first
And an operation repetition step of repeating the operation until the number of elements of the vertex set becomes one.

[0013]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 3 is a diagram illustrating a schematic configuration of an electronic hardware device according to an embodiment. Referring to FIG. 1, an electronic hardware device according to a first embodiment of the present invention includes an input device 1 such as a file, a data processing device 2 operated by program control, a storage device 3 for storing information, And an output device 4 such as a file.

The storage device 3 includes a graph data storage unit 8,
A vertex set storage unit A · 9 and a vertex set storage unit B · 10 are provided.

The graph data storage unit 8 stores the weighted undirected graph read by the input device 1 and information on terminals to be wired.

The vertex set storage unit A.9 stores, as the vertices of the graph, the terminals excluding the signal source terminals among the terminals constituting the network to be wired.

The data processing device 8 includes a shortest path searching means 5
And an overlap cost calculation means 6 and an overlap cost evaluation / vertex selection means 7.

The shortest path search means 5 finds the shortest path between any two vertices. Various shortest path search methods for weighted undirected graphs have been proposed. For example, Dijkstra
Can be used as one of them.

When a plurality of wiring paths share the same branch, the overlapping cost calculation means 6 calculates the overlapping cost from the number of overlapping wiring paths and the weight of the branch constituting the overlapping portion. I do.

The duplication cost evaluation / vertex selection means 7 finds a route having the highest duplication cost from the duplication cost calculated by the duplication cost calculation means 6, selects a vertex as an end point thereof, and stores the vertex set storage unit A · 9. And vertex set storage unit B
Update 10

That is, the vertex set storage unit B · 10 stores the vertex which is the end point of the route where the duplicate cost obtained by the duplicate cost evaluation / vertex selecting means 7 is the maximum, from the signal source terminal to the shortest. Save a group of terminals that can be routed.

Next, FIG. 2 is a flowchart for explaining the overall operation of the electronic hardware device of FIG.
Referring to FIG. 2, first, in step A1, information on a wiring resource that is a candidate for a wiring path, a network to be wired, and terminals constituting the network is read from the input device 1 such as a file.

Next, in step A2, the shortest path searching means 5 is used based on the information of the wiring resources read from the input device 1.
Generates a weighted undirected graph, saves it in the graph data storage unit 8, and saves a graph whose terminals other than the signal source are vertices of the graph in the vertex set storage unit A · 9. In this case, the weight of each branch is determined by the length of the wiring path, the direction of the wiring, the capacitance, the inductance, the material, the depth of the signal layer, the signal propagation delay time, the degree of congestion of the wiring, and the like.

Next, in step A3, the shortest path search means 5 reads the weighted undirected graph from the graph data storage unit 8, reads information on terminals other than signals from the vertex set storage unit A.9, Find the shortest path from the signal source terminal S of the network to the terminals other than the signal source,
Listed as the shortest path candidate set, the graph data storage unit 8
(A first inter-vertex shortest path search step by the first inter-vertex shortest path search unit).

Next, in step A4, the weight cost calculation means 6 calculates the cost of the portion where the shortest paths overlap in the shortest path candidate set stored in the graph data storage unit 8, and stores the graph data. It is stored in the unit 8 (duplicate cost calculation step by the duplicate cost calculation unit).

Next, in step A5, the overlap cost evaluation / vertex selection means 7 finds a route having the maximum overlap cost stored in the graph data storage unit 8.

Next, in step A6, the overlapping cost evaluation / vertex selecting means 7 obtains a vertex T which is the end point of the route having the maximum overlapping cost.

Next, in step A7, the redundant cost evaluation / vertex selecting means 7 finds a terminal group G through which the shortest path from the signal source terminal S can pass through the vertex T, and obtains a vertex set storage section B · 10 (A target vertex adding step by the target vertex adding unit).

Next, in step A8, the duplicate cost evaluation / vertex selection means 7 sends the vertex T to the vertex set storage unit B · 1.
The shortest path to the terminal group G stored at 0 is obtained and stored in the graph data storage unit 8 (second shortest path search between vertices by the second shortest path search between vertices).

Next, in step A9, the duplicate cost evaluation / vertex selecting means 7 deletes the vertices corresponding to the terminal group G stored in the vertex set storage sections B · 10 from the vertex set storage sections A · 9. , And are stored in the vertex set storage unit A 109 as terminals instead of the vertex T.

Next, in step A10, the weight cost evaluation / vertex selection means 7 checks whether or not the number of terminals stored in the vertex set storage section A.9 is one, and compares the result with the shortest path search means. Inform 5

Next, in step A11, the shortest path searching means 5 sends the weighted undirected graph data stored in the graph data storage unit 8 and the last one stored in the vertex set storage unit A.9. The information on the terminals other than the signal source terminals is read, and the shortest path between the signal source terminal S and the last terminal other than the signal source is obtained, thereby completing the multipoint network wiring process. If two or more terminals remain outside the signal source terminal S, the process returns to step A3 (operation repetition step by the operation repetition unit).

Next, the effects of the first embodiment of the present invention will be described. In the first embodiment of the present invention,
Since the evaluation is performed by simultaneously considering a plurality of shortest paths to a plurality of terminals, a wiring path having a smaller total wiring length and the like is required as compared with the conventional method that focuses on only two terminals. Can be requested.

Next, the operation of the electronic hardware device according to the first embodiment of the present invention will be described more specifically.

FIG. 3 is a diagram showing an example in which a wiring resource, a terminal and a graph connecting them are generated in the step A2 of FIG. In the example of FIG. 3, the signal source terminal S3
3, terminal A34, terminal B35, terminal C36, terminal D37
Find the path to wire.

FIG. 4 is a diagram showing a situation in which, at the stage of step A3 in FIG. 2, the shortest path from the signal source terminal S of the network to be wired to the remaining terminals is obtained and listed as the shortest path candidate set. In FIG. 4, the signal source terminal S · 33
, The shortest path 41 of the terminal A · 34, the signal source terminal S · 33
, The shortest path 42 and the shortest path 43 of the terminal B • 35, the shortest path 44 and the shortest path 45 of the terminal C • 36 from the signal source terminal S • 33, and the shortest path 46 of the terminal D • 37 from the signal source terminal S • 33. The shortest paths 47 are listed (a first inter-vertex shortest path search step by the first inter-vertex shortest path search unit).

FIG. 5 shows steps A4 and A in FIG.
5 is a diagram showing the operation of each stage of step A6. FIG.
As shown in (4), at the stage of step A4, the cost of the portion where the shortest paths overlap in the shortest path candidate set enumerated in FIG. 4 is calculated (by the first overlap cost calculation unit of the overlap cost calculation unit). First overlapping cost calculation stage).

Next, at the stage of step A5, a route having the maximum overlapping cost is found. Furthermore,
FIG. 3 shows a state in which a vertex T which is an end point of the path is obtained at the stage of step A6 in FIG. Overlap path 51
The shortest path 43, the shortest path 45, the shortest path 41, and the shortest path 46 overlap. In the example of FIG. 5, the overlapping cost is a product of the weight of the branch and the overlapping number. In this case, when N paths overlap, N-1 is regarded as a duplicate number (N-1).
Because the books are overlapping.) It does not include overlapping routes going to the same terminal. In the case of the overlapping path 51, the shortest path 43 and the shortest path 45 overlap at the branch of weight 2 and the shortest path 41, the shortest path 43, the shortest path 45, and the shortest path 46 overlap at the branch of weight 1, Cost 54 is 2 ×
(2-1) + 1 × (4-1) = 5.

Similarly, in the case of the overlapping path 52, the shortest path 41
The shortest path 42, the shortest path 44, and the shortest path 46 overlap,
The overlapping cost 55 is “7”. The overlapping cost 55 indicates the largest value “7”. The end point of the overlapping path 52 on the opposite side of the signal source terminal S • 33 is located at the vertex T.
・ It becomes 57.

FIG. 6 shows steps A7 and A in FIG.
FIG. 8 is a diagram provided for explanation of each stage of step A9. Referring to FIG. 6, in step A7, a terminal group G that allows the shortest path from the signal source terminal S to pass through the vertex T is determined (a target vertex adding step by a target vertex adding unit). Next, as a step A8, a shortest path from the vertex T to the terminal group G is determined (a second shortest distance search between vertices by the second shortest distance search between vertices). Further, as a step A9, the terminal group G is deleted, and processing is performed until the vertex T is regarded as a substitute terminal.

In the case of FIG. 6, terminals A and 34 and terminals B and 35
A wiring path 61 between the terminal C · 36 and the vertex T · 57 is determined, and a wiring path between the vertex T · 57, the terminal D · 37, and the signal source terminal 33 will be obtained in the future.

In the case of FIG. 6, the signal source terminal S.33
In addition, two terminals (vertex T ·
57 and the terminals D and 37 remain, so the process returns to step A3 in FIG. 2 again (operation repetition step by the operation repetition unit).

FIG. 7 is a diagram showing a state where the process returns to the step A3. As shown in FIG. 7, the shortest path 71, the shortest path 72, and the shortest path 73 are obtained, and then the overlapping path 74 and its overlapping cost 75 are calculated. Shortest path search stage).

FIG. 8 is a diagram showing the calculation results. As shown in FIG. 8, the vertex T ′ · 81 becomes a new terminal and the number of terminals is reduced to one, so that the terminal T ′ · 81 and the signal source terminal S
The process is completed by finding the shortest path between 33.

FIG. 9 shows an example of the final result.

(Second Embodiment) Next, a second embodiment of the present invention will be described.
An embodiment will be described in detail with reference to the drawings.

FIG. 10 is a diagram showing a state in which the weight cost is obtained according to the second embodiment of the present invention. The second embodiment has the same configuration as the first embodiment except that the configuration of the overlap cost calculation is different from that of the first embodiment. That is, in FIG. 5, the product of the weight of the branch and the product of the number of overlaps is used as the overlapping cost. However, the wiring cost is not considered. It is also conceivable to use a product of a plurality of overlapping numbers (second overlapping cost calculation step by the second overlapping cost calculation unit of the overlapping cost calculation unit). When the overlapping cost is calculated in such a manner, FIG. 5 changes to FIG.
For example, in the case of the overlap route 101, one vertex is passed at the overlap degree 1 and one vertex is passed at the overlap degree 3, so that 1 × 1 + 1 × 3 =
This results in four overlapping costs. The other parts are the same as in the first embodiment.

(Third Embodiment) Next, a third embodiment of the present invention will be described.
The embodiment will be described in detail.

In the first and second embodiments, it is assumed that the wiring resources are represented by a weighted undirected graph. However, in the third embodiment, the case where the wiring resources are represented by a weighted directed graph is described. Will be described. Since many parts are the same as those in the first embodiment, the differences will be described in detail.

The weighted undirected graph generated in step A2 of FIG. 2 is expressed as a weighted directed graph according to the wiring resources. Therefore, the first and second vertex shortest path search units and stages in the first or second embodiment are
The first and second branch shortest route searching units and the steps in the third embodiment include the first or second overlapping cost calculating unit and the steps in the overlapping cost calculating unit in the first or second embodiment. Correspond to the first or second overlapping cost measuring section and the second step of the overlapping cost detecting section in the third embodiment, respectively, and the target vertex adding section and the remaining section, the operation repeating section and the second step. Have the same configuration.

In step A3 of FIG. 2, the shortest path search of the weighted directed graph can use an existing method such as Dijkstra's algorithm as in the case of the weighted undirected graph. At that time, the shortest path must have the branch directed from the signal source terminal to the other terminal.

In steps A4, A5, and A6 of FIG. 2, it is determined that the shortest paths sharing the same branch direction are overlapped.

For the shortest path search in steps A8 and A11 in FIG. 2, an existing method can be used as in step A3.

[0055]

As described above, according to the present invention,
Since a plurality of shortest paths are simultaneously evaluated and a wiring path is selected from a global viewpoint, a wiring path having a shorter total wiring length can be obtained as compared with the conventional multipoint network wiring method. A dot net wiring method and an electronic hardware device can be provided.

Further, according to the present invention, since the final wiring path is obtained based on the shortest path to each terminal, all the wiring paths from the signal source terminal to other terminals can be the shortest paths. A multipoint network wiring method and an electronic hardware device can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an electronic hardware device according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of the electronic hardware device of FIG. 1;

FIG. 3 is a diagram showing a specific example of the operation of the electronic hardware device of FIG. 1 and showing the stage of step A2 in FIG. 2;

FIG. 4 is a diagram showing a specific example of the operation of the electronic hardware device of FIG. 1 and showing the stage of step A3 in FIG. 2;

FIG. 5 is a specific example of an operation according to the first embodiment of the present invention, which is performed in steps A4, A5, and A6 in FIG.
It is a figure which shows the stage which finished.

FIG. 6 is a specific example of the operation of the first exemplary embodiment of the present invention, and is a diagram illustrating steps A7, A8, and A9 in FIG. 2;
It is a figure which shows the stage which finished.

FIG. 7 is a specific example of the operation of the first exemplary embodiment of the present invention. FIG. 7 is a diagram showing a stage in which, according to the flowchart of FIG. It is.

FIG. 8 is a specific example of the operation of the first embodiment of the present invention, and shows an overlapping path, a new vertex T ′, and a terminal to a vertex T ′ based on an overlapping cost obtained for a new terminal. It is a figure showing the stage where the shortest path was calculated.

FIG. 9 is a specific example of the operation of the first exemplary embodiment of the present invention, and is a diagram illustrating a stage in which a final wiring path is obtained.

FIG. 10 is a diagram showing a state in which duplicate costs are obtained in the second embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input device 2 Data processing device 3 Storage device 4 Output device 5 Shortest path search means 6 Duplication cost calculation means 7 Duplication cost evaluation / vertex selection means 8 Graph data storage unit 9 Vertex set storage unit A 10 Vertex set storage unit B 31 Vertex 32 branch 33 signal source terminal S 34 terminal A 35 terminal B 36 terminal C 37 terminal D 41 shortest path 42 shortest path 43 shortest path 44 shortest path 45 shortest path 46 shortest path 47 shortest path 51 overlapping path 52 overlapping path 53 overlapping path 54 Duplicate cost 55 Duplicate cost 56 Duplicate cost 57 Vertex T 61 Wiring path 71 Shortest path 72 Shortest path 73 Shortest path 74 Shortest path 75 Shortest cost 81 Vertex T '101 Duplicate path 102 Duplicate path 103 Duplicate path 104 Duplicate cost 105 Duplicate cost 106 Duplicate cost

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-6-283603 (JP, A) Takayuki Yamagata, Akihiro Fujii, Yoshiaki Nemoto, "Proposal and Evaluation of Routing Algorithm for Multicast Communication," Electronic Information IEICE Transactions D-I, September 1997, J80-D-I Volume 9, No. 9, p. 739−744 (58) Fields surveyed (Int.Cl. ⁷ , DB name) G06F 17/50 H01L 21/82 G06F 17/00-17/18

Claims (12)

(57) [Claims] 1. A <br/> weighted undirected graph that defines the weight of each branch from the information of the wiring resources, signal constituting the graph
The issue source terminal and the first vertex from the first vertex, when obtaining the first path to the vertex set other than two or more signal sources terminal, the first from the first vertex A first inter-vertex shortest path search unit for obtaining a shortest path candidate set to each vertex in the vertex set, and a shortest path to each vertex in the first vertex set among the obtained shortest path candidate sets. An overlap cost calculation unit for calculating an overlap cost of a portion where a route overlaps, and a second vertex including a route having a highest overlap cost in a shortest route from the first vertex in the first vertex set. The set is removed from the first set of vertices, and instead a second end of the overlapping path, which is the opposite end of the first set of vertices from the first set of vertices.
Is regarded as a terminal in place of a new route search, and a target vertex adding unit which adds the vertex to the first vertex set as a vertex; and a shortest route for a portion from the second vertex set to the second vertex. And an operation repetition unit that operates the units so as to repeat the above-described series of processing of each unit until the number of elements of the first vertex set becomes one. An electronic hardware device, characterized in that: 2. The electronic hardware device according to claim 1, wherein the overlap cost calculation unit calculates the overlap cost as a function of the sum of the weights of all the branches constituting the overlapping paths and the degree of overlap. An electronic hardware device comprising: a duplication cost calculation unit. 3. The electronic hardware device according to claim 1, wherein the overlap cost calculation unit calculates the overlap cost as a function of the number of all vertices constituting the overlapping route and the degree of overlap. An electronic hardware device comprising a cost calculation unit. 4. In a weighted directed graph in which the weight of each branch is determined from wiring resource information, a signal forming the graph is used.
The issue source terminal and the first vertex from the first vertex, when obtaining the first path to the vertex set of two or more signal sources other than the terminal, according to branch direction, said first apex of A first branch-directed shortest path search unit for obtaining a shortest path candidate set to each vertex in the first vertex set from the first vertex set; An overlap cost detection unit for finding an overlap cost of a portion where the shortest path to the vertex shares a branch in the same direction, and a path having the highest overlap cost in the first vertex set being the first path. The second set of vertices included in the shortest path from the vertices is removed from the first set of vertices, and a second vertex which is the opposite end point of the overlapping path from the first set of vertices is newly added. The terminal is regarded as a substitute for a simple route search , and the first
A target vertex adding unit to be added to the set of vertices, a second branch-direction shortest path search unit that obtains the shortest path according to the branch direction for the portion from the second set of vertices to the second vertex,
An electronic hardware device comprising: an operation repetition unit that operates the units so that the processing of each unit described above is repeated until the number of elements of the first vertex set becomes one. 5. The electronic hardware device according to claim 4, wherein the overlap cost detection unit performs the overlap as a function of the sum of the weights of all the branches constituting the paths sharing the same direction of the branch and the degree of overlap. An electronic hardware device including a first duplicate cost measuring unit for calculating a cost. 6. The electronic hardware device according to claim 4, wherein the overlap cost detecting unit calculates the overlap cost as a function of the number of all vertices constituting the paths sharing the same direction of the branch and the degree of overlap. An electronic hardware device including a second duplicate cost measuring unit to be obtained. 7. In a weighted undirected graph in which the weight of each branch is determined from information on wiring resources, a signal constituting the graph is provided.
The issue source terminal and the first vertex from the first vertex, when obtaining the first path to the vertex set other than two or more signal sources terminal, the first from the first vertex A first inter-vertex shortest path search step for finding a shortest path candidate set to each vertex in the vertex set, and a shortest path to each vertex in the first vertex set in the obtained shortest path candidate set. An overlapping cost calculating step of obtaining an overlapping cost of a portion where the paths overlap, and a second vertex including, in the first vertex set, a path having the highest overlapping cost in a shortest path from the first vertex. Remove the set from the first set of vertices;
A second vertex, which is an end point of the overlapping route opposite to the first vertex, is regarded as a substitute terminal for a new route search.
And the purpose additional steps to be added to the first vertex set as the vertex, a second vertex shortest path search stage to determine the shortest path for the portion from the second vertex set to said second vertex, or A repetitive operation step of operating each of the steps so as to repeat the processing of each of the steps until the number of elements of the first vertex set becomes one. Wiring method. 8. The multi-point network wiring method according to claim 7, wherein the step of calculating the overlapping cost includes the step of calculating the overlapping cost as a function of the sum of the weights of all the branches constituting the overlapping route and the degree of overlap. A multipoint network wiring method, comprising one overlapping cost calculation step. 9. The multi-point network wiring method according to claim 7, wherein the step of calculating the overlapping cost includes the step of calculating the overlapping cost as a function of the number of all vertices constituting the overlapping route and the degree of overlap. A multipoint network wiring method comprising an overlapping cost calculation step. 10. The weight of each branch is determined from information of wiring resources.
In the weighted directed graph, a signal source terminal constituting the graph is defined as a first vertex, and from the first vertex, 2
A shortest path candidate set from the first vertex to each vertex in the first vertex set according to the direction of a branch when obtaining a path to a first vertex set of terminals other than the signal sources or more. The first branch-directed shortest path searching step for obtaining the shortest path to the respective vertices in the first vertex set in the obtained shortest path candidate set. And a second vertex set including a path having the highest overlap cost in the shortest path from the first vertex to the first vertex. Remove from the set and instead consider the second vertex of the overlapping path opposite the first vertex as the alternative terminal for a new path search, and use the first vertex set as the vertex Adding a target vertex to the second vertex set Causing operation to repeat until the second branch direction shortest path search step and, above process the first element of the vertex set for obtaining the shortest path in accordance with the direction of the branch for the portion up to the second vertex is one A multipoint network wiring method, comprising an operation repetition step. 11. The multipoint network wiring method according to claim 10, wherein the step of detecting the overlap cost comprises the step of: determining a sum of weights of all branches constituting a path sharing a branch in the same direction and a function of the degree of overlap. A multipoint network wiring method, comprising: a first overlapping cost measurement step for determining an overlapping cost. 12. The multi-point network wiring method according to claim 10, wherein the step of detecting the overlapping cost comprises the step of detecting the overlapping cost as a function of the number of all vertices constituting the path sharing the branch of the same direction and the degree of overlapping. A multi-point network wiring method, comprising: