JP3137095B2 - Constant current drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current drive circuit for driving a load for current / voltage conversion, such as a diode or an organic thin film EL device, and a capacitor connected in parallel with the load with a constant current.

[0002]

2. Description of the Related Art A typical example of a load requiring constant current driving is an organic thin film EL device. Organic thin-film EL devices are still young since development, and there are research issues in material selection for improving brightness, etc., but they can be driven by DC current, can achieve high brightness with high efficiency, and have responsiveness and low temperature. Because of its good temperature characteristics, early mass production in various fields is desired.

FIG. 14 shows a sectional structure of an organic thin film EL device. The organic thin-film EL element serves as an anode electrode on a glass substrate 44 and an ITO transparent electrode 43 and a cathode electrode 41.
Not only has a diode characteristic of performing current / voltage conversion, but also functions as an anode electrode due to the influence of the insulating organic layer 22 and the ITO transparent electrode 23 and the cathode. It has a structure in which a parasitic capacitance is structurally connected to the electrode 21. It is conceivable to apply an organic thin film EL element having such characteristics to a display panel having a simple matrix structure.

FIG. 13 shows a conventional example of a constant current driving circuit using an organic thin film EL element as a load. The load 14 is an organic thin-film EL element, and the capacitance 15 connected in parallel with the load 14 is a parasitic capacitance that the organic thin-film EL element has structurally. One end of the connection point between the load 14 and the capacitor 15 is connected to the power supply terminal 3, and the other end is connected to the constant current driving transistor 8.
Connected to the drain of The source of the transistor 8 is connected to the ground terminal 4. The gate of the transistor 8 is connected to the gate and the drain of the transistor 7 of the same conductivity type as the transistor 8 (an N-channel transistor in the example in the figure) via the switch 11. I have. The source of the transistor 7 is connected to the ground terminal 4. Transistors 7 and 8 form a current mirror circuit via switch 11. The gate and the drain of the transistor 7 are connected to the source follower transistor 5 through the resistor 6.
Connected to the source. Here, the voltage generated across the resistor 6 determines the current value of the current mirror circuit formed by the transistors 7 and 8. The drain of the source follower transistor 5 is connected to the power supply terminal 3.
The gate of the source follower transistor 5 is the input terminal 1.

FIG. 13 shows the operation of the constant current drive circuit shown in FIG.
This will be described with reference to FIG. Signal voltage is generated at input terminal 1
And the signal voltage is the gate saw of transistors 5 and 7.
Is converted to a current by the
It becomes the drain current of the transistor 7. Transistors 7 and 8 are
A current mirror circuit is configured via the switch 11.
Therefore, the drain of the transistor 8 is connected to the transistor 7
, A drain current proportional to the drain current flows. this
The proportional value is calculated by the ratio of the pattern size of transistors 7 and 8
It is determined. For example, if transistors 7 and 8 have the same pattern
Size, the drains of transistors 7 and 8
The currents will be equal. A signal is applied to the control terminal 2 and the switch
When the switch 11 becomes conductive, the load 14 and the load 14
The transistor 15 is connected to the constant current
Move. Here, when the specified current flows, the load 14
Voltage value is V_F , The drain current of transistor 8 is₈ ,
The capacitance value of capacitance 15 is C_FifteenAnd the charging voltage of the capacitor 15 is V
_F Time to reach ₁ Then T₁ Is below
Is represented as

T ₁ = C ₁₅ · V _F / I ₈ (1)

[0007]

Therefore, the conventional example shown in FIG. 13 has the following problems. That is, when a signal voltage is generated at the input terminal 1 and a control signal is applied to the control terminal 2 to supply a constant current to the load 14, the capacitance 15 connected in parallel to the load 14 causes the equation (1). As shown in the figure, the rise time of the constant current is delayed. When the constant current drive circuit in FIG. 13 is applied to a display panel having a simple matrix structure, the light emission response time of a selected pixel becomes slow. As a result, an afterimage on the display of the display is conspicuous, and the gradation of the luminance is lost, thereby deteriorating the display quality.

An object of the present invention is to provide a constant current drive circuit in which the rise time of a constant current flowing through a load is short.

[0009]

According to the present invention, there is provided a constant current driving circuit according to the present invention, comprising a first constant current driving first conductivity type connected in series with a load between a high potential power supply and a low potential power supply. An FET transistor, a capacitor connected in parallel with the load, a first switching element, the first FET transistor and the gate connected to each other via the first switching element, a gate and a drain connected, A second FET transistor of the first conductivity type forming a current mirror circuit with the first FET transistor, and a second FET transistor connected in series between the high-potential power supply and the low-potential power supply; A third FET transistor to be applied, a resistor connected between the second FET transistor and the third FET transistor, and a resistor connected in parallel with the first FET transistor. A fourth FET transistor of the first second conductivity type conductivity type opposite to conductivity type electrically, a reference voltage source connected between the high potential power source and the low potential power source, the fourth F
A second switching element that is provided between the gate of the ET transistor and a reference voltage terminal of the reference voltage source and that conducts / cuts off in synchronization with the first switching element; and a reference voltage terminal of the reference voltage source. Is set smaller than the sum of a prescribed voltage value obtained by current / voltage conversion by the load and a voltage between the gate of the fourth FET transistor and the electrode on the load side.

When the input signal changes from a low level to a high level,
It is assumed that both switching elements are in a conductive state. The resistor converts the signal voltage of the input signal into a current,
The drain current is supplied to the FET transistor. Second
And the third FET transistor constitute a current mirror circuit via the first switching element, so that the drain of the first FET transistor has the second F
A current proportional to the drain current of the ET transistor flows, and this current drives a load and a capacitor connected in parallel with the load with a constant current. The capacitor is charged by a time constant determined by the constant current value from the first FET transistor and the capacitance value of the capacitor, and finally, the specified voltage obtained by converting the constant current value of the first FET transistor into a voltage by the load. Charge up to the value. Here, the reference voltage of the reference voltage terminal of the reference voltage source is
The specified voltage value converted by the load from current to voltage and the fourth FET
The second switching element is set to be smaller than the sum of the voltage between the gate and the electrode on the load side of the transistor and the first switching element
As in the case of the switching element, the conductive state is in synchronization with the control signal, so that the capacitance connected in parallel to the load is
Via the fourth FET transistor, the battery is rapidly charged to the set value. When the above set value is reached, the fourth FET
The transistor is turned off, but thereafter the constant current of the first FET transistor charges the capacitance to a specified voltage value.

With the provision of the fourth FET transistor, the second switching element, and the reference voltage source, the rise time of the current flowing through the load is shortened.

A similar effect can be obtained by using a bipolar transistor instead of a FET transistor.

[0013]

Next, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, a constant current circuit according to an embodiment of the present invention includes an input terminal 1, a control terminal 2, a power supply terminal 3, a ground terminal 4, a P-channel transistor 5, a resistor 6, , P-channel transistors 7, 8, a reference voltage source 9, a reference voltage terminal 10, switches 11, 12,
Channel transistor 13 and diode or organic thin film E
Like the L element, it requires a constant current drive, and further includes a load 14 that performs voltage conversion according to the current, and a capacitor 15 connected in parallel to the load 14. One end of the load 14 and the capacitor 15 is connected to the power supply terminal 3, and the other end is connected to the drain of the constant current driving transistor 8. The source of the transistor 8 is connected to the ground terminal 4, and the gate is connected via the switch 11 to the gate and drain of the transistor 7 of the same conduction type as the transistor 8 (in the example of FIG. 1, an N-channel transistor). The source of the transistor 7 is connected to the ground terminal 4. The transistors 7 and 8 constitute a current mirror circuit via the switch 11. The gate and the drain of the transistor 7 are connected to the source of the source follower transistor 5 via the resistor 6. Here, the voltage generated across the resistor 6 determines the current value of the current mirror circuit formed by the transistors 7 and 8. The drain of the source follower transistor 5 is connected to the power supply terminal 3. Further, the gate of the source follower transistor 5 is the input terminal 1.

A connection point between the load 14, the capacitor 15 connected in parallel with the load 14, and the drain of the transistor 8 is:
The source of the P-channel transistor 13 is connected. The source of the transistor 13 is connected to the ground terminal 4, and the gate is connected via the switch 12 to the reference voltage terminal 1 of the reference voltage source 9.
Connected to 0. One end of the reference voltage source 9 is a power terminal 3
The other end is connected to the ground terminal 4. Switch 12
Is controlled by a control signal applied to the control terminal 2,
It operates synchronously with the switch 11 in phase.

The operation of the constant current drive circuit shown in FIG. 1 will be described with reference to the drawings.

When a signal voltage is applied to the input terminal 1, the signal voltage is converted into a current by the gate-source voltage of the transistors 5 and 7 and the resistor 6, and becomes a drain current of the transistor 7. Transistors 7 and 8 are switch 1
Since the current mirror circuit is formed through the transistor 1, a current proportional to the drain current of the transistor 7 flows through the drain of the transistor 8. The magnitude of this current is determined by the ratio of the pattern sizes of the transistors 7 and 8, for example, if the transistors 7 and 8 have the same pattern size, the drain currents of the transistors 7 and 8 will be equal. When a control signal is input to the control terminal 2 and the switch 11 is turned on, the transistor 8 drives the load 14 and the capacitor 15 connected in parallel with the load 14 at a constant current. Here, the voltage value of the load 14 when a specified current flows is V _F , and the voltage difference between the reference voltage terminal 10 and the power supply terminal 3 of the reference voltage source 9 is V _REF (hereinafter, referred to as a reference voltage).
The reference voltage V _REF is set so that the transistor 13 conducts at a value smaller by ΔV _F than the voltage V _{F of the} load 14. That is, the reference voltage V _REF is set as follows.

V _REF = V _F -ΔV _F + V _GS13 (2)

It is _assumed that the voltage between the gate and the source of the transistor 13 is _VGS13 .

When the signal voltage at the input terminal 1 and the voltage at the control terminal 2 have a relationship as shown in FIG. 2, that is, while the signal voltage at the input terminal 1 is at a high level, the control signal is applied to the control terminal 2. Upon input, the switches 11 and 12 become conductive, and supply a constant current to the load 14. At this time, when a control signal is input to the control terminal 2, the switch 12
Since a conducting state until the voltage of the capacitor 15 connected in parallel with the load 14 reaches V _F - [Delta] V _F, transient
The BR star 13 charges the capacitor 15. Since the reference voltage V _REF of the reference voltage source 9 is set to a value determined by the equation (2), after the capacitance 15 connected in parallel with the load 14 reaches the above value, the transistor 13 is turned off, 15 is charged only in the drain current of the transistor 8 constituting the cut rent mirror circuit, when the final charging voltage reaches V _F, the load 14 while the signal voltage at the input terminal 1 has occurred, the current mirror circuit Is supplied with a constant current.

In the constant current drive circuit of FIG. 1, the drain current of the transistor 8 is I ₈ , and the capacitance value of the capacitor 15 is C ₁₅
And If the transistor 13 can supply a sufficient current compared to the drain current of the transistor 8, the transistor 13 is turned on and the capacitance 15 becomes V _F -ΔV
The time until the voltage of _F becomes negligible. Accordingly, capacitor 15 is time T ₂ of the from V _F - [Delta] V _F until it reaches V _F because is charged only with a constant current of the transistor 8 is expressed as follows.

T ₂ = C ₁₅ · ΔV _F / I ₈ (3)

On the other hand, without charging by the transistor 13, when performing the charging of the capacitor 15 only by the current flowing through the current mirror circuit, the time until the charging voltage of the capacitor 15 reaches V _F When T _1, T ₁ is as follows.

T ₁ = C ₁₅ · V _F / I ₈ (4)

Therefore, by providing the transistor 13, the reference voltage source 9 and the switch 12, the load 14
From the equations (2) and (3) is reduced by ΔT as shown below.

ΔT = C ₁₅ · (V _F -ΔV _F ) / I ₈ (5)

As described above, when the capacitance is connected in parallel with the load, the rise time can be improved as shown in equation (5). Therefore, for example, when the present invention is applied as a drive circuit for an organic thin film EL element, the organic thin film EL element always has a parasitic capacitance connected in parallel with the organic thin film EL element due to its structure. As compared with the case, the rising speed is faster and the light emission response speed is improved.

FIG. 3 is a specific circuit diagram of the circuit shown in FIG. In this specific example, the drain and gate are connected to each other N-channel transistor 9 ₁ and its transistor 9
_The reference voltage source 9 is composed of the resistor 9 ₂ that determines the bias current of ₁
Is configured. Switches 11 and 12 are composed of P-channel transistors. Therefore, in this case, when a low-level control signal is input to the control terminal 2, the switch transistors 11 and 12 are turned on. Although the reference voltage source 9 in FIG. 3 shows an example of only one transistor, by the current / voltage conversion value V _F of the load 14, to may be a plurality of transistors connected,
Further, the reference voltage V _REF may be set by combining a P-channel transistor and an N-channel transistor.

FIG. 4 is another specific circuit diagram of the circuit of FIG.
is there. In the example of FIG.₁ And bias current
Setting resistor 9_Two Alone, the reference voltage V_REF Difficult to set
It may be. Therefore, the resistors connected in series with each other
9_Three And 9_Four To the reference voltage source 9 shown in the specific example of FIG.
Of the transistor 9₁ Connected in parallel to _Three 
And 9_Four At the intersection with the reference voltage terminal 9. Resistance 9_Three And 9
_Four Of the reference voltage V_REF Make the settings for

FIG. 5 is a circuit diagram of another embodiment of the present invention. In the embodiment of FIG. 1, the control signal is input to the control terminal 2 while the signal voltage of the input terminal 1 is at the high level. In the case of the embodiment of FIG. 1, the input signal is low level, a signal is input to the control terminal 2 and the switch 1
If 1 and 12 is conductive, capacitor 15 by transistors 13, is always charged to a voltage value of V _F - [Delta] V _F. The embodiment of FIG. 5 is intended to prevent the above phenomenon. As shown in FIG. 6, the control terminal 2 inputs a control signal, and while the switches 11 and 12 are conducting, the signal is input to the input terminal 1. Input, and load 14
Is driven at a constant current. In FIG. 5, a transistor 16 of the same conduction type as the transistors 7 and 8 having the gates connected to the gates of the transistors 7 and 8, the source connected to the ground terminal 4, and the drain connected to one end of the reference voltage source 9, respectively, is provided. I have. Transistor 16 forms a current mirror circuit together with transistors 7 and 8,
A bias current is supplied to the reference voltage source 9, and the transistor is turned on only when a signal is input to the input terminal 1 and at a high level. Therefore, similarly the reference voltage source 9, only the above period becomes conductive, until the voltage value of the load 14 and the capacitor 15 from this point is V _F - [Delta] V _F, to drive the current through the transistor 13.

FIG. 7 is a specific circuit diagram of the circuit of FIG. 5, constitute the reference voltage source 9 in the transistor 9 ₁ whose gate and drain are connected, a bias current of the transistor 9 ₁ is carried out in the transistor 16. Further, similarly to the specific example of FIG. 3, the switches 11 and 12 are formed by P-channel transistors. Further, as in the specific example of FIG. 3, the specific example of FIG. 7 shows an example in which only one transistor (9 ₁ ) is used. However, depending on the current / voltage conversion value of the load 14, a plurality of transistors may be connected. Alternatively, the reference voltage V _REF may be set by combining a P-channel transistor and an N-channel transistor.

FIG. 8 shows another specific embodiment of the circuit of FIG.
is there. Resistors 9 connected in series to each other _Three And 9_Four The figure
7 constituting the reference voltage source 9 shown in the specific example of FIG.
TA9 ₁ Connected in parallel to_Three And 9_Four The intersection with
The pressure terminal 9 is used. Resistance 9_Three And 9_Four Change the ratio of
Reference voltage V_REF Make the settings for

FIGS. 9 to 12 show FIGS. 3, 4, 8, and 1, respectively.
0, the FET transistors 7, 8, 9, 11, 1
Bipolar transistors 27,2 instead of 2,13
8, 29, 31, and 32 are used. Resistors 34 and 35 are connected to the bases of the transistors 31 and 32, respectively.

In the above embodiment, the power supply terminal 3
And the ground terminal 4 may be reversed.

[0035]

As described above, according to the present invention, the rise time of the current flowing through the load can be shortened, and when the present invention is applied to a drive circuit of an organic thin film EL element, the light emission response speed is improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a constant current drive circuit according to a first embodiment of the present invention.

FIG. 2 is a time chart illustrating an operation of the embodiment of FIG. 1;

FIG. 3 is a circuit diagram of a specific example of the constant current drive circuit of FIG.

FIG. 4 is a circuit diagram of another specific example of the constant current drive circuit of FIG. 1;

FIG. 5 is a circuit diagram of a constant current drive circuit according to another embodiment of the present invention.

FIG. 6 is a time chart illustrating an operation of the constant current drive circuit of FIG. 5;

FIG. 7 is a circuit diagram of a specific example of the constant current drive circuit of FIG.

8 is a circuit diagram of a specific example of the constant current drive circuit of FIG.

FIG. 9 is a circuit diagram of an embodiment corresponding to FIG. 3 using a bipolar transistor as a transistor.

FIG. 10 is a circuit diagram of an embodiment corresponding to FIG. 4 using a bipolar transistor as a transistor.

FIG. 11 is a circuit diagram of an embodiment corresponding to FIG. 7, using a bipolar transistor as a transistor.

FIG. 12 is a circuit diagram of an embodiment corresponding to FIG. 8, using a bipolar transistor as a transistor.

FIG. 13 is a circuit diagram of a conventional example of a constant current drive circuit.

FIG. 14 is a diagram showing a cross-sectional structure of an organic thin-film EL element.

[Explanation of symbols]

1 input terminal 2 control terminal third power supply terminal 4 ground terminal 5 the source follower transistor 6 resistance 7,8,13,27,28,33 transistor 9 reference voltage source 9 _1, 29 ₁ transistor 9 _2, 9 _3, 9 ₄ resistance 10 Reference voltage terminal 11, 12 Switch 14 Load 15 Capacity 16, 36 Transistor

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03K 17/00-17/70

Claims (9)

(57) [Claims] 1. A constant current driving circuit for driving a load for performing current / voltage conversion at a constant current, comprising: a constant current driving circuit connected in series with the load between a high potential power supply and a low potential power supply. A first FET transistor of one conductivity type; a capacitor connected in parallel with the load; a first switching element; and a gate connected to the first FET transistor via the first switching element; And a drain connected to the first FET transistor and a second FET transistor of a first conductivity type forming a current mirror circuit, and connected in series to the second FET transistor between a high potential power supply and a low potential power supply. A third FET transistor having a gate to which an input signal is applied; a resistor connected between the second FET transistor and the third FET transistor; A fourth FET transistor of a second conductivity type opposite to the first conductivity type and connected in parallel with the transistor, a reference voltage source connected between the high potential power supply and the low potential power supply, A second switching element provided between the gate of the fourth FET transistor and a reference voltage terminal of the reference voltage source, the second switching element being turned on / off in synchronization with the first switching element; A constant current drive circuit in which a reference voltage at a voltage terminal is set to be smaller than a sum of a prescribed voltage value obtained by performing a current / voltage conversion by the load and a voltage between a gate of a fourth FET transistor and an electrode on the load side; . A second FE connected between the high-potential power supply and the low-potential power supply in series with the reference voltage source;
The constant current drive circuit according to claim 1, further comprising a fifth FET transistor of a first conductivity type connected to the gate of the T transistor and the gate of the first FET transistor via the first switching element. 3. The reference voltage source includes a transistor having a drain and a gate connected to each other and a resistor connected in series to the transistor, and a connection point between the transistor and the resistor is used as a reference voltage terminal. 3. The constant current drive circuit according to 1 or 2. 4. The reference voltage source is connected in series with each other between a source and a drain of the transistor, a transistor having a drain and a gate connected to each other, a first resistor connected in series with the transistor. 3. The constant current drive circuit according to claim 1, wherein the constant current drive circuit includes second and third resistors, and a connection point between the second and third resistors is used as a reference voltage source terminal. 5. A constant current driving circuit for driving a load for performing current / voltage conversion at a constant current, comprising a constant current driving circuit connected in series with the load between a high potential power supply and a low potential power supply. A first bipolar transistor of a first conductivity type; a capacitor connected in parallel with the load; a first switching element; the first bipolar transistor and the base connected via the first switching element; A second bipolar transistor of a first conductivity type having a base and a collector connected and forming a current mirror circuit with the first bipolar transistor; and a serially connected to the second bipolar transistor between a high potential power supply and a low potential power supply A third bipolar transistor connected to the base and having an input signal applied to the base; and between the second bipolar transistor and the third bipolar transistor. A connected resistor, a fourth bipolar transistor of a second conductivity type opposite to the first conductivity type and connected in parallel with the first bipolar transistor, and between a high potential power supply and a low potential power supply. A second switching element provided between the base of the fourth bipolar transistor and a reference voltage terminal of the reference voltage source, and turned on / off in synchronization with the first switching element. Wherein the reference voltage at the reference voltage terminal of the reference voltage source is a sum of a prescribed voltage value obtained by current / voltage conversion by the load and a voltage between the base of the fourth bipolar transistor and the electrode on the load side. Constant current drive circuit that is also set small. 6. A first bipolar transistor connected in series with the reference voltage source between the high potential power supply and the low potential power supply, the base of which is connected to the base of the second bipolar transistor and the first switching element. 6. The constant current drive circuit according to claim 5, further comprising a fifth bipolar transistor of the first conductivity type connected to the base of said first transistor. 7. The reference voltage source includes a bipolar transistor having a collector and a base connected to each other and a resistor connected in series to the transistor, and a connection between the transistor and the resistor is used as a reference voltage terminal. 7. The constant current drive circuit according to 5 or 6. 8. The reference voltage source is a bipolar transistor having a collector and a base connected to each other, a first resistor connected in series to the transistor, and a series connected to each other between an emitter and a collector of the transistor. 7. The constant current drive circuit according to claim 5, wherein said constant current drive circuit comprises second and third resistors, and a connection point between said second and third resistors is used as a reference voltage source terminal. 9. The constant current drive circuit according to claim 1, wherein said load is an organic thin film EL device.