JP3131995B2 - Signal processing method using first-order IIR digital filter - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing system using a primary IIR digital filter, and in particular, digitizes an analog signal, processes the signal with a digital filter on a microcomputer, and returns the analog signal. The present invention relates to a signal processing method using a first-order IIR digital filter for reproducing a signal.

[Conventional technology]

As shown in FIG. 8, the basic form of a digital signal processing system for converting an analog signal from a control target into a digital signal, performing digital processing, and converting the analog signal again is an analog signal U _d (t ) Is sampled and A / D-converted, and a hold circuit 4 for D / A-converting the digitally converted signal a and reproducing the analog signal u (t). When performing signal processing with the configuration of FIG. 8, the analog signal U _d output from the object 1
In order to accurately approximate (t) in the frequency domain, it is necessary to make the sampling interval of the sampler 2 small.

If the frequency characteristics of the analog signal from the object 1 cannot be accurately approximated by the configuration of FIG. 8 due to the limitation of the sampling interval, a digital filter is provided between the sampler 2 and the hold circuit 4 as shown in FIG. 3 must be designed and inserted. The digital filter 3 is a circuit that performs filtering on the digital conversion signal a using a basic operation element such as a digital adder, a multiplier, and a shift register. The filtered digital output signal b is D / A-converted by the hold circuit 4 and returned to the analog signal u (t), thus completing the signal processing.

[Problems to be solved by the invention]

In the digital signal processing method described above, in order to accurately reproduce an analog signal from an object in the frequency domain, if the sampling interval is reduced in the configuration of FIG. 8, the calculation time increases, and the sampler and the hold circuit require high precision. However, it is necessary to use a high-order hold circuit, which is disadvantageous in that the hardware cost increases. Furthermore, when the hold circuit is of a higher order, the transfer function of the hold circuit is complicated, and there is a drawback that the stability of the circuit cannot be guaranteed depending on the transfer function of the object or the type of output signal thereof.

On the other hand, when a digital filter as shown in FIG. 9 is used, it is sufficient to design a digital filter that can completely reproduce an analog signal by canceling the transfer function of the synthesis of the sampler and the hold circuit. . However, it is impossible to realize such an ideal digital filter. In reality, the output of the sampler is directly input to the digital filter, and the characteristics similar to the analog signal output from the target object are held. Until the output is obtained, the design is repeated by trial and error while changing the configuration of the transfer function of the digital filter and the tap coefficient, resulting in a disadvantage that a great deal of man-hours are required. Furthermore,
Since the tap coefficient of the filter depends on the sampling interval depending on the order and configuration of the filter, there is a disadvantage that the stability of the circuit is not guaranteed.

An object of the present invention is to provide a signal processing method using a first-order IIR digital filter, which can easily obtain an accurate approximation with a small number of steps.

[Means for solving the problem]

A signal processing method using a first-order IIR digital filter according to the present invention comprises a sampler that samples an analog signal, converts the sampled signal into a digital signal, and outputs the sampled signal; a delay element; and first and second adders disposed before and after the delay element. A signal processing system using a primary IIR digital filter including a first-order IIR digital filter for performing arithmetic processing on a digital input signal and a zero-order hold circuit for converting an output thereof to an analog signal. Tap coefficient c ₀ between the input of the digital filter and the first adder
And the tap coefficient c ₁ between the input and the second adder is given by c ₀ = (α ₁ +3) with respect to the tap coefficient α ₁ between the output of the delay element and the first adder. ) / 2, c ₁ = (α ₁ −1) / 2, and the tap coefficient α ₁ is set to | α ₁ | <1.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention.

A signal processing method using a primary IIR digital filter shown in FIG. 1 is a sampler 2 for A / D converting an analog signal U _d (t) output from an object 1 at a sampling interval T, and a digital conversion signal a. And a zero-order hold circuit 4 for D / A converting the digital output signal b and outputting an analog signal u (t). Primary IIR digital filter 3a
Is a first-order recursive digital filter (InfInite Recursiv digital filter) having one delay element, two adders, and three tap coefficients as shown in FIG. As shown also, it is selected so that the relationship of the following equation (1) is established.

Hereinafter, the reason why each tap coefficient of the first-order IIR digital filter 3a is selected as in equation (1) will be described.

In order for the digital filter to have good characteristics, when the output of the sampler 2 is directly connected to the digital filter, the analog signal U _d (t) of the output of the object 1 and the analog signal u (t) of the output of the hold circuit 4 ) Should satisfy the relationship of the expression (2).

u (t) = U _d (t) (2) Here, in order to obtain the tap coefficients of the primary IIR digital filter 3a, first, a non-recursive digital filter (FInite Recursive digital filter: hereinafter) shown in FIG. FI
A method for analytically obtaining the limit characteristic of 3c (referred to as an R digital filter) will be described in detail.

After the analog signal U _d (t) has been subjected to the signal processing shown in FIG. 3, the analog signal u ₀ (t) reproduced from the hold circuit 4 has the number of delay elements β and the sampling interval T
And at kT ≦ t <(k + 1) T, Can be expressed as

Further, the pulse transmission function of the FIR digital filter 3c is D _β
(Z) Becomes However, It is.

Document "System and Control" Vol.29, No.4, pp259-267 (19
58) "Digital control rules for continuous time meter"
Tap coefficient α of FIR digital filter 3c in FIG.
_{If r} is made to correspond to the coefficient of the Adams-Bashforth method, which is one of the numerical integration methods of the ODE shown in FIG. 4, the number of delay elements of the FIR digital filter 3c becomes Adams-Bashforth
It corresponds to the number of steps β in the modulus.

On the other hand, there is a relationship shown in FIG. 5 between the number of stages β of the Adams-Bashforth method in the numerical calculation method and the calculation accuracy.
Therefore, if attention is paid to the fact that the greater the β, the better the accuracy, the FIR digital filter of β → ∞ can be expected to be as close as possible to an analog signal.

The pulse transfer function of the FIR digital filter having the number of delay elements β is Z = e ^jωT (j is a complex number), and D _β (e
^{j ωT} ) by (1−e ^jωT ), when β = 2, If β = 3, When it ^{comes to} the power of (1- ^ejωT ), Adams
-The coefficients appear when the Bashforth method is expressed in the backward difference format.

By analogy with the above example, the pulse transfer function of the FIR digital filter of β → ∞ is It can be expressed as. However, It is. Here, returning to the derivation method of the numerical calculation algorithm of the Adams-Bashforth method and comparing with the expression (5), D (e
^jωT ) is defined as a generating function that gives the coefficient ε _m of the Maclaurin expansion, and using the generalized binomial theorem ^{instead of} t = (1-e ^jωT ), equation (5) becomes Is a simple definite integral of. Here, if (1-t) ^-r = exp [-rlog _e (1-t)],
Equation (7) is Becomes When the replaced t is returned and arranged, the frequency response of the FIR digital filter in the case of β → ∞ is Can be obtained analytically. Furthermore, when deformed, This is a linear phase filter having amplitude sin (ωT / 2) / ωT / 2 and phase (ωT / 2).

On the other hand, if the hold circuit, which is a D / A converter, is of zero order and its transfer function is H (jω), It is. As shown in FIG. 3, since the FIR digital filter 3c and the hold circuit 4 are always cascaded, e ^{(−jωT / 2) in the} equation (11) and e in the equation (10) are used.
^{(JωT / 2)} is always canceled. Therefore, the phase shift due to the signal processing is only the phase of the sampler 2.

FIGS. 6 and 7 show an analog signal from a target object as U.
_d (t) = e- ^t , and when the sampling time is 0.5 sec,
FIG. 4 is a Bode diagram showing frequency characteristics when the digital processing shown in FIG. 3 is performed. The horizontal axis in the figure is frequency, the vertical axis is gain (dB) in FIG. 6, and the phase (deg) in FIG. The curve for β = 1 is an analog signal u ₀ (t) reproduced when digital signal processing is performed in the basic form shown in FIG.
FIG. 3 shows the frequency characteristic of the curve of β = 2 and β = 3.
Analog signal u ₀ when using FIR digital filter
The frequency characteristic of (t), β → ∞, is an analog signal u corresponding to the limit characteristic of the FIR digital filter shown in FIG.
_This is the frequency characteristic of ₀ (t).

In the gain diagram of FIG. 6, the curve of β = 1 approximates the original analog signal relatively well, and it seems that the frequency band can be widened, but the phase characteristic is considerably deteriorated. On the other hand, when an FIR digital filter is inserted, the gain characteristic is slightly deteriorated in the high frequency band as compared with the digital signal processing method of β = 1 in FIG. However, when the sampling frequency is ω _s (= 1 / T), the frequency band 0
<Omega <because not be practically used outside omega _s, in the range seen to be improved characteristics by inserting a large FIR digital filter beta.

In view of the above, it is considered that the limit characteristic of the β → ∞ FIR digital filter expressed by the equation (9) that realizes a good frequency characteristic is constituted by a first-order IIR digital filter. The pulse transfer function of a first-order IIR digital filter is Given by Here, Z = ^ejωT . Therefore, if equation (9) and equation (12) are equal, I can go. By transforming equation (13), D (e ^jωT ) is expanded into a Tiller series by the product ωT of the frequency ω and the sampling interval T. c ₀ + c ₁ Z ⁻¹ = (c ₀ + c ₁ ) −c ₁ (jωT) + 1 / 2c ₁ (jωT) ² + R _b [(jωT) ³ ] (15) However, since j is a complex number, j There is a relation of ² = -1.
R _a [(jωT) ³ ] and R _b [(jωT) ³ ] are jωT
This is the term after the third power of.

Comparing the coefficients up to the first order term of jωT using α ₁ as a free parameter, c ₀ + c ₁ = (α ₁ +1) (16) −c ₁ = (− α ₁ +1) / 2 (17) ). Solving the simultaneous equations of equations (16) and (17) yields the following relational expression: c ₀ = (α ₁ +3) / 2 (18) c ₁ = (α ₁ -1) / 2 (19) . In order for the filter to be stable, it is necessary and sufficient that the pole of the equation (12) be present in the unit circle, and thus | α ₁ | <1 (20)

As a special example satisfying the range of Expression (20), α ₁
= 0, the second order (β =
It can be seen that the FIR digital filter 3b having the tap coefficient of the Adams-Bashforth method of 2) is easily realized.

〔The invention's effect〕

As described in detail above, the signal processing system using the primary IIR digital filter according to the present invention uses a primary IIR digital filter having a relatively simple configuration between the sampler and the hold circuit, and uses a predetermined tap coefficient as a predetermined value. By setting the relationship, it is possible to approximate the limit (β → ∞) frequency characteristic in which the number of delay elements of the FIR digital filter whose tap coefficient is determined by the numerical calculation algorithm of the Adams-Bashforth method is increased. This first-order IIR digital filter can determine all tap coefficients with one parameter (α ₁ ), and the order of the digital filter,
It is not necessary to determine the circuit configuration and the combination of tap coefficients by trial and error, and it is possible to design a filter that can easily guarantee stable operation according to the signal form from the object, so that the number of design steps can be significantly reduced. There is. Further, when the parameter alpha ₁ for determining the tap coefficient is 0, secondary Adams-B
An FIR digital filter having tap coefficients of the ashforth method can be easily configured. Further, there is an effect that the filter characteristic can be easily changed by moving one parameter.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention, FIG. 2 is a block diagram in a case where a tap coefficient α1 is set to 0 in FIG. ₁ , and FIG. 3 is a signal processing using an FIR digital filter. FIG. 4 is a diagram illustrating the relationship between the tap coefficients of the FIR digital filter and the coefficients of the Adams-Bashforth method. FIG. 5 is a diagram illustrating the relationship between the number of delay elements of the FIR digital filter and the calculation accuracy. FIG. 6 is a characteristic diagram showing a gain-frequency relationship when an FIR digital filter is used, FIG. 7 is a characteristic diagram showing a phase-frequency relationship, and FIG. 8 shows a basic configuration of a conventional digital signal processing system. FIG. 9 is a block diagram of a general digital signal processing system using the digital filter of FIG. 1. Target object 2. Sampler 3. Digital filter 3a Primary IIR digital filter 3b Secondary FIR digital filter 3c FIR digital filter 4. Hold circuit.

Continuation of the front page (58) Fields investigated (Int.Cl. ⁷ , DB name) H03H 17/04 633 H03H 17/04 655 H03H 17/02 655 JICST file (JOIS) Practical file (PATOLIS) Patent file (PATOLIS)

Claims (1)

(57) [Claims] 1. A sampler which samples an analog signal, converts the sampled signal into a digital signal, and outputs the digital signal. The sampler has one delay element and first and second adders arranged before and after the delay element, and calculates a digital input signal. In a signal processing method using a primary IIR digital filter including a primary IIR digital filter for performing processing and a zero-order hold circuit for converting an output thereof to an analog signal, an input of the primary IIR digital filter and the first addition are performed. Tap coefficient between the container
Let c ₀ and the tap coefficient c ₁ between the input and the second adder be c ₀ = (α) with respect to the tap coefficient α ₁ between the output of the delay element and the first adder. ₁ +3) / 2, c ₁ = (α ₁ −1) / 2, and a tap coefficient α ₁ is set to | α ₁ | <1, a signal processing method using a primary IIR digital filter.