JP3129810B2 - Image recording apparatus and image recording method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image recording apparatus and an image recording method for recording an image on a drum.

[0002]

2. Description of the Related Art FIG. 8 shows a conventional image recording apparatus. In this image recording apparatus, an output film (printing paper) 82 is wound around a drum 81 and fixed, and then, while rotating the drum 81, a light beam is emitted from the exposure head 83 onto the film 82, and a dot image 84 is formed. Is exposed.

[0003] Exposure control in this image recording apparatus is performed as follows. The input image data IMA is stored in the line memory unit 86 corresponding to several rounds (several lines) of the drum 81 while being controlled by a signal from the write clock circuit 85. Next, image data for one pixel is sequentially read out for each pulse of the read clock signal RCL, and sent to the dot generation circuit 87 as output image data OUT. The output image data OUT is converted into a dot signal DOT by a dot generation circuit 87, and a light beam is output from the exposure head 83 according to the dot signal DOT.

Here, the read clock signal RCL is formed by a signal (hereinafter, referred to as an encoder signal) output from an encoder 88 attached to the rotating shaft of the drum 81, and the encoder signal, that is, the drum 81
Is synchronized with the rotation of First, an encoder 88 generates an encoder signal (for example, 1000 pulses per rotation of the drum 1) PU corresponding to the angular position of the drum 81, and outputs this encoder signal to a phase locked loop (PL).
L) Multiply by the circuit 89. The multiplied pulse signal is used as the read clock signal RCL.

Therefore, in this image recording apparatus,
A clock signal RCL, which is a timing for recording an image on the film 82 wound around the drum 81,
Since it is formed by a pulse signal generated in synchronization with one rotation, even if the rotation speed of the drum 81 fluctuates during image recording, an image without distortion can be recorded on the film 82.

[0006]

However, there is a misalignment between the rotating shaft of the drum 81 and the rotating shaft of the encoder 88 itself, and the slit spacing of the encoder 88 is strictly non-uniform (for an encoder using a photo-interrupter). Case). Further, the drum 81 itself may be eccentric. Therefore, even if the clock signal RCL is synchronized with the encoder signal PU from the encoder 88 attached to the rotating shaft of the drum 81, the image 84 exposed on the film 82 has a periodic Distortion (distortion determined by the position of the drum in the rotation direction) occurs.

[0007] Such a distortion is not particularly problematic in a normal image, but causes unacceptable line distortion in a high-definition image. Particularly, in the case of multi-color simultaneous exposure used for color plate making, at least two color plates (for example, a Y plate and an M plate) are formed by separating one original image in the rotation direction of the drum 81. If distortion occurs in the encoder signal PU with respect to the angular position, there is a serious problem that color shift occurs during overprinting.

It is an object of the present invention to electrically correct mechanical errors of an encoder and the like, particularly in a color scanner or the like, and to prevent distortion of a recorded image.

[0009]

According to a first aspect of the present invention, there is provided a drum on which an image recording medium is mounted and which rotates around a rotary shaft, and which is connected to the rotary shaft of the drum and rotates with the rotation of the drum. Pulse signal generating means for generating a pulse signal, image recording means for performing image recording on the image recording medium, image recording signal providing means for providing an image recording signal to the image recording means in synchronization with a dot clock, Rotation position detection means for detecting the rotation position of the drum from a pulse signal generated by the pulse signal generation means, and dot clock generation data for generating a dot clock whose frequency is corrected in accordance with the rotation position of the drum Clock generation data generation means for generating the rotation of the drum according to the rotation position of the drum detected by the rotation position detection means; Based on the formation data, and a dot clock generating means for generating a dot clock frequency corresponding to the rotational position of the drum is corrected by the pulse signal, the dot clock generated data generating means
Is the rotational position of the drum detected by the rotational position detecting means.
The dot clock creation data is stored in association with
It is a storage means .

According to a second aspect of the present invention, in the first aspect of the invention, the dot clock generating means is a multiplying circuit for multiplying the pulse signal to output a clock signal, and the dot clock generating data is It is a multiplication ratio set in the multiplication circuit.

[0011] The invention of claim 3 is an image recording method for recording an image using an image recording apparatus according to claim 1, the plurality of patterns based on certain of the dot clock generated data First recording on the image recording medium
And a second step of measuring a distance between the plurality of patterns recorded on the image recording medium; and obtaining dot clock creation data to be stored in the storage unit based on the distance between the plurality of patterns. The method further comprises a third step of storing the data in the storage means, and a fourth step of recording an image by using the dot clock creation data stored in the storage means.

[0012]

1 is a block diagram of an image recording apparatus according to the present invention and a read clock signal generating circuit 10 thereof.

An encoder 8 for generating one pulse for every predetermined angle of rotation is attached to a rotating shaft of the drum 1 around which the film 2 for recording an image is wound.
Outputs an encoder signal PU that generates 1000 pulses per rotation of the drum and an origin pulse signal ST that generates one pulse per rotation of the drum. The clock signal generation circuit 10 generates a clock signal RK that is a timing for recording an image on the film 2 based on the encoder signal PU and the origin pulse signal ST.

The clock signal generating circuit 10 comprises a PLL circuit 9, a region dividing circuit 18, a data set unit 25, and a frequency dividing circuit 11.

The PLL circuit 9 includes a phase comparator 21, a low-pass filter 22, a voltage-frequency converter 23, and a frequency divider 15
And outputs a pulse signal obtained by multiplying the encoder signal PU. In this case, the frequency division ratio of the PLL circuit 9 can be switched by changing the frequency division ratio of the frequency divider 15, that is, the frequency of the pulse signal output from the PLL circuit 9 can be switched.

The frequency divider 15 divides the frequency based on the data given to the setting terminals P0 to P9. For example, when data “512” (binary number 100000000000) is given to the setting terminals P0 to P9, the frequency divider 15
Divide the frequency by half. That is, the voltage frequency converter 23
The pulse signal output from is divided by a factor of 512 and output to the phase comparator 21. Note that the frequency divider 15 is supplied with the origin pulse signal ST from the encoder 8, and the frequency divider 1
5 is reset so as to be a rising signal or a falling signal at the origin position.

The setting terminal P9 (most significant bit) of the frequency divider 15 is supplied with "1", and the setting terminal P8 is supplied with "0". Data (D1 to D4) from the data selector 16 is given to the setting terminals P7 to P0. Therefore, by changing the data from the data selector, the frequency divider 15
(When "00000000" is given as data) to 767
It can be made to function as a frequency divider that gives an arbitrary frequency division ratio up to 1 / (when “11111111” is given as data).

When the frequency divider 15 is operated as a 1 / N frequency divider, the frequency divider 15 outputs a pulse signal having a frequency 1 / N of the input pulse signal. It will be.

For example, when the encoder signal PU is 10 kHz
At z, the frequency division ratio of the frequency divider 15 is 1/6, which is the standard frequency division ratio.
40 (that is, “1000” is set to the setting terminals P7 to P0).
0000 "), the output of the PLL circuit 9 is 6.4M
Stabilizes at Hz. This output is divided by the frequency divider 11 into 1
It is divided by / 10 to become a clock signal RK of 640 kHz. If the frequency division ratio of the frequency divider 15 is 1/641 (that is, if “10000001” is given to the setting terminals P7 to P0),
The output of the PLL circuit 9 stabilizes at 6.41 MHz. Therefore, the clock signal RK is 641 kHz. Thus, the frequency of the clock signal RK can be changed at intervals of 1 kHz by changing the data supplied to the setting terminals P7 to P0 of the frequency divider 15.

The area dividing circuit 18 includes a frequency dividing circuit 19 and a counter 20. The frequency dividing circuit 19 divides the frequency of the encoder signal PU by 1/250, and outputs four pulses during one rotation of the drum 1. Is output to the counter 20. In the counter 20, the pulse signal B
The number of U pulses is counted, and the count value is output to the data set unit 25 as divided signals DIV1 and DIV2 (2 bits). Therefore, the divided signals DIV1,
By DIV2, one rotation of the drum 1 can be divided into four regions R1, R2, R3, R4 as shown in FIG. The frequency division in the frequency dividing circuit 19 is performed in synchronization with the origin pulse signal ST, and the counter 20 is reset by the origin pulse signal ST. FIG. 3 shows a time chart of these signals.

The data setting section 25 is composed of a preset switch 17 and a data selector 16. When the operator operates the preset switch 17, the frequency dividing circuit 15 corresponding to each of the four regions R1, R2, R3, R4 is provided. Division ratio D1, D2, D3, D4
Is set in the data selector 16. Note that the division ratio D1,
How to determine D2, D3, and D4 will be described later.

When the drum 1 rotates as described above, the combination of the divided signals DIVI1 and DIV2 from the area dividing circuit 18 determines that "L, L", "H,
L, "L, H" and "H, H" are generated, and the data selector 1
The frequency division ratios D1, D2, D3, and D4 of 6 are selected and output to the frequency divider 15. Accordingly, the frequency division ratio of the frequency divider 15 changes to D1, D2, D3, and D4 depending on the rotational position of the drum 1, so that the multiplication ratio of the PLL circuit 9 is also E1, E2, E3.
It will change to E4.

An output signal from the PLL circuit 9 is frequency-divided by a frequency dividing circuit 11 having a fixed frequency dividing ratio, and is output as a clock signal RK to the line memory unit 6 and the halftone dot generating circuit 7.

As described above, the frequency of the clock signal RK can be switched during one rotation of the drum by switching the frequency division ratio of the frequency divider 15.

The data for one line of the image data IMA is stored in a line memory unit 6 capable of storing image data for several lines in synchronization with a signal from the write clock circuit 5. Next, one pixel of image data is output image data OU for each pulse of the clock signal RK.
It is output to the dot generation circuit 7 as T. The output image data OUT is converted into a dot signal DOT by a dot generation circuit 7, and a light beam is output from the exposure head 3 to the film 2 according to the dot signal DOT.

The read clock signal generating circuit 10 shown in FIG.
Is used, for example, by being incorporated in the image data exposure apparatus of FIG.

Reference numeral 50 in FIG. 4 denotes a central processing unit (CPU) for controlling the dot generation circuit 7 and the like. The CPU 50
Further controls the drum 1 and its peripheral devices via an input / output port ($ / 0) 52 and drivers 53, 54, 55. Reference numeral 51 is a memory for the CPU 50, and reference numeral 56 is an input key.

Next, the periphery of the drum 1 will be described. Reference numeral 57 denotes a motor for rotating the drum 1, and reference numeral 58 denotes a suction device for sucking and holding the film 2 on the drum 1. Reference numeral 59 denotes a lift device for bringing the film 2 into contact with the drum 1 one by one, and reference numeral 60 denotes a drive motor of the lift device 59.

FIG. 6 is a sectional view of the lift device 59. The lift device 59 includes a bottom plate 63 of a cassette 62 that rotates around a fulcrum 61 and an eccentric cam 64 that pushes the ends of the plurality of films 2 from below through the bottom plate 63. Therefore, the eccentric cam 64 can be rotated by the rotation of the drive motor 60, and the tip of the uppermost film 2 can be brought into close contact with the surface of the drum 1.

Next, the method of using the above-described apparatus will be described by dividing it into a setting mode for setting correction data of a read clock signal and an output mode for performing normal film exposure using the apparatus.

[Setting Mode] First, a read clock signal for each area is set by the following procedures (1) to (4). Step of winding the film around the drum First, the drum driving motor 57 is driven to rotate the drum 1 at low speed. The rotation angle of the drum 1 is detected by an encoder 8 built in a motor 57. Drum 1
Is output, the CPU 50 outputs a stop signal to the motor 57, and the drum 1 stops. Next, the lift device 59
Then, the bottom plate 63 on which the film 2 is placed is raised, and the tip of the uppermost film 2 is brought into contact with the drum 1.

Subsequently, the suction device 58 is operated to operate the film 2.
Is adsorbed to the drum 1 and the lift device 59
Is lowered. The film 1 is wound around the drum 1 by rotating the drum 1 at low speed while operating the suction device 58, and the film 2 is fixed by suction.

Test pattern exposure The operator outputs a test signal SEL for instructing the CPU 50 to perform test pattern exposure by using the input keys 56. As a result, the drum 1 rotates at a low speed, the test pattern data is read from the test pattern memory 13 in synchronization with the read clock signal RK, and the exposure head 3 forms a grid of horizontal lines 31 and vertical lines 32 as shown in FIG. The test pattern 30 and the divided area mark 33 are exposed on the film 2. At this time, the multiplication ratio of the PLL circuit 9 is set to the same value in each region, for example, 640 times.

After the exposure, the linear density of the horizontal line 31 of the grid of the test pattern 30 on the film 2 obtained by development is measured for each of the regions R1, R2, R3, and R4. , And the multiplication ratios E1, E2, E3, and E4 of the PLL circuit 9 that minimize the difference are calculated. For example, if the linear density of the test pattern in the circumferential direction of the drum is lower than the reference, the test pattern is made larger than the standard multiplication ratio (640 times) to increase the number of pulses of the clock signal RK (increase the frequency) in that area. . Conversely, when the linear density is higher than the reference, the frequency is made smaller than the standard multiplication ratio (640 times) to reduce the number of pulses (lower frequency) of the clock signal RK generated in that region.

The frequency division ratio D of the frequency divider in the PLL circuit 9
Setting of 1, D2, D3, D4 The frequency division ratios D1, D2, D3, D4 are calculated according to the multiplication ratios E1, E2, E3, E4 determined above. The frequency division ratio can be set, for example, in the range of 1/512 to 1/767, and the preset switch 17 sets a corrected frequency division ratio for each area.

After setting the correction value, the test pattern may be exposed again to check whether there is any distortion, and the operation of further correcting the correction data may be repeated. Note that the setting mode is for correcting errors in the components (encoder) of the apparatus and in manufacturing and assembling. Once the correction is made, basically no subsequent readjustment is necessary.

[Output Mode] Next, a normal exposure process is performed using the device corrected as described above.

The exposure processing is performed in substantially the same manner as in the conventional method, including the step of winding the film around the drum. That is, a halftone signal is generated based on the image data IMA, and the exposure head 3 irradiates the film 2 with a light beam. In that case, the clock signal RK changes for each region as described below.

That is, the data selector 16 outputs the area signal D
Data D1, D2, D3 according to IV1, DIV2
, D4 are sequentially selected and output to the setting terminal of the frequency divider 15. For example, when the area signal indicates the area R1, the data D1 set by the first switch is selected, and when the area signal indicates the area R2, the data D2 set by the second switch is selected and output. As a result, the frequency divider 15 divides the frequency by the frequency division ratio according to the data, and the PLL circuit 9 outputs a pulse signal having a multiplication ratio suitable for the data as described above. Therefore, the encoder signal PU is multiplied by the PLL circuit 9 corresponding to each of the regions R1, R2, R3, and R4. Further, the frequency is divided by the frequency divider 11 into 1/10. The read clock signal RK thus corrected
Is obtained. The reading of the image data and the generation of the halftone signal are sequentially performed by the corrected clock signal RK.

Next, another embodiment of the present invention will be described with reference to FIG.

The apparatus shown in FIG. 7 divides one rotation of the drum into a larger number of areas, and changes the read clock according to correction data for each area.

That is, instead of the data set section 25 in the apparatus of FIG. 1, a large number of correction data (frequency division ratios) are stored and a read-only memory (RO
M) 71 is used. Further, the encoder signal PU is set to 1
10 bits (1
Area division counter 7 for counting up to 024 pulses)
2 is used. In this case, the upper 6 bits of the 10-bit output port are used, and the count value CT (0 to 63) is output to the ROM 71.

The ROM 71 uses the count value CT as an address to store the frequency division ratio data in the frequency divider 15 of the PLL circuit 9.
Output to Therefore, as in the embodiment of FIG. 1, the multiplication ratio of the PLL circuit 9 is switched according to the rotational position of the drum 1.

Further, a one-shot multivibrator is used as the test pattern generating circuit 73. The signal from the lower fourth bit output terminal of the area division counter 72 is passed to the test pattern generation circuit 73. Therefore, a test pattern consisting of one horizontal line can be directly exposed on the test film 2 with respect to the encoder signal PU of 8 pulses. Also in this case, by measuring the positions of the horizontal lines on the exposed film and the distance between the horizontal lines, the error of the encoder signal PU is measured, and the multiplication ratio to be set in the PLL circuit 9 is obtained for each desired region. Can be.

Reference numerals 74 and 75 in FIG. 7 denote a changeover switch for switching between a normal operation and a test operation and a drive source thereof. In the normal operation, the image data IMA is recorded on the film 2 in synchronization with the clock signal RK. During the test operation, a test pattern is recorded on the film 2 based on the encoder signal PU.

[0046]

According to the present invention, the dot clock can be switched in accordance with the rotational position of the drum.
Even if there is an error in the pulse signal generated from the encoder due to a mechanical factor such as a deviation between the rotation axis of the drum and the rotation axis of the encoder itself, an image without distortion can be recorded.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a clock signal generation circuit according to the present invention.

FIG. 2 is an explanatory diagram showing an example of a section of a drum according to the present invention.

FIG. 3 is a time chart illustrating the operation of the divided signal generation circuit of FIG. 1;

FIG. 4 is a block diagram showing an embodiment of the image recording apparatus of the present invention.

FIG. 5 is an explanatory diagram showing an example of image data output on a film according to the present invention.

FIG. 6 is a side sectional view of the lift device in FIG. 4;

FIG. 7 is a block diagram showing another embodiment of the image recording apparatus of the present invention.

FIG. 8 is a block diagram illustrating an example of a conventional image recording apparatus.

[Explanation of symbols]

 Reference Signs List 1 drum 2 film 3 exposure head 8 encoder 9 PLL circuit 13 test pattern memory 15 frequency divider 16 data selector 17 preset switch 18 area dividing circuit 21 data set section 71 ROM 72 area dividing counter 73 test pattern generating circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 1/23-1/31 H04N 1/04-1/207

Claims (3)

(57) [Claims] 1. A drum on which an image recording medium is mounted and which rotates around a rotation axis; pulse signal generation means connected to a rotation axis of the drum to generate a pulse signal in accordance with rotation of the drum; Image recording means for performing image recording on a recording medium; image recording signal providing means for providing an image recording signal to the image recording means in synchronization with a dot clock; and the drum from a pulse signal generated by the pulse signal generating means. Rotation position detection means for detecting the rotation position of the drum; and rotation of the drum detected by the rotation position detection means, the dot clock generation data for generating a dot clock whose frequency is corrected in accordance with the rotation position of the drum. Means for generating dot clock generation data generated in accordance with the position; and a rotation position of the drum based on the dot clock generation data. The dot clock frequency is corrected in response to and a dot clock generation means for generating from said pulse signal, the dot clock generated data generating means, said rotation position
In relation to the rotational position of the drum detected by the position detection means.
An image recording apparatus, which is storage means for storing dot clock creation data . 2. The dot clock generating means is a multiplying circuit for multiplying the pulse signal to output a clock signal, and the dot clock generating data is a multiplication ratio set in the multiplying circuit. The image recording apparatus according to claim 1. 3. An image recording method for recording an image using the image recording apparatus according to claim 1 , wherein a plurality of patterns are recorded on the image recording medium based on constant dot clock creation data. A first step, a second step of measuring a distance between a plurality of patterns recorded on the image recording medium, and dot clock creation data to be stored in the storage means based on the distance between the plurality of patterns. And a fourth step of recording the image using the dot clock creation data stored in the storage unit. Recording method.