JP3123834B2 - Spread spectrum communication system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum communication system.

[0002]

2. Description of the Related Art Conventionally, a carrier signal modulated with, for example, a binary pseudo-noise code (PN code) having a spectrum width sufficiently wider than that of an information signal has been transmitted. The so-called spread spectrum communication for demodulating the original information signal by multiplying the received signal by the same code as the PN code is well known (for example, Electronics Science 1).
(See the November 978 issue).

[0003] Information signals are often subjected to digital modulation from the viewpoint of transmission efficiency and the like, and many modulation schemes that can perform quadrature synchronous detection on the receiving side have been proposed.

[0004]

As described above, when an information signal is digitally modulated, a circuit for reproducing a carrier signal is required to demodulate the information signal on the receiving side. However, in order to reproduce a carrier signal from the digitally modulated signal, a complicated circuit such as a Costas loop circuit is required, and there has been a problem that the configuration of the receiver becomes complicated.

[0005]

SUMMARY OF THE INVENTION In view of the above, the present invention provides first clock generating means for generating a reference clock signal, frequency dividing means for dividing the clock signal from the first clock generating means, First PN code generating means for generating a PN code having an output signal of the frequency dividing means as one chip, and digitally modulating the carrier signal according to input data using a clock signal from the first clock generating means as a carrier signal Digital modulating means for converting the output signal of the digital modulating means into a PN code from the first PN code generating means.
A transmitter comprising a spread spectrum means for performing spread spectrum by a code, a transmission means for transmitting an output signal from the spread spectrum means, a reception means for receiving a transmission signal from the transmitter, the first PN code generation Conversely despreading the 2PN code generating means for generating a large PN code correlation with the PN code generated from the means, the spectrum of signals received at the receiving means by the PN code from the first 2PN code generating means diffusion means, of inverse diffusion means
Synchronization detection means for detecting the synchronization of the PN code based on the output;
Until synchronization is detected based on the output of the synchronization detection means,
Code phase changes sequentially with respect to the second PN code generation means
Sliding correlation means for supplying a clock signal to
After detecting the synchronization based on the output of the synchronization detecting means, the second
Supply a predetermined clock signal to the PN code generating means
That the second clock generating means, said multiplying means for multiplying a clock signal from the second clock generating means, and receiving with a demodulating means for demodulating an output signal from said despreading means on the basis of the output signal from the multiplying unit And a spread spectrum communication system.

[0006]

According to the present invention, a signal obtained by multiplying a clock signal to a second PN code generation means for generating a PN code for spectrum despreading provided in a receiver is used as a carrier signal in a demodulation means.

[0007]

FIG. 1 is a diagram showing an embodiment of a spread spectrum communication system according to the present invention. In FIG. 1, 1
Is a first clock generation circuit for generating a reference clock signal,
2 is a frequency dividing circuit for dividing the clock signal from the first clock generating circuit, 3 is a first PN code generating circuit for generating a PN code using the output signal from the frequency dividing circuit 2 as one chip, and 4 is a first clock. A digital modulation circuit that digitally modulates the output signal from the generation circuit 1 based on the input data using the output signal from the generation circuit 1 as a carrier signal, and spreads the spectrum of the output signal from the digital modulation circuit 4 based on the PN code from the first PN code generation circuit 3. A spread spectrum circuit, 6 is a transmission unit for transmitting the spread spectrum signal, and 7 is an antenna to which a signal from the transmission unit 6 is supplied.

[0008] 10 is a receiving antenna, 11 is a receiving unit, 12
Is a second PN code generation circuit that generates a PN code that is the same as or has a large correlation with the PN code generated from the first PN code generation circuit 3, and 13 converts the spectrum of the output signal from the receiving unit 11 A despreading circuit for despreading based on the PN code; 14 a filter for band limiting the output signal of the despreading circuit 13; 15 a synchronization detection circuit for detecting the synchronization of the PN code based on the amplitude of the signal passing through the filter 14; Supplies a clock signal whose code phase is sequentially changed to the second PN code generation circuit 12 based on the first control signal supplied from the synchronization detection circuit 15 until synchronization is detected by the synchronization detection circuit 15. When the synchronization is detected by the synchronization detection circuit 15, the sliding correlation circuit 17 based on the second control signal supplied from the synchronization detection circuit 15. A second clock generating circuit for supplying a clock signal to the second PN code; 18, a multiplying circuit for multiplying the output signal from the second clock generating circuit 17; 19, a filter 14 using the output signal from the multiplying circuit 18 as a carrier signal; This is a digital demodulation circuit that digitally demodulates the passed signal.

Next, the operation will be described.

A digital modulation circuit 4 digitally modulates an output signal from the first clock generation circuit 1 (see FIG. 2A) as a carrier signal based on input data. Further, the output signal from the first clock generation circuit 1 is frequency-divided (1/2 in this embodiment) by the frequency division circuit 2, and then
The clock signal of the first PN code generation circuit 3 (see FIG. 2B) is supplied to the first PN code generation circuit 3. First
The PN code generation circuit 3 generates a code of one chip according to the clock signal. The PN code generated from the first PN code generation circuit 3 [FIG.
(C) is supplied to the spread spectrum circuit 5,
The spread spectrum circuit 5 spreads the spectrum of the output signal from the digital modulation circuit 4 based on the PN code. The signal thus spread [see FIG. 2 (d)]
After being amplified to a predetermined transmission signal level in the transmission section 6, the signal is transmitted via the antenna 7.

[0011] The receiver performs a receiving process on a signal received by the antenna 10 in the receiving unit 11, and then supplies the signal to the spectrum despreading circuit 13. Spectrum despreading circuit 13
Despreads the spectrum of the received signal based on the PN code from the second PN code generation circuit 12.

In order to receive and demodulate a spread spectrum signal, it is necessary that the PN code used on the transmitting side and the PN code on the receiving side are the same, and that both PN codes are synchronized. . Then, in the spread spectrum communication system, when the two codes are synchronized, a signal appears at the output terminal of the despreading circuit, and the synchronization of the code phase is established using this.

That is, the synchronization detection circuit 15 includes the filter 14
Is detected based on whether or not the level of a signal (carrier signal) that has passed through is equal to or higher than a predetermined level.
If the level of the signal passing through the filter 14 is smaller than the predetermined level, it is determined that the phase of the receiving code is not synchronized with the phase of the transmitting code, and the first control signal is transmitted to the sliding correlation circuit 16. And the second PN code generation circuit 12 sequentially changes the phase of the code generated based on the signal from the sliding correlation circuit 16.

When the phases of the two PN codes are synchronized based on the operation of the sliding correlation circuit 16 and the level of the signal passing through the filter 14 exceeds a predetermined level, the synchronization detection circuit 16 stops supplying the first control signal. Then, the second control signal is supplied to the second clock generation circuit 17. Therefore, the second
The PN code generation circuit 12 is provided in the second clock generation circuit 1.
7 generates a PN code based on the output signal.

The output signal from the second clock generation circuit 17 is doubled by a multiplication circuit 18 and supplied to a digital demodulation circuit 19 as a carrier signal. Therefore, the signal that has passed through the filter 14 (spectrum despread signal) is output from the multiplying circuit 18 (carrier signal).
And demodulated digitally by quadrature synchronous detection or the like.

[0016]

According to the present invention, the output signal of the second clock generating means for generating the PN code on the receiving side is multiplied and used as the carrier signal of the digital demodulation circuit. No special circuit such as a loop is required, and the circuit configuration of the receiving system can be simplified.

[Brief description of the drawings]

FIG. 1 is a diagram showing one embodiment of the present invention.

FIG. 2 is a diagram showing a signal waveform.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st clock generation circuit 2 frequency divider 3 1st PN code generation circuit 4 digital modulation circuit 5 spread spectrum circuit 6 transmission part 11 reception part 12 2nd PN code generation circuit 13 spectrum despreading circuit 14 filter 15 synchronization detection circuit 16 sliding correlation Circuit 17 Second clock generation circuit 18 Multiplication circuit 19 Digital demodulation circuit

Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04B 1/69-1/713 H04J 13/00-13/06

Claims (1)

(57) [Claims] A first clock generating means for generating a reference clock signal; a frequency dividing means for dividing a clock signal from the first clock generating means;
First PN code generation means for generating a PN code to be a chip, digital modulation means for digitally modulating the carrier signal in accordance with input data using the clock signal from the first clock generation means as a carrier signal, and digital modulation A transmitter comprising: a spread spectrum means for performing spread spectrum on an output signal of the means using a PN code from the first PN code generation means; and a transmission means for transmitting an output signal from the spectrum spread means; receiving means for receiving the transmission signal, the 2PN code generating means for generating a large PN code correlation with the PN code generated from the first 1PN code generating means, the spectrum of the signal received by said receiving means first 2P
Despreading means for despreading with the PN code from the N code generating means, and detecting the synchronization of the PN code based on the output of the despreading means
Synchronization detecting means for performing synchronization based on an output of the synchronization detecting means.
Until the second PN code generation means is detected.
A slide that supplies a clock signal whose code phase changes sequentially
Based on the output of the synchronization detecting means.
After the period detection, the predetermined click to the first 2PN code generating means
Second clock generating means for supplying a lock signal, said multiplying means for multiplying a clock signal from the second clock generating means, and demodulating means for demodulating an output signal from said despreading means on the basis of the output signal from the multiplying unit A spread spectrum communication system comprising: