JP3123052B2 - Acoustic signal compressor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to an audio signal compressor device for changing a dynamic range of an audio signal such as an audio signal and a tone signal.

[Prior art]

Conventionally, this type of device utilizes analog signal processing, in which an input analog signal is input to a voltage-controlled amplifier, and an envelope (envelope) of the input analog signal is detected by a rectifying circuit and an integrating circuit. The dynamic range of the input analog signal is changed by controlling the gain of the amplifier with the detection envelope.

[Problems to be solved by the invention]

However, in the above-mentioned conventional apparatus, since analog signal processing is used, it is difficult to increase the accuracy of each circuit element constituting a rectifier circuit and an integration circuit, a voltage-controlled amplifier, etc. I could not change the range. Further, in the conventional device, since there is a delay in envelope detection, a time lag occurs between a signal whose amplitude is actually controlled by the voltage-controlled amplifier and a signal whose envelope is detected, and this time The deviation also made it difficult to change the high-precision dynamic range. In such a case, it is conceivable to dispose an analog delay element such as a BBD in the preceding stage of the voltage-controlled amplifier.However, it is difficult to accurately grasp the delay time in envelope detection, and the error of the analog delay element causes an error. Also, it was difficult to change the dynamic range with high precision. On the other hand, in recent years, many types of audio devices perform digital signal processing. In this case, since the audio signal is digitally expressed, the digitally expressed audio signal is used to generate the same signal. It has been desired to change the dynamic range without changing the digital expression. The present invention has been made based on the above problems and background, and an object of the present invention is to provide an audio signal compressor device that digitally changes the dynamic range of an audio signal and performs the change with high accuracy.

[Means for Solving the Problems]

In order to achieve the above object, a first invention (an invention according to claim 1) includes a digital delay means for digitally delaying an input digital signal representing an audio signal by a predetermined time, The value of the input digital signal is converted by digital low-pass filter processing in which the cutoff frequency increases when the value converted to the absolute value increases and the cutoff frequency decreases when the value converted to the absolute value decreases. Digital level detecting means for digitally detecting the level value of the digital signal, and a digital signal from the delay means and a value corresponding to the level value detected by the digital level detecting means. The digital signal processing means for calculating and outputting the signal constitutes an acoustic signal compressor device. In the door. According to a second aspect of the present invention, there is provided a digital delay means for digitally delaying an input digital signal for linearly displaying an acoustic signal by a predetermined time, and digitally delaying the level value of the input digital signal. A digital level detecting means for converting the same level value into a negative logarithm with the maximum level being "0" and outputting the result; a digital signal from the digital delay means connected to the output of the digital delay means; The digital signal processing means for digitally calculating and outputting a value corresponding to the absolute value of the logarithmically converted level value from the level detection means and outputting the result. Furthermore, the third invention (the invention according to claim 3) provides:
In the audio signal compressor device according to the first or second aspect of the present invention, a compression ratio setting unit that sets a compression ratio of a dynamic range of the input digital signal and outputs compression ratio control data representing the set compression ratio. Means,
Level changing means interposed between the digital level detecting means and the digital calculating means for changing and controlling the level value from the same level detecting means with the compression ratio control data and supplying the level value to the calculating means; It is in.

Function and Effect of the Invention

According to the first aspect of the present invention, when a digital signal representing an instantaneous value of an acoustic signal is input, digital level detection means digitally detects the level value of the input digital signal, and digital operation means Digitally operates a digital signal from the digital delay means and a value corresponding to the detection level value and outputs the result. In such a case, if an operation is performed such that the input digital signal is multiplied by a larger value as the level value of the input digital signal decreases, the dynamic range of the input digital signal is compressed and output. Also, in this case, the time required for the digital level detection means to detect the level can be accurately grasped for digital signal processing, and the delay time of the signal by the digital delay means can be accurately managed. By delaying the input digital signal by the time required for the level detection by the detection means, it is possible to accurately calculate the value corresponding to the detection level on the digital signal whose level has been detected. Such delay, detection, and calculation are all digitally processed, and as described above, the digital signal whose level has been detected can be accurately calculated with a value corresponding to the detection level. The error caused by the accuracy of circuit elements and the accuracy of delay time as in the prior art is not included in the digital signal. According to the first aspect, the dynamic range of the digital audio signal can be changed with high accuracy. it can. Further, the digital level detecting means converts the input digital signal into an absolute value, and when the value obtained by the absolute value conversion increases, the cutoff frequency becomes higher, and when the value obtained by the absolute value conversion decreases, the cutoff frequency becomes lower. The level value of the input digital signal is digitally detected by a digital low-pass filter process in which the level of the input digital signal is reduced. Therefore, when the absolute value of the input audio signal increases, the cutoff frequency is increased to make the tracking of the envelope detection faster,
Further, when the absolute value of the input audio signal decreases, the cutoff frequency can be lowered to reduce the followability of envelope detection, and the envelope detection can be realized with a simple circuit configuration. The second invention operates almost in the same manner as the first invention except for the absolute value conversion of the input digital signal and the digital low-pass filter processing. However, in the second invention, the input digital signal is represented by a linear display. The digital level detecting means digitally detects the level value of the input digital signal and log-displays and outputs the same level value, and the digital operation means displays the digital signal from the digital delay means and the logarithmic display. Digital value and the value corresponding to the level value
Variable control of the dynamic range of the digital audio signal is performed in logarithmic expression (decibel expression). As a result, according to the second aspect, in addition to the effect of the first aspect, the variable control of the dynamic range of the digital audio signal can be performed over a wide range of the signal level, and the human auditory sense can be controlled. Corresponding control is performed. The digital level detecting means converts the level value of the input digital signal into a negative logarithm with the maximum level being "0" and outputs the result. The digital operation means performs the logarithmic conversion with the digital signal from the digital delay means. A value corresponding to the absolute value of the level value is digitally calculated and output. This means that the level data of the negative decibel display, whose absolute value is large because the absolute level of the input digital signal is small, is treated as a positive value as it is, to increase the level of the signal having a small input level, and Decreasing the level of a signal having a large input level can be easily realized. Further, in the third aspect, the compression rate setting means sets the compression rate of the dynamic range of the input digital signal and outputs compression rate control data representing the set compression rate. Since the level value from the level detecting means is changed and controlled by the compression rate control data and supplied to the digital operation means, the compression rate for the input digital signal is variously changed. As a result, according to the third aspect, in addition to the effects of the first and second aspects, the degree of freedom in variable control of the dynamic range is increased, various types of audio equipment can be supported, and various effects on audio signals can be obtained. Can be added, and the application of the acoustic signal compressor device is expanded.

【Example】

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an acoustic signal compressor device according to the embodiment. This device includes a digital delay circuit 10, a digital level detection circuit 20, a compression ratio setting circuit 30, a multiplier 40, and a digital operation circuit 50, and represents each instantaneous value of an audio signal such as a voice signal and a musical tone signal in a time series. A digital audio signal is input, and the dynamic range of the signal is changed and output. The digital sound signal is obtained by linearly displaying each instantaneous value in "two's complement", and is composed of, for example, 16 bits. The digital delay circuit 10 is composed of a 16-bit shift register, and delays an input digital audio signal and outputs it to the digital arithmetic circuit 50. In such a case, the number of stages of the shift register depends on the frequency of a clock signal (not shown) applied to the register for shift control, and the time required for the digital level detection circuit 20 and the multiplier 40 to perform the processing. The digital arithmetic circuit 50 is designed to calculate the level control data formed on the input digital audio signal based on the detection level of the input digital audio signal. The digital level detection circuit 20 has an absolute value circuit 21, as shown in detail in FIG. The absolute value circuit 21 has 15 exclusive OR circuits EXOR _{1 to} EXOR ₁₅
EXOR _{1 to} EXOR ₁₅
Inputs the most significant bit MSB of the input digital audio signal to each one input, and inputs each bit except the most significant bit MSB of the same audio signal to each other input.
Thereby, a positive input digital sound signal, for example, “00”
0… 01 ”(16 bits) is“ 00… 0 ”excluding the most significant bit MSB
It is output as a "1" (15 bit) signal. A negative input digital audio signal, for example, “111... 10” (16 bits) is output as a signal of “00... 01” (15 bits) excluding the most significant bit MSB and inverted other than the same bit MSB. . The input digital audio signal subjected to absolute value conversion (full-wave rectification) by the absolute value circuit 21 is converted into a logarithmic (decibel) input digital audio signal by a linear / logarithmic conversion circuit including an encoder 22, a shifter 23, and an inverter circuit group 24. ) Converted to the displayed data. Encoder 22 is absolute value circuit 21
The maximum value “11... 11” (15 bits) of the output from is regarded as 0 dB, and the exponent part of the logarithmically converted data in which the output is displayed as a floating point is displayed in 3 bits and output. That is,
The encoder 22 converts the 15-bit data into 3-bit data representing "X-1", assuming that the bit position where "1" appears for the first time when the 15-bit data is viewed from the higher order is the Xth. In the form of a logic circuit. The 3-bit data is “000”, “001”
"010"... "111" in the order of 0, -6, -12... -42 dB. Thus, the 15-bit data is converted as follows. The shifter 23 displays the mantissa part of the logarithmically converted data represented by the floating point in 3 bits and outputs the result.
Is shifted to the higher side by the 3-bit data value from the encoder 22 so that the most significant bit MSB of the output is always "1", and the upper 2 bits to 4 The data of the 3rd bit is output. For example, the above "111111111 ... 1" ~
"100000000 ... 0" is not bit-shifted,
Fourth bit “111” to “000” 3-bit data is output, and “000111111... 1” to “000100000.
Is shifted by 3 bits, and "11"
3-bit data of "1" to "000" is output. Of course, in such a case, the 15-bit data from the absolute value circuit 21 may be shifted to the upper side by the number of bits larger by "1" than the output value from the encoder 22, and the upper 3 bits may be output. The 3-bit mantissa data from the shifter 23 is combined with the 3-bit output data from the encoder 22 via the inverter circuit group 24 and output as 6-bit level data. The inverter circuit group 24 includes inverter circuits INV ₁ , INV
₂ , INV ₃ , and inverts and outputs each bit output from the shifter 23. The reason why the mantissa data is inverted in the inverter circuit group 24 is as follows. That is, as described above, when creating the exponent part data, the data values of "1111 ... 1" to "1000 ... 0" are set to 0 dB, and the data values of "0111 ... 1" to "0100 ... 0" are set to -6.
Decibel, the data value of “0011... 1” to “0010.
The data is converted to 12 decibels or the like, and the shifter 23 always outputs, as mantissa data, data values of “111” to “000” from which the most significant bit MSB “1” is deleted. In this case, the display of the mantissa data is performed by replacing the triangular hatched portion of −6 dB or less in FIG.
It is equivalent to seeing the image in a hatched portion of a triangle shape of -6 dB. On the other hand, as shown in FIG. 4 in which the above-mentioned 0 to -6 dB portion is enlarged, regarding the mantissa part output from the shifter 23, 0 dB (the maximum as a level) as the smallest absolute value is "111". And the largest absolute value of -6 decibels (minimum as a level) is expressed as "000", and the output of the shifter 23 indicates the opposite change direction as a negative decibel display. . Therefore, the inverter circuit group 24
The linear approximation is performed so that the value of −6 dB changes in order from “000” to “111” so as to match with the exponent part data. As can be understood from the above description, the 6-bit level data including the exponent part and the mantissa part is represented by a negative decibel value whose absolute value increases as the absolute level of the input digital audio signal decreases. Have been. The 6-bit level data is composed of "0000"
Bit digital data is added on the lower side, that is, the 6-bit level data is expanded to 10 bits and supplied to one input of a subtractor 25a. The subtracter 25a forms a part of the digital filter 25, and subtracts the level data from a delay circuit 25b (control clock is omitted) composed of a 1-stage 10-bit shift register and supplies the result to a multiplier 25c. The digital filter 25 includes an adder 25d in addition to these circuits 25a to 25c, and the adder 25d adds the output of the multiplier 25c and the output of the delay circuit 25b to the input of the delay circuit 25b. Supply. The digital filter 25 outputs the output of the subtractor 25a as a high-pass output and the output of the adder 25d as a low-pass output.
The cutoff frequency characteristic of the low-pass output for the input signal is changed and controlled by the gain coefficient g supplied to 5c. That is, as the gain coefficient g increases, the cutoff frequency in the low-pass characteristics of the digital filter 25 increases. The output of the subtractor 25a is connected to a positive / negative discriminating circuit 26a. The positive / negative discriminating circuit 26a is composed of a comparator, and determines whether the subtraction result of the subtractor 25a is positive or negative and outputs the result. The gain memory 26b is controlled by the positive / negative discriminating circuit 26a and supplies a gain coefficient g to the multiplier 25c.
The determination result is supplied a large gain factor g ₁ predetermined for a negative multiplier 25c, and the determination result is supplied to the positive predetermined small gain factor when the _{g 2 (g 1> g 2} ) a multiplier 25c I do. As a result, when the absolute level of the input digital audio signal rises, the cutoff frequency in the low-pass characteristic of the digital filter 25 increases as shown by the solid line in FIG. 5, and the tracking of the envelope detection becomes faster. When the absolute level of the sound signal decreases, the cutoff frequency decreases as indicated by a two-dot chain line in FIG. 5, and the tracking of the envelope detection becomes slow. This is because the level data logarithmically displayed by the encoder 22, the shifter 23, and the inverter circuit group 24 represents a negative decibel value, but the sign bit representing the negative of the data is omitted. The 10-bit digital data representing the envelope detected in this manner is output from the digital level detection circuit 20 as level data and supplied to the multiplier 40, as shown in FIG. In such a case, the level data treated as representing a negative decibel value in the digital level detection circuit 20 (however, the sign bit indicating a negative value is omitted) is output from the detection level of the digital level detection circuit 20. Treated as a positive value. This is because, since the absolute level of the input digital audio signal is small, the level data of the negative decibel display whose absolute value is large is treated as a positive value as it is, thereby increasing the level of the audio signal having a small input level, and This is for easily realizing the audio signal compressor device that changes the dynamic range of the audio signal by reducing the level of the audio signal having a large input level. The multiplier 40 multiplies the supplied level data by the compression ratio control data supplied from the compression ratio setting circuit 30, and outputs the result to the digital operation circuit 50. The compression ratio setting circuit 30 has a built-in operator for setting a compression ratio and a data output circuit for outputting compression ratio control data corresponding to the operation position of the operator. The digital operation circuit 50 receives the signal from the digital delay circuit 10
The level of the 16-bit digital audio signal is raised by the amount of 10-bit level data (decibel display) from the multiplier 40 and output. As shown in FIG.
1. It comprises an adder 52 and a shifter 53. The multiplier 51 and the adder 52 are in charge of an operation relating to the mantissa part of the level data.The multiplier 51 converts the 16-bit digital sound signal from the digital delay circuit 10 into a multiplier 40 from the digital level detection circuit 20. Supplied via
It multiplies the 7-bit mantissa part of the 10-bit level data and outputs the result. The adder 52 adds the 16-bit digital sound signal and the result of the multiplication by the multiplier 40 and outputs the result. As a result, as shown in FIG. 7, the level of the digital audio signal is only the mantissa part representing each increment between 0, 6, 6 and 12... Raised by linear approximation. The shifter 53 is in charge of an operation related to the exponent part of the level data, and outputs the addition result of the adder 52 by the number of bits corresponding to the value represented by the 3-bit exponent of the 10-bit level data. Shift to the upper side and output. For example, if the exponent indicates “000” (0 dB), the digital audio signal from the adder 17 is output as it is. If the exponent indicates "011" (18 dB), the digital audio signal from the adder 17 is shifted to the upper 3-bit side, that is, output by being multiplied by 8 in linear display. That is, by this shift operation, the level of the digital sound signal from the adder 17 becomes
By the 3-bit exponent, 6 dB from 0 dB to 42 dB, that is, 1,2,4 ·
・ ・ It is raised to 128 times. According to the embodiment configured as described above, when a digital audio signal is input, the audio signal is supplied to the digital delay circuit 10 and the digital level detection circuit 20. The digital sound signal is delayed for a predetermined time by a digital delay circuit 10 and a digital level detection circuit is provided.
The envelope is detected by 20. Then, the digital arithmetic circuit 50 changes and controls the dynamic range of the input digital audio signal by changing the level of the delayed input digital audio signal in accordance with the level data representing the envelope. In this case, all of these signal processings are performed digitally, and the delay time of the digital delay circuit 10 is determined by the digital level detection circuit.
Since the time required for the calculation by the multiplier 20 and the multiplier 40 is set, the level change processing is accurately performed on the digital audio signal whose envelope is detected. As a result, errors due to the accuracy of the circuit elements, the accuracy of the delay time, and the like are not included in the digital signal, and the dynamic range of the digital audio signal can be changed with high accuracy. In the detection of the envelope, after the absolute value circuit 21 performs processing corresponding to full-wave rectification of analog signal processing on the input digital audio signal in the digital level detection circuit 20, the encoder 22, the shifter 23 and An inverter circuit group 24 converts the input digital audio signal after the processing into logarithmic display data using a floating point whose maximum level is 0 dB, and the digital filter 25 is controlled by a positive / negative discrimination circuit 26a and a gain memory 26b. The envelope of the input digital audio signal is detected by controlling the change of the cutoff frequency in the low-pass characteristic according to the direction of change of the input audio signal. As a result, the envelope detection can be realized by a simple circuit configuration, and since the envelope detection value is displayed in decibels, the number of bits is small even if the dynamic range of the input digital audio signal is large, and it corresponds to human perception. Expressed in the form of The level data representing the envelope from the digital level detection circuit 20 is variably controlled based on the compression ratio control data from the compression ratio setting circuit 30 by the multiplier 40, and then digitally delayed by the digital operation circuit 50. Circuit 10
Used to control the level of digital audio signals from
From the arithmetic circuit 50, a digital sound signal having a dynamic range compressed in accordance with the compression ratio control data is obtained. That is, the input digital audio signal having the dynamic range shown by the solid line in FIG. 8 is output after being changed to the dynamic range shown by the broken line, the one-dot chain line, the two-dot chain line in FIG. This makes it possible to support various audio devices and add various effects to audio signals, and the use of the audio signal compressor device is expanded. In the above embodiment, when the digital level detection circuit 20 converts the linear display data to logarithmic (decibel) display, the mantissa part includes an inverter circuit group.
24 (FIG. 2), the linear approximation was used.
As shown in the figure, by using a linear / logarithmic conversion table 24a instead of the circuit group 24, the data of the mantissa part may be converted from linear display data to logarithmic (decibel) display. In the above embodiment, when the digital arithmetic circuit 50 converts logarithmic (decibel) display data to linear display, the mantissa part is linearly approximated using the multiplier 51 (FIG. 6). However, as shown in FIG. 10, by providing a logarithmic / linear conversion table 54 at the preceding stage of the multiplier 51, the logarithmic (decibel) display data is converted to a linear display even for the mantissa. Is also good. As a result, the error due to the linear approximation in the above embodiment is eliminated, and the accuracy of the acoustic signal compressor is improved. In the above embodiment, the positive / negative discrimination circuit 26a (FIG. 2) detects the rise and fall of the input digital audio signal. However, as shown in FIG. 11, instead of the discrimination circuit 26a, The rise and fall may be detected by comparing the magnitude of the input data to the digital filter 25 with the output of the delay circuit 26c that delays the data by one bit in the comparator 26d. Next, application examples of the acoustic signal compressor device according to the above-described embodiment and its modified example will be described. FIG. 12 shows an acoustic signal compressor device 10 according to the present invention.
1 shows an example in which 0 is incorporated in a digital audio system. The device 100 receives a digital audio signal from a digital audio signal source 101 such as a disk or a tape, and changes its dynamic range and outputs the digital audio signal. This audio signal compressor device 100 has D / A
A converter 102 is connected. The converter 102 converts the digital sound signal whose dynamic range has been changed into an analog sound signal, and outputs a speaker 104 via an amplifier 103.
And outputs it to the tape recorder 105.
According to this, the dynamic range of the audio signal from the audio signal source 101 can be changed from the loudspeaker 104 according to the type, location, application, etc. of the audio signal source, and the tape recorder 105 can be newly generated. Can be recorded. FIG. 13 shows an example in which the acoustic signal compressor device 100 is applied to an electronic musical instrument. The device 100 is generated from a musical tone signal forming circuit 112 in response to an operation of a performance operator 111 such as a keyboard. The dynamic range of the digital tone signal is changed and output. The digital tone signal whose dynamic range has been changed is converted into an analog tone signal by the D / A converter 113, supplied to the speaker 115 via the amplifier 114, and is emitted as a tone from the speaker 115. Thereby, a unique sound effect is added to the tone signal formed by the tone signal forming circuit 112. FIG. 14 shows the sound signal compressor device 100.
Shows an example in which is applied to an electric musical instrument.
It is connected via an A / D converter 123 to a pickup device 122 for picking up a string vibration of an instrument body 121 such as a guitar. The A / D converter 123 converts the pickup signal into a digital audio signal to convert the audio signal into a digital audio signal.
Supply to The sound signal compressor device 100 changes the dynamic range of the digital sound signal and outputs it to the D / A converter 124, and the D / A converter 124 converts the digital sound signal having the changed dynamic range into an analog sound signal. Then, the signal is supplied to the speaker 126 via the amplifier 125. As a result, a musical instrument sound whose dynamic range of the pickup signal is changed is output from the speaker 126, and a unique sound effect is added to the pickup signal.

[Brief description of the drawings]

FIG. 1 is an overall block diagram of an audio signal compressor according to an embodiment of the present invention, FIG. 2 is a detailed block diagram of a digital level detection circuit of FIG. 1, and FIGS. 3 and 4 are diagrams of FIG. FIG. 5 is a graph for explaining the linear / logarithmic conversion operation in the circuit, FIG. 5 is a graph showing low-pass characteristics of the digital filter of FIG. 2, FIG. 6 is a detailed block diagram of the digital arithmetic circuit of FIG. 1, and FIG. 6 is a graph for explaining the logarithmic / linear conversion operation in the circuit of FIG. 6, FIG. 8 is a graph showing a compression characteristic of an audio signal in the audio signal compressor device, and FIG. 9 is a linear / logarithmic conversion of FIG. FIG. 10 is a detailed block diagram showing a modification of the section, and FIG.
FIG. 11 is a detailed block diagram showing a modification of the logarithmic / linear conversion unit shown in FIG. 11, FIG. 11 is a detailed block diagram showing a modification of the digital audio signal change direction detection unit in FIG. 2, and FIGS. It is the whole block diagram which shows the application example of the acoustic signal compressor device. Explanation of symbols 10: Digital delay circuit, 20: Digital level detection circuit, 21: Absolute value circuit, 22: Encoder, 23 ...
Shifter, 24 ... Inverter circuit group, 24a ... Linear / logarithmic conversion table, 25 ... Digital filter, 26a ...
Positive / negative discriminating circuit, 26b ... gain memory, 26c ... delay circuit,
26d ... comparator, 30 ... compression ratio setting circuit, 40 ... multiplier, 50 ... digital operation circuit, 51 ... multiplier, 52 ...
Adder, 53: Shifter, 54: Logarithmic / linear conversion table.

Claims (3)

(57) [Claims] A digital delay means for digitally delaying an input digital signal representing an acoustic signal by a predetermined time; an absolute value conversion of the input digital signal; and a cutoff when the absolute value converted value rises. Digital level detection means for digitally detecting the level value of the input digital signal by digital low-pass filter processing in which the cutoff frequency decreases when the frequency increases and the absolute value-converted value decreases; Digital operation means connected to the output of the means for digitally operating a digital signal from the delay means and a value corresponding to the level value detected by the digital level detection means, and outputting the result. Signal compressor device. 2. A digital delay means for digitally delaying an input digital signal for linearly displaying an acoustic signal by a predetermined time, and digitally detecting a level value of the input digital signal and setting the same level value to a maximum level. A digital level detecting means for converting the signal into a negative logarithm to be set to "0" and outputting the digital signal; Digital signal processing means for digitally calculating a value corresponding to an absolute value and outputting the result. 3. An audio signal compressor according to claim 1, wherein said compression ratio control data is for setting a compression ratio of a dynamic range of said input digital signal and representing said set compression ratio. Compression level setting means for outputting a level value; and a level value from the level detection means interposed between the digital level detection means and the digital operation means for changing and controlling the level value from the level detection means with the compression rate control data. An acoustic signal compressor device comprising: a supply level changing unit.