JP3119677B2 - Signal processing circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital circuit,
For example, the present invention relates to a signal processing circuit that performs amplification according to the level of a digital signal input as an audio signal.

[0002]

2. Description of the Related Art Compact disc devices (CD), digital audio tape devices (DAT), and the like have become widespread as devices for handling audio signals in digital form. In these digital audio devices, input data can be freely processed and output, whereby high-quality and easy-to-listen sound can be created. For example, if an audio signal reproduced from a recording medium such as a digital tape is amplified and output as it is with such a device, a low frequency band becomes unsatisfactory when the input level is particularly small due to human hearing sensitivity characteristics. By amplifying only a signal of a predetermined level or lower in a low frequency band (hereinafter, referred to as a low frequency boost), a deep bass is emphasized. Further, if necessary, a process of boosting all signals below a predetermined level regardless of the frequency of the input signal (hereinafter, referred to as a full range boost) is also performed.

Conventionally, such signal processing has been performed by an analog circuit.

[0004]

By the way, if such a boosting process is performed abruptly on an input signal, the sound becomes unnatural in audibility. Therefore, it is necessary to perform the process smoothly. However, when boost processing is performed by an analog circuit as in the related art, it has been difficult to obtain desired characteristics. Further, since the circuit constants and the like are fixed, there is a problem that the boost characteristic cannot be changed as necessary.

[0005] Therefore, there is a problem that the above problems must be solved.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and has a sudden change in the amplification of a digital signal.
By performing a boost (amplification) process that suppresses
It is an object of the present invention to obtain a signal processing circuit capable of easily changing the boost characteristic.

[0007]

A level determining circuit according to the present invention amplifies digital signals sequentially input.
To the signal processing circuit that outputs the amplified digital signal.
Oite and determining the level decision means the level of the input digital signal, based on a result of the level decision means of this determines the amplification quantity setting means for determining the amount of amplification, the amplification
An amplification amount of time determined by the amount setting means, and amplifying the change amount calculating means for calculating a difference between the previous amplification amount <br/>, the difference in amplification change amount calculated by the amplification variation amount calculating means this Based on amplification
The amount of change in the amplification change amount is sequentially changed for each step.
A step amount calculating means for calculating an amount of change per step required to eliminate in a predetermined time, per 1 step calculated in the step calculating means this <br/>
Amplifying means for changing the amount of amplification by the amount of change of the input signal and sequentially amplifying and outputting the input digital signal .
It is characterized by that .

[0008]

In the signal processing circuit according to the present invention, the amount of amplification is determined based on the level of the input digital signal.
Obtains a variation of the previous and the current amplification amount, it is possible to perform a process of amplifying the input signal by step amount corresponding to the amount of change digitally.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

FIG. 1 shows a signal processing circuit and its peripheral circuits according to an embodiment of the present invention. In this figure, a 16-bit digital signal reproduced from a CD or the like is amplified by an amplifier 11, demodulated by a demodulation circuit 12, and input to a signal processing circuit 13.
The signal processing circuit 13 performs a predetermined boosting process and passes through a digital filter 14 to a digital / analog (D
/ A) Input to the converter 15. This D / A converter 15
The signal converted to analog by the low pass filter 16
It cuts out the high frequencies and outputs it.

The signal processing circuit 13 is provided with a low-pass filter 21 having a cut-off frequency of 50 Hz, so that a part of the output of the demodulation circuit 12 is input. Another part of the output of the demodulation circuit 12 is input to the boost circuit 22. The output side of the low-pass filter 21 is a level determination unit 2
3 and connected to the boost control unit 24. The boost control unit 24 is connected to a read only memory (ROM) 25 in which a predetermined control program and various reference tables are stored. This ROM 25 is also connected to the level determination unit 23 and is accessed as needed. The boost control unit 24 outputs a boost multiplier 26 indicating a boost amount, and supplies the boost multiplier 26 to the boost circuit 22.

FIG. 2 shows a level determination table stored in the ROM 25. In this table, levels are divided into 12 levels according to the number of the first bit “1” appearing from the upper part of 16-bit input data. In this figure, “*” indicates that the bit value may be either “0” or “1”. Also,
As input data, only the upper 13 bits are to be determined, but it is also possible to determine lower bits as well.

FIG. 3 shows a boost amount determination table for low frequency boost stored in the ROM 25. As shown in this figure, the input levels are "0" to "-1".
For input data of 8 "decibels (dB), the boost amount is set to" 0 "dB, that is, the boost coefficient Bn is set to" 0 ", and for input data whose input level is" -18 "or less, the boost amount is increased. The amount is “18” or “12” dB, that is, the boost coefficient Bn is “10”.
^0.9-1 "or" ^100.6-1 ".

Here, the input level is "0" to "18" d.
For the boost amount “0” in the case of B, the boost coefficient Bn
Is set to “0” instead of “1” in the case of low frequency boost,
This is because the boost circuit 22 shown in FIG. 1 is configured to add a product obtained by multiplying the input signal by a boost coefficient Bn to the original input signal and output the result. That is, Bn is obtained by subtracting the coefficient "1" for the input signal to be added in advance.

[0015] Further, the input level "-18" dB of boost coefficient Bn to boost amount of the following cases "10 ^0.9 -
1 "or" 10 ^0.6 -1 "for the same reason.

In the operation of the signal processing circuit having the above configuration, first, the case where the low-frequency boosting process is performed is shown in FIG.
It is explained together with.

The signal output from the low-frequency boost processing demodulation circuit 12 is input to a boost circuit 22 and a low-pass filter 21 of the signal processing circuit 13. In the low-pass filter 21, only a signal of 50 Hz or less is passed and input to the level determination unit 23.

The level determining section 23 takes the absolute value of the input 16-bit data (step S101). When the input data is a negative number, that is, when the value of the MSB is "1", a two's complement is obtained by adding "1" to the inverted version of all the bits, and the MSB value is "0". In the case of, it is output as it is. The reason for taking the two's complement is that a signed binary number including a negative number is generally used as input data as an audio signal.

After the absolute value is extracted, the level judgment unit 23
Checks the first bit of the 16-bit data from the upper bit, and determines the corresponding level by referring to the level determination table in the ROM 25 according to the bit position (step S102). For example, assuming that the input data is data for which the sixth bit (eleventh bit from the low order) counted from the high order becomes “1” for the first time as shown in the following equation (1), the level determination table ( From FIG. 2), the determination levels are “−24” to “−”.
30 "dB.

“000001001000000000” (1) The level information determined in this manner is stored in the level determination unit 2.
3 to the boost control unit 24.

The boost control section 24 includes a level determination section 23
The boost amount is determined by referring to the boost amount determination table (FIG. 3) in the ROM 25 based on the level information determined in step S103 (step S103). In the above example, since the determination level is “−24” to “−30” dB, the boost amount is “18” or “12” dB, and the boost coefficient B
n is “10 ^0.9 −1” or “10 ^0.6 −1”. Next, the boost control unit 24 calculates the previous boost coefficient B
A difference Mn (hereinafter, referred to as a boost change amount) between ^n-1 and the current boost coefficient Bn is obtained (step S104). When this value is not "0", that is, the boost coefficient B
If there is a change in n (step S105; N), the value Mn is adopted, and if it is "0", that is, if there is no change in the boost coefficient Bn (step S105;
Y), adopt the previous value Mn-1 as Mn. And
"0" is set to the output variable N (step S106),
A step amount STEP (Mn) shown in the following equation (2) is obtained (step S108).

STEP (Mn) = Mn / (T × 44.1) (2) Here, T is an attack time indicating a delay time at the time of boosting in the increasing direction, or a delay time at the time of boosting in the decreasing direction. This is the recovery time shown. The smaller the value is, the more the output change due to the boost is sharp, and the larger the value is, the more gradual the output is. The constant “44.1” is a so-called sampling frequency, and its unit is kilohertz (KHz). Therefore,
The denominator part of the equation (2) indicates the number of times of sampling per time T, that is, the number of data, and the boost change amount per sampling is obtained by dividing the boost change amount Mn. Here, for example, assuming that the attack time is 20 ms and the recovery time is 40 ms, the step amount STEP (Mn) at the time of attack and at the time of recovery.
Are as shown in the following equations (3) and (4), respectively. STEP (Mn) = Mn / 882 (3) STEP (Mn) = Mn / 1764 (4) For example, assuming that the boost variation Mn is 6 dB, at the time of attack and recovery according to the equations (3) and (4). Is the step amount STEP (Mn) of the following equations (5) and (6), respectively.
It looks like an expression.

STEP (Mn) = 6.8 × 10 ⁻³ (dB) (5) STEP (Mn) = 3.4 × 10 ⁻³ (dB) (6) The output variable N is obtained, and the boost is repeatedly performed by the step amount STEP (Mn) until the attack time elapses. That is, the boost change amount Mn
Is positive, that is, if the boost amount is increasing (step S109; Y), as long as N does not reach the boost coefficient Bn (step S110;
N), the output variable N is output as the output Kn (steps S111 and S112), and the process returns to step S1.
Steps 08 and thereafter are repeated. When N exceeds the boost coefficient Bn (step S110; Y), the boost coefficient Bn is output as the output Kn (step S11).
3, step S114), and ends a series of boost processing.

On the other hand, when the boost change amount Mn is negative, that is, when the boost amount is changing in a decreasing direction (step S109; N), as long as the value of N is "0" or more (step S115; N) ), And outputs this output variable N as an output Kn (step S111, step S11).
2), and repeat the processing from step S108 again. Then, when N becomes equal to or less than "0" (step S11).
5; Y), "0" is output as the output Kn (step S116, step S114), and the series of boost processing ends.

In the above processing, the boost circuit 22
Is the output Kn (boost multiplier 2) from the boost control unit 24.
Every time 6) is output, the input data is boosted and output.

FIG. 7 shows the time change of the boost amount when the attack time is 20 ms and the recovery time is 40 ms. As shown in this figure, for the attack, the boost amount gradually increases linearly by the step amount STEP (Mn) in each period of 20 ms, and for the recovery, the boost amount increases in the step amount STEP (Mn) for each period of 40 ms. Mn). As a result, the boost processing for the input data is performed gently, and the output becomes smooth.

In this embodiment, no boost processing is performed for an input signal of 50 Hz or more. However, for example, a 3 dB boost signal is applied to a 3 kHz signal regardless of the input level. You may.

Next, a case where the whole area boosting process is performed will be described with reference to FIG.

Whole-Range Boost Processing To perform the whole-range boost, the input level is determined for all frequencies without passing through the low-pass filter 21 in FIG. In this case, for example, a changeover switch may be provided to switch whether or not the frequency to be subjected to the level determination is limited to 50 Hz or less.

As shown in FIG. 6, the basic processing flow in this full-range boost is similar to that in the low-range boost (FIG. 5). However, in the case of the whole area boost, the initial value set to the variable N in step S106 is set to “1”, and the boost in the decreasing direction is performed (step S106).
109; N), the boost processing is repeated by the step amount STEP (Mn) repeatedly until the value of N becomes equal to or less than the boost coefficient Bn. Here, the initial value of the variable N is set to "1" unlike the low-frequency boost, because the input signal is multiplied by the boost coefficient Bn as it is during the full-frequency boost, and is output as it is. This is because no addition is performed. In addition, in this whole area boost,
The determination of the boost amount in step S103 is performed with reference to a boost amount determination table as shown in FIG. According to this table, the input level is divided into eight levels, and the corresponding boost amount is extracted.

Other processing is low-frequency boost processing (FIG. 5).
Therefore, the description is omitted.

By performing the above-described full-range boosting, the boosting is performed in an amount corresponding to the input level regardless of the frequency of the input data, so that the frequency characteristic becomes flat.

In the present embodiment, an example of the attack time and the recovery time has been described. However, the present invention is not limited to these examples, and other values may be employed. Also,
It is also possible to set these times to be different between the time of low-frequency boost processing and the time of full-range boost processing.

Needless to say, the various tables stored in the ROM 25 are not limited to those shown in FIGS. 2 to 4, and tables having optimal divisions may be set as necessary.

[0035]

As described above, according to the present invention,
The amount of amplification is determined based on the level of the input digital signal, the amount of change between the previous and current amounts of amplification is determined, and the amount of amplification is changed by a step amount corresponding to this amount of change.
It is possible to perform a process of you amplify digitally. In other words, the boost that was conventionally performed in analog
(Amplification) process can line Ukoto digital signal level. In such digital processing, related parameters can be selected as appropriate, so that there is an effect that the boost characteristics can be easily changed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a signal processing circuit and peripheral circuits according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram illustrating an example of a level determination table.

FIG. 3 is an explanatory diagram illustrating an example of a boost amount determination table for low-frequency boost.

FIG. 4 is an explanatory diagram showing an example of a boost amount determination table for whole area boost.

FIG. 5 is a flowchart for explaining an operation at the time of low-frequency boost in the signal processing circuit of FIG. 1;

FIG. 6 is a flowchart for explaining the operation of the signal processing circuit of FIG. 1 at the time of full boost.

FIG. 7 is an explanatory diagram showing an example of a temporal change of a boosted output signal.

[Explanation of symbols]

 Reference Signs List 13 signal processing circuit 21 low-pass filter 22 boost circuit 23 level determination unit 24 boost control unit 25 ROM

Claims (1)

(57) [Claims] 1. Amplifying digital signals sequentially inputted
And a signal processing circuit that outputs an amplified digital signal
A level determining means for determining a level of an input digital signal; an amplification amount setting means for determining an amplification amount based on a result determined by the level determining means ; Amplification amount and last time
Of the amplification variation calculating means for calculating a difference between the amplification amount, the amplification amount of change calculated by the amplification change quantity calculating means
On the basis of the difference , the amplification amount is changed step by step to
To eliminate the difference in the amount of change in amplification in a predetermined time
A step amount calculating means for calculating a required change amount per one step; and an amplification amount changing by a change amount per one step calculated by the step amount calculating means, and sequentially amplifying the input digital signal. A signal processing circuit comprising: an amplifying means for outputting .