JP3118048B2 - Block exposure pattern extraction method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a block exposure pattern which is formed in a predetermined number on an electron beam transmission mask based on hierarchically designed mask pattern data for a semiconductor integrated circuit and has a desired cross section through an electron beam. And a method for extracting a pattern for block exposure.

[0002]

2. Description of the Related Art In electron beam exposure, a fine pattern can be drawn by decomposing a pattern into pixels and raster-scanning or vector-scanning the electron beam. But,
The finer and more complex the pattern, the lower the throughput. Therefore, a method of drawing a finer pattern at a high speed by performing block exposure using a stencil mask has been proposed, and a DRAM pattern of 256 Mbit or more can be drawn.

[0003] This stencil mask has a maximum size of 4 μm, for example.
An array of 50 m × 4 μm block exposure patterns is arranged. The electron beam is deflected by a deflector, and the electron beam is passed through one of the block exposure patterns. Molded into a pattern. The block exposure is faster than the pixel exposure, and enables fine and high-quality drawing.

Since the number of block exposure patterns that can be arranged on a stencil mask is limited, it is necessary to arrange block exposure patterns on the stencil mask that can minimize the total number of shots. In addition, for a fine pattern requiring high precision for drawing, it is necessary to perform block exposure as much as possible.

[0005]

However, when a pattern for block exposure is extracted after the mask pattern data of the hierarchically designed semiconductor integrated circuit is developed, the data for one layer can be obtained.
The pattern data volume can be as large as 30 magnetic tapes, for example.
Block pattern with many repeated arrangements, apex angle of 45 °
An enormous amount of processing time is required to search for an arbitrary angle pattern and a fine pattern having an apex angle other than a multiple of and to block them. To reduce the processing time, it is difficult to obtain an optimal pattern for block exposure. On the other hand, if a block exposure pattern is extracted from the pattern data before development, it is subjected to graphic processing such as resizing and then developed hierarchically, so that connection parts between block patterns in the same hierarchy or between block patterns in different hierarchies. Overlaps and slits occur, resulting in pattern failure.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to extract a block exposure pattern for efficient electron beam exposure from a hierarchically designed mask pattern data in a shorter time. An object of the present invention is to provide an exposure pattern extracting method.

[0007]

FIG. 1 shows the principle configuration of a block exposure pattern extracting method according to the present invention. Hereinafter, numerical values in parentheses indicate step identification numbers in the figure.

In the present invention, a block for extracting a block exposure pattern which is formed in a predetermined number on an electron beam transmission mask and whose cross section has a desired shape through an electron beam is extracted from the hierarchically designed mask pattern data for a semiconductor integrated circuit. In the exposure pattern extraction method, (1) in the mask pattern data design stage, a block definition frame surrounding a region of the basic cell in a hierarchy in which the basic cells are arranged in an array, for example, a block definition frame as shown in FIG. E, 4
An arbitrary angle pattern having an apex angle other than a multiple of 5 °, for example, a block definition frame surrounding an area including the arbitrary angle pattern 20 shown in FIG. 7 or an area including a fine pattern whose distance between vertices is equal to or less than a predetermined value A block definition frame, for example, a block definition frame F as shown in FIG. 6 is set, and (3) resizing processing on the mask pattern is also performed on the block definition frame, and scaling processing on the mask pattern is performed. If the pattern slits and overlaps occur near the block definition frame after the application, the slits and the overlaps are eliminated, and (7) the pattern group in the block definition frame after graphic processing and before development is developed. A group of patterns corresponding to the one-shot block exposure size is extracted from the inside, and the pattern group is set as a candidate block for the block exposure pattern.

The number of pattern arrangements in the basic cell is relatively large,
In addition, an arbitrary angle pattern or a fine pattern requires high precision for exposure. According to the present invention, it is possible to extract a block exposure pattern for efficiently performing electron beam exposure from a hierarchically designed mask pattern data in a shorter time than before.

In the first aspect of the present invention, (5) the size of the block definition frame after resizing processing, for example, the size of the block definition frame E is set to cell pitches L _X and L _Y, and A block pattern that is repeatedly arranged at a predetermined number or more at the cell pitch is extracted from the mask patterns other than the pattern surrounded by E,
(7) A group of patterns corresponding to a one-shot block exposure size is extracted from the block patterns, and the group of patterns is set as a candidate block of the pattern for block exposure.

In general, there are many repetitive patterns in which the size of the block definition frame is set to the cell pitch. In this configuration, patterns other than those in the block definition frame are also used.
A repetitive pattern can be easily and quickly found, so that a block exposure pattern for efficient electron beam exposure can be extracted in a short time from hierarchically designed mask pattern data.

According to a second aspect of the present invention, in addition to the configuration of the present invention, in the (2) mask pattern data design stage, a structure name in which a large number of identical patterns are repeatedly arranged or a vertex angle other than a multiple of 45 ° is added. A structure name including an arbitrary angle pattern or a fine pattern having a short distance between vertices is designated. (7) Corresponding to one shot block exposure size from a pattern group in the designated structure after graphic processing and before development. The extracted pattern group is extracted, and this pattern group is set as a candidate block for the block exposure pattern.

[0013] In the case of this configuration as well, for patterns other than those in the block definition frame, similar to the pattern in the block definition frame, a block exposure pattern for efficiently performing electron beam exposure is obtained from mask pattern data designed hierarchically. Extraction can be performed in a shorter time than before. According to a third aspect of the present invention, (6) when extracting the candidate blocks from the mask pattern data after the graphic processing and before the expansion, based on the symmetric arrangement information of the structure, The symmetric candidate blocks are extracted so that there are more common candidate blocks in the arranged structure.

This symmetrical arrangement information is rotationally symmetrical and inverted symmetrical arrangement information. When the mask pattern data is hierarchically designed, the registered structure is rotated and / or rotated.
And information on the rotation angle, the presence / absence of inversion, and the axis of inversion symmetry in the case of the inverted arrangement. For example, the symbols F and the symbols obtained by inverting the symbols F attached to the structure B in the structure A in FIG. 6 represent symmetric arrangement information of the rotation angle of 0 ° and the Y-axis inversion.

With this configuration, it is possible to extract a more effective block exposure pattern having a large number of repeated arrangements. According to a fourth aspect of the present invention, in addition to the configuration of the present invention,
(7) When extracting a candidate block from the mask pattern data after the graphic processing and before the development, the structure of the same structure is arranged in descending order of the number of structures of the same structure in the hierarchy of interest and all the lower layers below it. The candidate block is extracted from within.

With this configuration, the block exposure pattern can be efficiently extracted in a shorter time. In the fifth aspect of the present invention, (4) when extracting a candidate block from the mask pattern data after the graphic processing and before the development, the same pattern group as the extracted candidate block is added to the configuration of the above invention. A search is performed from among the mask patterns, and the pattern group is excluded from the subsequent candidate block extraction processing.

Also in this case, a block exposure pattern can be efficiently extracted in a shorter time.

According to a sixth aspect of the present invention, in addition to the configuration of the above-mentioned invention, (8) a candidate block other than the candidate block based on the cell pitch is given the highest priority. (9) A predetermined number of the candidate blocks are selected from the one with the highest priority, and the selected candidate blocks are defined as a block exposure pattern. I do.

With this configuration, it is possible to selectively extract a block exposure pattern for performing electron beam exposure more efficiently.

[0020]

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 4, at the stage of designing the pattern of the parent structure 10, for example, the RAM, it is possible to identify a pattern having a large number of repeated arrangements and a fine pattern having a distance between vertices of a predetermined value or less. Therefore, for example, for a block pattern having a large number of repeated arrangements in the child structure 11, a block definition frame 11a that defines the range of the repeating unit
Set. This block pattern is, for example, a pattern of a basic cell. Further, a block definition frame 12a is set for the fine pattern in the child structure 12. Furthermore, a name assigned to a child structure 13 that has no connection with the surrounding pattern and does not change the pattern shape of the boundary portion due to graphic processing at the time of pattern development, for example, a structure of a set of contact holes is designated.

The design pattern of the semiconductor integrated circuit has a hierarchical structure as shown in FIGS. 5 and 6, for example. In the figure, A is a structure of the entire semiconductor chip, for example, a RAM, and a structure B which is repeatedly arranged;
Only one consisting Structure C ₁ and C ₂ Metropolitan is arranged. The structure B is configured by repeatedly arranging a structure D having several memory cells in a lattice pattern, and has a storage capacity of, for example, several M bits. In the structure D, four structures E, which are basic cells, are repeatedly arranged. Structure A is Structure B, C
It is written in ₁ and the arrangement data of the C _2, structure B is
Written in the arrangement data of the structure D, the structure D described by the arrangement data of the structure E, Structure E, C ₁ and C ₂ are described by the vector data is a set of coordinates of the vertices of each pattern. Hereinafter, structure A is defined as hierarchy 1, structures B, C ₁ and C ₂ are defined as hierarchy 2, structure D is defined as hierarchy 3, and structure E is defined as structure E.
Is a layer 4.

[0023] In the same manner as described above the design stage, as shown in FIG. 6, to structure E that are repeatedly arranged, set the block definition frame, with respect to the fine pattern in structure C _1, and set the block definition frame F deep. The block definition frame is set on another layer corresponding to the layer of the mask pattern data.

FIG. 2 shows an exposure data generation system.
The mask pattern design device 30 creates mask pattern data based on the data input from the input device 31, and stores the mask pattern data in the mask pattern data file 32. Also, from the input device 31, the setting data of the block definition frame, the designated structure name, the minimum and maximum values of the block size, the design shift value, and the graphic logical operation (AND, OR)
Etc.) Graphic processing information such as designation, layer information of design data (first
Wiring layer, second wiring layer, etc.) and exposure apparatus information such as manufacturing method, resizing designation, beam deflection range, etc. are input and stored in the control data file 33. The exposure data generation device 34 reads data from the mask pattern data file 32 and the control data file 33, generates exposure data for the electron beam exposure device based on the data, and stores it in the exposure data file 35. In this exposure data, the arrangement position of the block exposure pattern to be selected on the stencil mask, and the shot size and the number of shots of the pixel exposure are arranged in the scanning order.

Next, an exposure data generation procedure by the exposure data generation device 34 will be described with reference to FIG. Hereinafter, numerical values in parentheses indicate step identification numbers in the figure.

(40) Based on the graphic processing information from the control data file 33, processing such as resizing, shifting, and inter-structure graphic logical operation is performed. By this resizing, the block definition frame is also enlarged or reduced at the same rate as the pattern in the frame. Further, when a pattern slit and an overlap occur near the block definition frame after performing the enlargement / reduction process on the mask pattern, for example, the slit and the overlap Eliminate the wrap.

(41) The horizontal and vertical lengths L _X and L _Y of the resized rectangular block definition frame are stored as cell pitches.

(42) The hierarchy R is initialized to 1. The processing of the following steps 43 to 53 is a processing in which attention is paid to the hierarchy R and all the layers lower than the hierarchy R are considered. (42a) The pattern data of the structure having the largest number of structures having the same configuration is determined from the hierarchical mask pattern data of the hierarchy R and all the hierarchy lower than the hierarchy R, that is, the (n + 1−R) hierarchy. Alternatively, it is passed to a subroutine that performs the processing of the following steps 43 to 53. Such processing reduces processing time. In the case of FIG. 6, first, the pattern data in the structure E is passed.

(43, 44) The control data file 33 is read to check whether or not a block definition frame has been set. If so, the pattern in the frame is extracted from the mask pattern data file 32. In the case of FIG. 6, the pattern in the structure E is extracted.

(45) If the size of the block definition frame is equal to or larger than the minimum value of the block size and equal to or smaller than the maximum value, the block is set as a candidate block. The pattern in the block definition frame is divided to determine the candidate block, and if it is less than the minimum value of the block size, the pattern in the vicinity of the block definition frame is also extracted to determine the candidate block so that it becomes the minimum value or more and the maximum value or less. I do.

A number i is assigned to the determined candidate block, all the same blocks as the candidate block are detected and marked, the number i is assigned to identify the candidate block, and the number Ni of the same candidate block is counted. I do. This process can be easily performed before the development. When extracting another candidate block later, the candidate block already marked is excluded from the target, so that the processing time is shortened.

(46, 47) The control data file 33 is read to check whether or not a structure name is specified. If so, a pattern in the specified structure is extracted from the mask pattern data file 32.

(48) The same processing as in step 45 is performed on the pattern extracted from the designated structure.

(49-51) The mask pattern data file 32 is read to check whether there is any other pattern description structure.
It is searched whether there is the same pattern group as the candidate block i determined in (1), and if there is the same one, it is marked and numbered i to identify the candidate block, and the number Ni of the same candidate block is counted cumulatively. I do.

[0035] (52) Next, in cell pitch L _X, each of L _Y and a cell pitch L _X and L _Y, searching for a repeated pattern. This makes it possible to easily and quickly find a repetitive pattern. For example, the structure C in FIG.
₂ includes a repeating pattern of cell pitch L _X.

In addition, as shown in FIG. 7, for a relatively long arbitrary angle long pattern 20 having an apex angle other than a multiple of 45 °, a symmetrical structure including this arbitrary angle long pattern 20 has a different shape. Is determined, and if so, the arbitrary angle pattern 21 having this rotational symmetry is divided from the arbitrary angle long pattern 20. This is to make it a valid candidate block with a larger number of repeated arrangements.

(53) The same processing as in step 45 is performed on the repetitive pattern and the divided pattern found in step 52.

(54) The hierarchy R is incremented.

(55) If R <n, the above step 4
Return to 3.

(56) The above steps 45, 48 and 53
If the number of all the candidate blocks determined in (1) is larger than the upper limit of the number of block exposure patterns, a block exposure pattern for effectively performing electron beam exposure is selected from all the candidate blocks. The selection criterion is such that the candidate block determined based on the block definition frame and the designated structure name is given the highest priority.
And the product of the candidate block i and the number of pixels when the candidate block i is decomposed into pixels. The size of this pixel is made smaller for a finer pattern, and smaller than a 90 ° pattern in the case of an arbitrary angle pattern, corresponding to actual pixel exposure.

By the above processing, a block exposure pattern for efficiently performing electron beam exposure can be extracted from a hierarchically designed mask pattern in a shorter time.

(57) Next, the hierarchical mask pattern data is developed and converted into exposure data. At this time, among the candidate blocks marked in steps 45, 48, and 53, if the selected block matches the selected block exposure pattern, the block is converted into block exposure data (block identification code). If not, it is converted to pixel exposure data.

[0043]

As described above, according to the block exposure pattern extraction method of the present invention, a block exposure pattern for efficiently performing electron beam exposure can be obtained from a hierarchically designed mask pattern data as compared with the conventional one. It has an excellent effect that it can be extracted in a short time, and greatly contributes to the improvement in productivity of an LSI with a high degree of integration.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the principle configuration of a block exposure pattern extraction method according to the present invention.

FIG. 2 is a configuration diagram of a system that generates exposure data from mask pattern data.

FIG. 3 is a flowchart illustrating an exposure data generation procedure.

FIG. 4 is an explanatory diagram of a block definition frame and a designated structure for mask pattern data.

FIG. 5 is a diagram illustrating a hierarchical structure of a mask pattern.

FIG. 6 is an explanatory diagram of FIG. 5;

FIG. 7 is an explanatory diagram of extracting a symmetry pattern in consideration of symmetric arrangement information of a structure.

[Explanation of symbols]

10 parent structure 11, 12, 13 children structure 11a, 12a block definition frame 20 any angle long pattern 21 arbitrary angle pattern _{A, B, C 1, C} 2, D, E structure

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/027 G03F 7/20 G06F 17/50

Claims (8)

(57) [Claims] 1. A block exposure pattern for extracting a block exposure pattern formed on an electron beam transmission mask in a predetermined number and having a desired cross section through an electron beam from mask pattern data for a semiconductor integrated circuit designed hierarchically. In the pattern extraction method, in the mask pattern data design stage, a block definition frame (E) surrounding a region of the basic cell is set in a hierarchy in which the basic cells are arranged in an array, and a resizing process for the mask pattern is performed. Is also performed on the block definition frame, if a pattern slit and overlap occurs in the vicinity of the block definition frame after performing the scaling process on the mask pattern, eliminate the slit and the overlap, One shot block is selected from the pattern group in the block definition frame after graphic processing and before development. A pattern group corresponding to a block exposure size, and extracting the pattern group as a candidate block of the block exposure pattern. 2. The size of the block definition frame (E) after the resizing process is defined as a cell pitch (L _X , L _Y ), and the size of the mask pattern other than the pattern surrounded by the block definition frame (E) A block pattern repeatedly arranged at a predetermined number or more at the cell pitch is extracted from the block pattern, a pattern group corresponding to a one-shot block exposure size is extracted from the block pattern, and the pattern group is used as a candidate block of the block exposure pattern. The method for extracting a pattern for block exposure according to claim 1, wherein 3. The step of designing mask pattern data,
Arbitrary angle pattern having apical angles other than multiples of 45 ° (2
0) or a block definition frame surrounding a region including a fine pattern in which the distance between vertices is equal to or less than a predetermined value, and 1 out of a group of patterns in the block definition frame after graphic processing and before development. The method according to claim 1 or 2, wherein a pattern group corresponding to a shot block exposure size is extracted, and the pattern group is used as a candidate block for the block exposure pattern. 4. The step of designing mask pattern data,
A structure name in which the same pattern is repeatedly arranged many times, or a structure name including an arbitrary angle pattern (20) having an apex angle other than a multiple of 45 ° or a fine pattern having a short distance between vertices is designated. A pattern group corresponding to a one-shot block exposure size is extracted from a pattern group in the designated structure after and before development, and the pattern group is used as a candidate block for the block exposure pattern. Item 4. The method for extracting a pattern for block exposure according to any one of Items 1 to 3. 5. When extracting the candidate block from the mask pattern data after the graphic processing and before the development, the target layer and all the lower layers are extracted.
The method according to any one of claims 1 to 4, wherein the candidate blocks are extracted from the structures in the descending order of the number of structures having the same configuration. 6. When extracting the candidate block from the mask pattern data after the graphics processing and before the development, the same pattern group as the extracted candidate block is searched from the mask pattern, and the pattern group is searched. Is excluded from the candidate block extraction processing thereafter. The pattern exposure method for block exposure according to any one of claims 1 to 5, wherein 7. When extracting the candidate block from the mask pattern data after the graphic processing and before the development, based on the symmetric arrangement information of the structure, the common candidate block in the structures symmetrically arranged with each other is more likely to be extracted. The method according to any one of claims 1 to 6, wherein the candidate blocks that are symmetric so as to exist are extracted. 8. The candidate block according to claim 1, 3, 3 or 4 is given the highest priority.
The priority order is determined based on the fineness of the pattern and whether the pattern is an arbitrary angle pattern, the predetermined number of the candidate blocks are selected from the higher priority order, and the selected candidate blocks are referred to as the block exposure pattern. A pattern extraction method for block exposure.