JP3109347B2 - Two-way communication device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-way communication device used in the field of mobile communication.

[0002]

2. Description of the Related Art A conventional two-way communication device will be described below. In FIG. 3, a conventional two-way communication apparatus includes a modulation input terminal 51a to which a modulation signal is supplied, a transmission voltage controlled oscillator (hereinafter referred to as a transmission VCO) 52a connected to the modulation input terminal 51a, and a transmission VCO 52a. Drive amplifier 53a to which the output of VCO 52a is connected, and output amplifier 54a to which the output of drive amplifier 53a is connected
And the transmission R connected to the output of the output amplifier 54a.
A transmitting unit (not shown) including an F filter 55a, an antenna terminal 56a to which the output of the transmitting RF filter 55a is connected; a receiving RF filter 57a connected to the antenna terminal 56a; An RF amplifier 58a to which the output of the receiving RF filter 57a is connected, and an interstage filter 5 to which the output of the RF amplifier 58a is connected
9a and the output of the inter-stage filter 59a are connected to one input, and the output of the first receiving local oscillator voltage controlled oscillator (hereinafter referred to as the first receiving local oscillator VCO) 61a is connected to the other input. A first mixing circuit 60a, a first intermediate frequency filter (hereinafter, referred to as a first IF filter) 62a to which the output of the first mixing circuit 60a is connected, and a first intermediate frequency filter connected to the output of the first IF filter 62a. An amplifier (hereinafter referred to as a first IF amplifier) 63a, a second mixing circuit 64a having an output of the first IF amplifier 63a connected to one input and an output of a reference oscillator 69a connected to the other input; Second mixing circuit 64
a receiving section (not shown) composed of a demodulation circuit 65a to which the output of a is connected, a demodulation output terminal 66a to which the output of the demodulation circuit 65a is connected, and the output of the transmission VCO are connected. Transmission PLL circuit 67a, and a reception PLL circuit to which the output of the transmission PLL circuit 67a is connected to the voltage control input terminal of the transmission VCO and the output of the reception first local oscillator VCO 61a is connected. 68
a, and the output of the receiving PLL circuit 68a is connected to the voltage control input terminal of the receiving first local oscillator VCO 61a,
The transmission PLL circuit 67a and the reception PLL circuit 6
8a is provided with a PLL synthesizer unit configured by connecting a reference oscillator 69a. The reference oscillator 69a is configured by a CMOS crystal oscillator, and includes the transmitting VCO 52a, the receiving first local oscillator VCO 61a, ,
The transmitting PLL circuit 67a, the receiving PLL circuit 68a, and the first mixing circuit 60a are contained in the same integrated circuit.

The two-way communication device configured as described above will be described below. In the transmission system, the modulation input terminal 51
The transmission VCO 52a is modulated by the modulation signal input from the a. The output signal of the transmission VCO 52a is input to the drive amplifier 53a, and the output signal amplified by the drive amplifier 53a is input to the output amplifier 54a.
The output signal further amplified by the output amplifier 54a is input to a transmission RF filter 55a.
A signal is output from 6a.

In a receiving system, a received signal input from an antenna terminal 56a passes through a receiving RF filter 57a.
The received signal input to the RF amplifier 58a and amplified by the RF amplifier 58a is input to one input terminal of the first mixing circuit 60a via the interstage filter 59a. To the other input terminal of the first mixing circuit 60a, the output signal of the receiving first local oscillator VCO 61a is input. The received signal frequency-converted by the first mixing circuit 60a is output from the output terminal of the first mixing circuit 60a, and is passed through the first IF filter 62a to the first IF amplifier 6a.
3a. The received signal amplified by the first IF amplifier 63a is input to one input terminal of the second mixing circuit 64a. The output signal of the reference oscillator 69a is input to the other input terminal of the second mixing circuit 64a. The received signal frequency-converted by the second mixing circuit 64a is output from the second mixing circuit 64a and input to the demodulation circuit 65a. The output demodulated by the demodulation circuit 65a is output as a demodulated signal from a demodulation output terminal 66a.

[0005] The synthesizer section includes a transmission-side PLL loop and a reception-side PLL loop. First, the transmission-side PLL loop includes the reference oscillator 69 used for both transmission and reception.
a, a transmission PLL circuit 67a, and a transmission VCO 52a.
And formed. Next, the receiving PLL loop includes a receiving PLL circuit 68a, a receiving first local oscillator VCO 61a,
It is formed by the reference oscillator 69a. And each frequency is stabilized. Here, the reference oscillator 69a is shared with the second mixing circuit 64a.

[0006]

However, in such a conventional configuration, the reference oscillator 69a is composed of an oscillation circuit using CMOS transistors, and the CMO
In the case of the S-type reference oscillator, many harmonics are generated with respect to the fundamental wave. Therefore, when the transmission and reception VCOs and the CMOS reference oscillator are configured in a one-chip LSI, a large number of spurious components are generated due to the interference between the oscillators.
There is a difficult problem such as collapse of a channel used as a two-way communication device.

[0007] An object of the present invention is to provide a bidirectional communication device with less spurious interference.

[0008]

In order to achieve this object, a two-way communication apparatus according to the present invention comprises a receiving second local oscillator comprising a bipolar crystal oscillator, and an output of the receiving second local oscillator being supplied to the PLL. A voltage-controlled oscillator for transmission is supplied to a reference input terminal of the synthesizer unit,
A local oscillation voltage-controlled oscillator, a transmission PLL circuit, a reception PLL circuit, and a first mixing circuit are formed in a first integrated circuit, and a reception second local oscillator, a second mixing circuit, and a demodulation circuit are provided. Are configured in the second integrated circuit.

[0009]

According to this configuration, since the second local oscillator of reception is constituted by a bipolar crystal oscillator, the load capacitance of the reference oscillator is increased, so that it is hardly affected by the stray capacitance. A certain oscillator becomes feasible. Also, since the output of the received second local oscillator integrated in the second integrated circuit is back injected into the PLL synthesizer integrated in the first integrated circuit, the number of oscillators in the first integrated circuit is reduced. Is reduced, the spurious interference characteristics due to the mutual interference of the oscillators can be improved, and a two-way communication device with less channel collapse can be realized.

[0010]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a two-way communication device according to one embodiment of the present invention.

In FIG. 1, a bidirectional communication apparatus according to the present invention includes a modulation input terminal 51 to which a modulation signal is supplied, a transmission VCO 52 connected to the modulation input terminal 51, and an output of the transmission VCO 52. Drive amplifier 5
3, an output amplifier 54 to which the output of the drive amplifier 53 is connected, a transmission RF filter 55 to which the output of the output amplifier 54 is connected, and a transmission RF filter 5
A transmitting section (not shown) is constituted by the antenna terminal 56 to which the output of the fifth section 5 is connected.

Further, a receiving RF filter 57 connected to the antenna terminal 56, and a receiving RF filter 57
, An inter-stage filter 59 to which the output of the RF amplifier 58 is connected, and an output of the inter-stage filter 59 connected to one input and a VCO 61 for receiving the first local oscillator. A first mixing circuit 60 having an output connected to the other input, a first IF filter 62 having an output connected to the first mixing circuit 60,
First IF amplifier 63 connected to the output of F filter 62
A second mixing circuit 64 having an output of the first IF amplifier 63 connected to one input and an output of the second receiving local oscillator 70 connected to the other input; and an output of the second mixing circuit 64. And a demodulation output terminal 66 to which the output of the demodulation circuit 65 is connected, constitutes a receiving unit (not shown).

A transmission PLL circuit 67 to which the output of the transmission VCO 52 is connected,
The output of the L circuit 67 is connected to the voltage control input terminal of the transmission VCO 52. Also, the VC for the first station receiving the signal
O61 is connected to the receiving PLL circuit 68, and the output of the receiving PLL circuit 68 is connected to the receiving first local oscillator V.
It is connected to the voltage control input terminal of CO61. Here, the transmission PLL circuit 67 and the reception PLL circuit 68 constitute a PLL synthesizer unit with the reception second local oscillator 70 supplied from the reference input terminal. The second receiving local oscillator 70 is constituted by a bipolar crystal oscillator. The output of the second local oscillator 70 is supplied to a reference input terminal of the PLL synthesizer via a buffer amplifier 71. Here, the first integrated circuit includes the transmitting VCO 52, the receiving first local oscillator VCO 61, the transmitting PLL circuit 67, and the receiving PCO.
An LL circuit 68 and a first mixing circuit 60 are provided, and a second integrated circuit includes a receiving second local oscillator 70, the second mixing circuit 64, and the demodulation circuit 65. In addition,
A buffer amplifier 71 is connected between the output of the receiving second local oscillator 70 and the reference input terminal of the PLL synthesizer unit to prevent interference between the first integrated circuit and the oscillation frequency in the second integrated circuit. Has been reduced.

The operation of the two-way communication device configured as described above will be described below. First, in the transmission system,
VC signal for transmission using the modulation signal input from modulation input terminal 51
O52 is modulated, the output signal of the transmission VCO 52 is input to a drive amplifier 53, the output signal amplified by the drive amplifier 53 is input to an output amplifier 54, and the output signal further amplified by the output amplifier 54 The signal is input to the transmission RF filter 55, and the transmission RF filter 55
The signal outside the required band is attenuated by the F filter 55 and a signal is output from the antenna terminal 56.

On the other hand, in the receiving system, a received signal input from an antenna terminal 56 is passed through an RF filter 57 for reception.
The signal is input to the RF amplifier 58. The received signal amplified by the RF amplifier 58 is passed through an inter-stage filter 59,
The signal is input to one input terminal of the first mixing circuit 60. The other input terminal of the first mixing circuit 60 has a receiving first
The output signal of the local oscillator VCO 61 is input. The received signal frequency-converted by the first mixing circuit 60 is output from the output terminal of the first mixing circuit 60 and input to the first IF amplifier 63 via the first IF filter 62. The received signal amplified by the first IF amplifier 63 is input to one input terminal of the second mixing circuit 64. The output signal of the second receiving local oscillator 70 is input to the other input terminal of the second mixing circuit 64. The received signal frequency-converted by the second mixing circuit 64 is input to the demodulation circuit 65. The output demodulated by the demodulation circuit 65 is output from a demodulation output terminal 66 as a demodulated signal.

The synthesizer section includes a transmission-side PLL loop and a reception-side PLL loop. First, the transmission-side PLL loop includes a reception second local oscillator 70 used for both transmission and reception, a transmission PLL circuit 67, and a transmission VCO 52. Next, the receiving-side PLL loop is formed by the receiving second local oscillator 70, the receiving PLL circuit 68, and the receiving first local oscillator VCO 61. Also, FIG.
As shown in the dotted line, the transmitting VC
O52, a transmission PLL circuit 67, a reception PLL circuit 68, a reception first local oscillator VCO 61, and a first mixing circuit 6.
0 is implemented as a one-chip configuration in the first integrated circuit.

That is, the main difference from the conventional example shown in FIG. 3 is that the second receiving local oscillator 70 is built in a demodulating IC (second integrated circuit) in which a demodulating circuit 65 is integrated. A buffer amplifier 71 is provided for the purpose of securing the operation and stabilizing the output level of the reception second local oscillator 70.

FIG. 2 is a specific circuit diagram of the second receiving local oscillator 70 and the buffer amplifier 71 in one embodiment of the present invention. First, the circuit configuration will be described with reference to FIG. The base terminal 104 of the bipolar transistor Q1 built in the demodulation IC 102 is connected to the demodulation IC 10
2 is connected to the first pin. Emitter terminal 105
Is connected to the second pin of the demodulation IC 102. Further, a feedback capacitor C1 is connected between the first and second pins of the demodulation IC 102, a feedback capacitor C2 is connected between the second pin of the demodulation IC 102 and GND, and a variable capacitance trimmer CT1 used for adjusting frequency variation is connected. A crystal oscillator 103 is connected between the first pin of the demodulation IC 102 and GND to form a Colpitts oscillation circuit. A power supply resistor R3 is connected to the collector terminal of the bipolar transistor Q2, and a power supply resistor R2 is connected between the collector terminal and the base terminal to form a buffer amplifier. In addition, a coupling capacitor C3 connected in series from the output of the Colpitts oscillation circuit and a base of a buffer amplifier transistor Q2 via an attenuator resistor R1 are connected to a coupling capacitor C4 from an output of the buffer amplifier 71.
Through the PLL reference input terminal (L
(Pin S12).

The improvement effect of this circuit configuration will be described. The use of a bipolar reference oscillator as the reference oscillator increases the load capacitance and makes it less susceptible to stray capacitance. Therefore, high accuracy (frequency deviation ± 4 ppm)
And stable up to 20 MHz band (Oscillation margin 150Ω or more)
This results in an oscillation circuit.

Further, compared with the CMOS type reference oscillator, harmonic components can be reduced (30 dBc), and the output of the reference oscillator (the second receiving local oscillator 70) is supplied to the first integrated circuit. Since the number of oscillation circuits in one integrated circuit can be reduced, spurious interference due to each oscillation circuit is less likely to occur. Therefore, the collapse of the channel of the two-way communication device is reduced.

Further, by adding the buffer amplifier 71, it is possible to prevent the backflow of the oscillating component from the transmitting VCO 52, the receiving first local oscillator VCO 61 and the transmitting PLL circuit 67 and the receiving PLL circuit 68 to the demodulating circuit 65. Can be.

Further, the addition of the attenuator resistor R1 (see FIG. 2) makes it possible to optimize the oscillation component input to the reference input terminal of the first integrated circuit 101. Therefore, this circuit configuration can be said to be the most suitable configuration when the transmission / reception VCOs 52 and 61 and the PLL circuits 67 and 68 are configured as one chip.

[0023]

As described above, in the bidirectional communication apparatus according to the present invention, the second receiving local oscillator is constituted by a bipolar crystal oscillator, and the output of the second receiving local oscillator is applied to the PL.
While supplying to the reference input terminal of the L synthesizer section,
A transmission voltage-controlled oscillator, a reception first local oscillation voltage-controlled oscillator, a transmission PLL circuit, a reception PLL circuit,
By configuring the mixing circuit in the first integrated circuit and configuring the second receiving local oscillator, the second mixing circuit, and the demodulation circuit in the second integrated circuit, the load capacity of the reference oscillator increases. Therefore, the oscillator is less susceptible to the stray capacitance, and an oscillator with high accuracy and oscillation allowance can be realized.

Also, the reception second integrated in the second integrated circuit
The output of the local oscillator is integrated with P integrated on a first integrated circuit.
The number of oscillators in the first integrated circuit is reduced due to the back injection into the LL synthesizer section, the spurious interference characteristics due to the mutual interference of the oscillators can be improved, and a two-way communication device with less channel collapse is realized. It becomes possible.

[Brief description of the drawings]

FIG. 1 is a block diagram of a two-way communication device according to an embodiment of the present invention.

FIG. 2 is a main part circuit diagram of the same.

FIG. 3 is a block diagram of a conventional two-way communication device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 51 modulation input terminal 52 transmission VCO 53 drive amplifier 54 output amplifier 55 transmission RF filter 56 antenna terminal 57 reception RF filter 58 RF amplifier 59 interstage filter 60 first mixing circuit 61 reception first local oscillator VCO 62 first IF Filter 63 first IF amplifier 64 second mixing circuit 65 demodulation circuit 66 demodulation output terminal 67 transmission PLL circuit 68 reception PLL circuit 70 reception second local oscillator 71 buffer amplifier 101 first integrated circuit 102 second integrated circuit

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Naoto Okura 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-6-152466 (JP, A) 65564 (JP, U) (58) Field surveyed (Int. Cl. ⁷ , DB name) H04B 1/10 H04B 1/26 H04B 1/38-1/50

Claims (2)

(57) [Claims] A modulation input terminal to which a modulation signal is supplied;
The transmission voltage controlled oscillator connected to the modulation input terminal, the drive amplifier connected to the output of the transmission voltage controlled oscillator, the output amplifier connected to the output of the drive amplifier, and the output of the output amplifier A transmitting unit including a connected transmitting RF filter, an antenna terminal to which an output of the transmitting RF filter is connected, a receiving RF filter connected to the antenna terminal, and a receiving RF filter. An RF amplifier to which an output is connected, a first mixing circuit to which the output of the RF amplifier is supplied to one input and the output of a receiving first local oscillation voltage-controlled oscillator connected to the other input; A second mixing circuit in which the output of the first mixing circuit is provided to one input and the output of the receiving second local oscillator is connected to the other input;
A receiving section including a demodulation circuit to which the output of the second mixing circuit is connected, a demodulation output terminal to which the output of the demodulation circuit is connected, and a transmission section connected to the output of the transmission voltage controlled oscillator. A reliable PLL circuit, and an output of the transmission PLL circuit connected to a voltage control input terminal of the transmission voltage controlled oscillator, and a reception PLL circuit connected to an output of the reception first local oscillation voltage controlled oscillator. The output of the receiving PLL circuit is connected to a voltage control input terminal of the first local oscillation voltage-controlled oscillator, and a reference input terminal is connected to the transmitting PLL circuit and the receiving PLL circuit. A configured PLL synthesizer section,
The second receiving local oscillator is constituted by a bipolar crystal oscillator, an output of the second receiving local oscillator is supplied to a reference input terminal of the PLL synthesizer section, and the transmission voltage control oscillator and the first receiving local oscillator are provided. A starting voltage controlled oscillator, the transmitting PLL circuit, the receiving PLL circuit, and the first mixing circuit are configured in a first integrated circuit, and the receiving second local oscillator, the second mixing circuit, Circuit and
A two-way communication device comprising the demodulation circuit and a second integrated circuit. 2. The bidirectional communication device according to claim 1, wherein a buffer amplifier is connected between an output of the second receiving local oscillator and a reference input terminal of the PLL synthesizer.