JP3108546B2 - Detector redundancy system error handling device - Google Patents

Detector redundancy system error handling device

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Publication number
JP3108546B2
JP3108546B2 JP04255179A JP25517992A JP3108546B2 JP 3108546 B2 JP3108546 B2 JP 3108546B2 JP 04255179 A JP04255179 A JP 04255179A JP 25517992 A JP25517992 A JP 25517992A JP 3108546 B2 JP3108546 B2 JP 3108546B2
Authority
JP
Japan
Prior art keywords
circuit
signal
moving average
value
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP04255179A
Other languages
Japanese (ja)
Other versions
JPH06109496A (en
Inventor
通夫 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP04255179A priority Critical patent/JP3108546B2/en
Publication of JPH06109496A publication Critical patent/JPH06109496A/en
Application granted granted Critical
Publication of JP3108546B2 publication Critical patent/JP3108546B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Testing Or Calibration Of Command Recording Devices (AREA)
  • Feedback Control In General (AREA)
  • Safety Devices In Control Systems (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、紙パルプ、鉄鋼、石油
精製、石油化学、食品、薬品、水道、電力、セメントな
ど、あらゆる産業分野に利用できる検出器冗長化システ
ム異常処理装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a detector redundant system abnormality processing apparatus which can be used in various industrial fields such as pulp and paper, steel, petroleum refining, petrochemical, food, medicine, water supply, electric power, cement and the like.

【0002】[0002]

【従来の技術】従来の技術では、検出器が同一測定点に
2台以上設置されている場合、片系異常信号にての単純
な切り換えであった。従って、検出器異常時の信号切り
換えが、バンプレスでなく制御演算にも支障があった。
2. Description of the Related Art In the prior art, when two or more detectors are installed at the same measurement point, simple switching based on a one-system abnormal signal is performed. Therefore, the signal switching when the detector is abnormal has a problem not only in bumpless but also in control calculation.

【0003】[0003]

【発明が解決しようとする課題】本発明では、検出器が
同一測定点に2台以上設置されている場合、測定信号の
平滑化と、片系異常時の測定信号のバンプレス切り換え
を目的とする。
SUMMARY OF THE INVENTION In the present invention, when two or more detectors are installed at the same measurement point, the object of the present invention is to smooth the measurement signal and to switch the bumpless measurement signal when one system is abnormal. I do.

【0004】[0004]

【課題を解決するための手段】本発明は、冗長化したシ
ステムの検出器に接続されて過去の測定信号値と現在の
測定信号値とを入力し、時間的に変化したシステム検出
値の移動平均値を算出する移動平均回路と、この移動平
均回路の出力値が予め定められた範囲内にあるか否かに
よって異常状態を判定し、移動平均回路の出力回路を切
り替えて接続する信号切替回路と、移動平均回路と信号
切替回路とからなる複数の直列回路に接続されて複数の
移動平均値を入力し、複数の移動平均値の算術的平均値
を算出する算術平均回路と、検出器の補助回路に接続さ
れ、過去の測定信号値または現在の測定信号値に対応す
る対応信号値を入力し、対応信号値を反転して出力する
複数の信号反転回路と、これら複数の信号反転回路から
の出力信号の論理和を演算する論理和回路と、この論理
和回路の出力信号によって算術平均回路の出力値の変化
率を制御する変化率制限回路とを具備してなる検出器冗
長化システム異常処理装置である。
SUMMARY OF THE INVENTION According to the present invention, a system is provided which is connected to a detector of a redundant system, receives a past measured signal value and a present measured signal value, and shifts a time-varying system detected value. A moving average circuit for calculating an average value, and a signal switching circuit for determining an abnormal state by determining whether an output value of the moving average circuit is within a predetermined range and switching and connecting the output circuit of the moving average circuit. An arithmetic averaging circuit connected to a plurality of series circuits each including a moving average circuit and a signal switching circuit and inputting a plurality of moving average values, and calculating an arithmetic average value of the plurality of moving average values; and A plurality of signal inverting circuits connected to the auxiliary circuit, inputting a corresponding signal value corresponding to a past measured signal value or a current measured signal value, inverting and outputting the corresponding signal value, and a plurality of signal inverting circuits. Output signal logic A logical OR circuit for calculating an a detector redundancy system abnormality processing apparatus formed by and a change rate limiting circuit for controlling the rate of change in the output value of the arithmetic mean circuit by an output signal of the OR circuit.

【0005】[0005]

【作用】本発明の検出器冗長化システム異常処理装置に
おいては、冗長化したシステムの検出器に接続されて過
去の測定信号値と現在の測定信号値とを入力し、時間的
に変化したシステム検出値の移動平均値を算出し、移動
平均回路の出力値が予め定められた範囲内にあるか否か
によって異常状態を判定し、移動平均回路の出力回路を
切り替えて接続し、移動平均回路と信号切替回路とから
なる複数の直列回路に算術平均回路を接続して複数の移
動平均値を入力し、複数の移動平均値の算術的平均値を
算出し、検出器の補助回路に信号反転回路を接続し、過
去の測定信号値または現在の測定信号値に対応する対応
信号値を入力し、対応信号値を反転して出力し、複数の
信号反転回路からの出力信号の論理和を演算し、論理和
回路の出力信号によって算術平均回路の出力値の変化率
を制限する。
According to the detector redundant system abnormality processing apparatus of the present invention, a system which is connected to a detector of a redundant system, receives a past measured signal value and a present measured signal value, and changes the temporally changed system signal value. Calculating a moving average of the detected values, determining an abnormal state by determining whether an output value of the moving average circuit is within a predetermined range, switching and connecting the output circuit of the moving average circuit, and Arithmetic averaging circuit is connected to a plurality of series circuits consisting of a circuit and a signal switching circuit, and a plurality of moving average values are inputted, an arithmetic average value of a plurality of moving average values is calculated, and a signal is inverted to an auxiliary circuit of the detector. Connect the circuit, input the corresponding signal value corresponding to the past measurement signal value or the current measurement signal value, invert the corresponding signal value and output, and calculate the logical sum of the output signals from multiple signal inversion circuits To the output signal of the OR circuit. Limiting the rate of change in the output value of the arithmetic mean circuit I.

【0006】[0006]

【実施例】次に本発明の一実施例を説明する。図1にお
いて、1,2は冗長化したシステムの検出器に接続され
て過去の測定信号値AI1と現在の測定信号値AI1A
とを入力し、時間的に変化したシステム検出値の移動平
均値を算出する移動平均回路、3は移動平均回路1,2
の出力値が予め定められた範囲内にあるか否かによって
異常状態を判定し、移動平均回路1,2の出力回路を切
り替えて接続する信号切替回路、5は移動平均回路1,
2と信号切替回路3,4とからなる複数の直列回路に接
続されて複数の移動平均値を入力し、複数の移動平均値
の算術的平均値を算出する算術平均回路、6,7検出器
の補助回路に接続され、過去の測定信号値または現在の
測定信号値に対応する対応信号値AI1A,AI2Aを
入力し、対応信号値を反転して出力する複数の信号反転
回路、8は複数の信号反転回路6,7からの出力信号の
論理和を演算する論理和回路、9は論理和回路8の出力
信号によって算術平均回路5の出力値の変化率を制限す
る変化率制限回路であり、検出器が同一測定点に2台以
上設置されている場合、測定信号の移動平均処理をする
移動平均回路1,2と、検出器(測定信号)異常時、異
常信号を切り離す信号切換器3,4と、2台以上の測定
信号の平均処理する算術平均回路5と、検出器(測定信
号)正常/異常信号を反転する信号反転回路6,7と、
検出器(測定信号)異常時に算術平均回路5に変化率制
限を加える変化率制限回路9により構成される検出器冗
長化システム異常処理装置である。
Next, an embodiment of the present invention will be described. In FIG. 1, reference numerals 1 and 2 are connected to detectors of a redundant system to measure a past measured signal value AI1 and a current measured signal value AI1A.
, And a moving average circuit 3 for calculating a moving average value of the system detection value that has changed over time.
An abnormal state is determined based on whether or not the output value of the moving average circuit 1 is within a predetermined range.
An arithmetic averaging circuit which is connected to a plurality of series circuits composed of a circuit 2 and signal switching circuits 3 and 4 and receives a plurality of moving average values and calculates an arithmetic average of the plurality of moving average values; , A plurality of signal inverting circuits for inputting corresponding signal values AI1A and AI2A corresponding to past measured signal values or current measured signal values, inverting corresponding signal values, and outputting the inverted signal values. An OR circuit 9 for calculating the OR of the output signals from the signal inverting circuits 6 and 7; a change rate limiting circuit 9 for limiting the change rate of the output value of the arithmetic averaging circuit 5 by the output signal of the OR circuit 8; When two or more detectors are installed at the same measurement point, moving average circuits 1 and 2 that perform moving average processing of a measurement signal, and a signal switch 3 that separates an abnormal signal when a detector (measurement signal) is abnormal. 4 and average processing of two or more measurement signals. The arithmetic mean circuit 5, a signal inverting circuit 6 which inverts the detector (measurement signal) normal / abnormal signal,
This is a detector redundancy system abnormality processing device comprising a change rate limiting circuit 9 for limiting a change rate to the arithmetic averaging circuit 5 when a detector (measurement signal) is abnormal.

【0007】本実施例では、測定信号の平滑化をするた
めに、移動平均(MAV)と算術平均の手段を用い、バ
ンプレス切り換えを実現するために、変化率制限(ΔL
M)の手段を用いる。
In this embodiment, moving average (MAV) and arithmetic averaging are used to smooth the measurement signal, and the change rate limit (ΔL
M) is used.

【0008】移動平均(MAV)は、アナログ入力(A
I1,AI2)の過去と現在のデータの平均であり、算
術平均は、移動平均されたアナログ入力AI1,AI2
の平均である。両方とも測定信号(アナログ入力)の平
滑化が、目的である。
The moving average (MAV) is calculated based on the analog input (A
I1, AI2) is the average of the past and present data, and the arithmetic average is the moving averaged analog input AI1, AI2.
Is the average of Both are aimed at smoothing the measurement signal (analog input).

【0009】変化率制限(ΔLM)は、算術平均(AV
E)の出力の変化率を制限するものでアナログ入力異常
時のみ動作する。
The rate-of-change limit (ΔLM) is calculated based on the arithmetic mean (AV
E) limits the rate of change of the output and operates only when an analog input is abnormal.

【0010】図1は、本発明による検出器冗長化システ
ム異常処理装置のブロック図、図2は、本発明と関連あ
る検出器正常判定ブロック図である。
FIG. 1 is a block diagram of an abnormality processing apparatus for a detector redundancy system according to the present invention, and FIG. 2 is a block diagram of a detector normality determination related to the present invention.

【0011】図1の移動平均回路1,2は移動平均の機
能であり、測定信号(アナログ入力)AI1,AI2の
過去と現在のデータの平均を行う。信号切換器3,4
は、移動平均後の測定信号の切換器であり、測定信号が
異常であれば、その異常信号を切り離す。算術平均回路
5は、移動平均後の測定信号の算術平均の機能であり、
通常は、2つの信号の平均であるが、片系異常時は、正
常系のみの平均となる。信号反転回路6,7は、信号反
転機能であり、論理和回路8は論理和演算機能である。
変化率制限回路9は、変化率制限機能であり、測定信号
異常時に変化率制限がかかる。
The moving average circuits 1 and 2 shown in FIG. 1 have a function of moving average, and average the past and present data of the measurement signals (analog input) AI1 and AI2. Signal switch 3, 4
Is a switch for the measurement signal after the moving average, and if the measurement signal is abnormal, disconnects the abnormal signal. The arithmetic averaging circuit 5 is a function of arithmetic averaging of the measurement signal after the moving average,
Normally, this is the average of two signals, but when one system is abnormal, the average is only the normal system. The signal inverting circuits 6 and 7 have a signal inverting function, and the OR circuit 8 has an OR operation function.
The rate-of-change limiting circuit 9 is a rate-of-change limiting function, and limits the rate of change when a measurement signal is abnormal.

【0012】移動平均回路1,2は、測定信号No.
1,2の移動平均処理を行う。移動平均とは、1個以上
の過去の測定信号と現在の測定信号の平均であり、過去
の測定信号の数は、測定信号の種類(温度、圧力、流
量、成分等)により選択する。移動平均を行う条件は、
それぞれの測定信号が正常時である。
The moving averaging circuits 1 and 2 output the measurement signal Nos.
The moving average processing of 1 and 2 is performed. The moving average is the average of one or more past measurement signals and the current measurement signal, and the number of past measurement signals is selected according to the type of the measurement signal (temperature, pressure, flow rate, component, etc.). The conditions for moving average are
Each measurement signal is normal.

【0013】信号切換器3,4は、測定信号が正常であ
れば、それぞれ対応する測定信号を選択するが、異常時
は、正常な測定信号側に切り替わり、異常信号を排除す
る。算術平均回路5の算術平均(AVE)は、測定信号
間のばらつきを補正するためにある。
When the measurement signals are normal, the signal switches 3 and 4 select the corresponding measurement signals. However, when the measurement signals are abnormal, the signal switches are switched to the normal measurement signal side to eliminate the abnormal signals. Arithmetic averaging (AVE) of the arithmetic averaging circuit 5 is for correcting variations between measurement signals.

【0014】変化率制限器9は測定信号異常時に算術平
均回路5の算術平均値が急変するのを防ぐ。
The change rate limiter 9 prevents the arithmetic average value of the arithmetic average circuit 5 from changing suddenly when the measurement signal is abnormal.

【0015】図2は、測定信号の検出器正常判定ブロッ
ク図である。検出器が正常なのは、測定信号21,22
の電圧レベルが、0.7V以上、5.12V以下の場合
であり、それ以外は異常と判定する。
FIG. 2 is a block diagram of a detector for determining whether or not a measurement signal is normal. The detector is normal because the measurement signals 21 and 22
Is 0.7V or more and 5.12V or less, otherwise, it is determined to be abnormal.

【0016】[0016]

【発明の効果】本発明考案は、検出器が同一測定点に2
台以上設置されている場合、片系が異常となっても、制
御変数は急変せず、また、変数の平滑化の効果がある。
According to the invention of the present invention, two detectors are set at the same measurement point.
If more than one unit is installed, even if one of the systems becomes abnormal, the control variables do not change suddenly, and the effect of smoothing the variables is obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による検出器冗長化システム異常処理装
置のブロック構成図である。
FIG. 1 is a block diagram showing a configuration of an abnormality processing apparatus for a redundant detector system according to the present invention.

【図2】測定信号の検出器正常判定ブロック図説明図で
ある。
FIG. 2 is an explanatory diagram of a detector normal determination block diagram of a measurement signal.

【符号の説明】[Explanation of symbols]

1,2…移動平均回路 3,4…信号切換器 5…算術平均回路 6,7…信号反転回路 8…論理和回路 9…変化率制限回路 1, 2, moving average circuit 3, 4, signal switcher 5, arithmetic averaging circuit 6, 7, signal inversion circuit 8, OR circuit 9, change rate limiting circuit

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−153422(JP,A) 特開 平3−81618(JP,A) 特開 平5−53658(JP,A) 特開 昭63−263416(JP,A) 特開 昭56−135108(JP,A) 特開 昭57−81602(JP,A) 特開 昭62−174801(JP,A) 特開 昭61−103201(JP,A) 特公 昭64−2203(JP,B2) (58)調査した分野(Int.Cl.7,DB名) G01D 21/00 G05B 7/02 G05B 9/03 G05B 11/36 503 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-63-153422 (JP, A) JP-A-3-81618 (JP, A) JP-A-5-53658 (JP, A) JP-A-63-153 263416 (JP, A) JP-A-56-135108 (JP, A) JP-A-57-81602 (JP, A) JP-A-62-174801 (JP, A) JP-A-61-103201 (JP, A) JP-B 64-2203 (JP, B2) (58) Fields investigated (Int. Cl. 7 , DB name) G01D 21/00 G05B 7/02 G05B 9/03 G05B 11/36 503

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 冗長化したシステムの検出器に接続され
て過去の測定信号値と現在の測定信号値とを入力し、時
間的に変化したシステム検出値の移動平均値を算出する
移動平均回路と、この移動平均回路の出力値が予め定め
られた範囲内にあるか否かによって異常状態を判定し、
前記移動平均回路の出力回路を切り替えて接続する信号
切替回路と、前記移動平均回路と前記信号切替回路とか
らなる複数の直列回路に接続されて複数の移動平均値を
入力し、前記複数の移動平均値の算術的平均値を算出す
る算術平均回路と、前記検出器の補助回路に接続され、
前記過去の測定信号値または前記現在の測定信号値に対
応する対応信号値を入力し、前記対応信号値を反転して
出力する複数の信号反転回路と、これら複数の信号反転
回路からの出力信号の論理和を演算する論理和回路と、
この論理和回路の出力信号によって前記算術平均回路の
出力値の変化率を制限する変化率制限回路とを具備して
なる検出器冗長化システム異常処理装置。
A moving average circuit which is connected to a detector of a redundant system, receives a past measured signal value and a present measured signal value, and calculates a moving average value of a temporally changed system detected value. And, determine the abnormal state by whether the output value of this moving average circuit is within a predetermined range,
A signal switching circuit that switches and connects an output circuit of the moving average circuit; and a plurality of moving average values that are connected to a plurality of series circuits including the moving average circuit and the signal switching circuit and input the plurality of moving average values. An arithmetic averaging circuit for calculating an arithmetic average value of the average value, connected to an auxiliary circuit of the detector,
A plurality of signal inverting circuits for inputting corresponding signal values corresponding to the past measured signal values or the present measured signal values, inverting and outputting the corresponding signal values, and output signals from the plurality of signal inverting circuits A logical sum circuit for calculating the logical sum of
A change rate limiting circuit for limiting a change rate of an output value of the arithmetic averaging circuit by an output signal of the OR circuit, and
JP04255179A 1992-09-25 1992-09-25 Detector redundancy system error handling device Expired - Fee Related JP3108546B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04255179A JP3108546B2 (en) 1992-09-25 1992-09-25 Detector redundancy system error handling device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04255179A JP3108546B2 (en) 1992-09-25 1992-09-25 Detector redundancy system error handling device

Publications (2)

Publication Number Publication Date
JPH06109496A JPH06109496A (en) 1994-04-19
JP3108546B2 true JP3108546B2 (en) 2000-11-13

Family

ID=17275140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04255179A Expired - Fee Related JP3108546B2 (en) 1992-09-25 1992-09-25 Detector redundancy system error handling device

Country Status (1)

Country Link
JP (1) JP3108546B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107544426B (en) * 2016-06-27 2021-09-07 苏州宝时得电动工具有限公司 Control method and device of electric tool and electric tool

Also Published As

Publication number Publication date
JPH06109496A (en) 1994-04-19

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