JP3107727B2 - Multi-value bus circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilevel bus circuit,
In particular, the present invention relates to a circuit for compensating a logic level in a communication method using a multilevel bus.

[0002]

2. Description of the Related Art Usually, a BU is used as a communication means between information devices.
A configuration using S is general. In recent years, many functional blocks such as ALU, register, timer / counter, ROM, RAM, etc.
It is common to combine using S.

[0003] However, when the word length of communication data is long, the number of wirings is increased. For this reason, Japanese Patent Application Laid-Open No. Sho 64-14631 discloses an analog bus connection system in which the number of wires between devices is reduced and wiring is facilitated.

FIG. 4 is a diagram showing a connection example of this analog bus connection system. The device 401 and the device 411 are A / D
Converters 404 and 407 and D / A converter 40
BUS40 connected via 5 and 408
6.

[0005] The n-bit signal output from the device 401 is input to a D / A converter 405 via a transmission path 403 and is converted into analog data.
06. The signal that has passed through the analog BUS 406 is converted into an n-bit digital signal by the A / D converter 407 and input to the device 411 via the transmission path 409. Conversely, the signal transmitted from the device 411 passes through the transmission path 410, is converted into analog data by the D / A converter 408, and is loaded on the analog BUS 406. The signal that has passed through the analog bus 406 is sent to the A / D converter 4
After being converted into a digital signal in 04, it is input to the device 401 via the transmission path 402.

As described above, the analog BUS 40 shown in FIG.
The portion connected to 6 is a portion that operates with a multilevel analog signal, and the portion connected to the devices 401 and 411 is a portion that operates with a digital signal.

[0007]

In the analog bus connection system configured as described above, since the signal passing through the BUS is a multilevel analog signal, the level variation due to the resistance component of the BUS line, leak current, and the like. BUS
When the line becomes long or when many devices are connected to the BUS, it is difficult to transfer data correctly.

Further, in a microcomputer or the like, not only many function blocks are connected but also a plurality of BUs.
Since S is often used and communication between a plurality of BUSs cannot be performed, it is difficult to realize the connection method using the analog bus as described above.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has a compensating circuit capable of connecting many devices even in a connection system using a multi-value bus, capable of suppressing level fluctuations, and an inter-multiple bus. Enables the mutual connection of
It is an object of the present invention to provide a coupling circuit that enables the use of a multilevel bus even in an integrated circuit such as a microcomputer.

[0010]

According to the present invention, an object of the present invention is to provide a circuit for performing level compensation of an analog bus having a multi-valued level, wherein a power supply voltage is divided into the number of levels of the multi-valued level. Dividing means for outputting a plurality of divided voltages;
2. The apparatus according to claim 1, further comprising: comparison means for comparing each divided voltage with an input voltage; and output means for outputting a signal having one of the multi-valued levels according to a comparison result of the comparison means. This is solved by the described level compensation circuit.

According to the present invention, an object of the present invention is to provide a bus coupling circuit for interconnecting two analog buses having multi-valued levels, wherein a power supply voltage is divided into the number of levels of the multi-valued levels. Dividing means for outputting the divided voltages, first comparing means for comparing each divided voltage with the input voltage of the first bus, and any one of the multi-valued levels according to the comparison result of the first comparing means. A first output unit for outputting a signal having the above-mentioned value, a second comparison unit for comparing each divided voltage with an input voltage of the second bus, and the multi-unit according to a comparison result of the second comparison unit. And a second output means for outputting a signal having one of the value levels.
Is solved by the bus coupling circuit described in (1).

According to the present invention, the above-mentioned problem is solved by the first aspect.
4. The bus connection circuit according to claim 3, wherein each of the second output means and the second output means further comprises means for controlling an output by an external signal.

[0013]

In the level compensation circuit according to the first aspect,
The power supply voltage is divided by the dividing means into a plurality of divided voltages having the number of levels of the multi-valued levels, each of the divided voltages is compared with the input voltage by the comparing means, and one of the multi-valued levels is outputted by the output means according to the comparison result. Is output. As a result, the input multi-level signal of the analog bus is once converted into digital data, converted again into an analog multi-level signal, and output. Therefore, it is possible to absorb the level fluctuation and noise within the potential difference between the divided voltages on the bus, and to correctly transmit the original ideal multi-level data.

In the bus coupling circuit according to the second aspect, the power supply voltage is divided into a plurality of divided voltages of a multi-level level by the dividing means, and each divided voltage and the first bus are divided by the first comparing means. The first output means outputs a signal having one of the multi-valued levels according to the comparison result of the first comparison means, and the second comparison means outputs each divided voltage and the second divided voltage. Is compared with the input voltage of the bus, and a signal having any one of multiple levels is output by the second output means in accordance with the comparison result of the second comparison means. As a result, the multi-level signals of the two analog buses are once converted to digital data, converted to analog multi-level signals again, and output. Therefore, it is possible to absorb the level fluctuation and noise within the potential difference between the divided voltages on the two buses, and to correctly transmit the original ideal multi-level data to each other.

In the bus coupling circuit according to the third aspect, the control means is controlled by an external signal corresponding to the direction in which each output is transmitted. As a result, the contents of the bus on the transmitting side can be correctly transmitted to each other without increasing the load.

[0016]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a multilevel bus circuit according to the present invention.

FIG. 1 is a diagram showing an embodiment of a multi-level bus level compensation circuit according to the present invention. The level compensation circuit according to the present embodiment includes a resistor ladder including n resistors 111 having the same resistance value R and generating a voltage obtained by dividing n from VDD to GND, an input voltage of the input 101 of the BUS, and a resistor. Compare the voltage generated from the ladder to VDD or GND
N-1 comparators 121 that output levels, n-1 resistors 131 having one end connected to the output of each comparator and having the same resistance value Rb, and a multi-terminal of the n-1 resistors 131 Commonly connected and BUS output 1
And an operational amplifier 141 for driving the C.O.

The level compensation circuit of this embodiment operates as follows. The voltage passing through the input 101 of the BUS is compared with each voltage of the n-1 level obtained by dividing VDD by n-1 comparators, and the voltage whose level fluctuates while being transferred through the BUS is once converted to a digital value. . The output from the comparator 121 is VDD or GNG level,
By adding the voltage levels generated by the resistors 131 connected to the comparator, an ideal multi-level analog voltage is generated again. This voltage is driven by the OP amplifier 141 and put on the output 102 of the BUS, thereby compensating the multi-level voltage of the BUS. By having the process of once converting the input multi-level analog signal into a digital value, the level fluctuation in the range of the voltage divided by n can be absorbed, and the original multi-level voltage level can be correctly restored. it can.

FIG. 2 is a diagram showing an embodiment of the multilevel bus coupling circuit of the present invention.

The multi-value bus coupling circuit of this embodiment is composed of n resistors 211 having the same resistance value R.
A resistor ladder for generating a voltage obtained by dividing the voltage up to ND by n, an n-1 comparator 221 for comparing the input voltage of the buser 201 with a voltage generated from the resistor ladder and outputting a VDD or GND level; Are connected to the output of each comparator, and have n-1 resistors 231 having the same resistance value Rb, and n-1 resistors 231 have inputs.
And n−1 output terminals that compare the input voltage of the BUSB 201 with the voltage generated from the resistor ladder and output the VDD or GND level, A comparator 251 and n-1 resistors 261 having the same resistance Rb, one end of which is connected to the output of each comparator.
And an operational amplifier 241 whose input is commonly connected to multiple terminals of n-1 resistors 261 and whose output is connected to the bus 201. The operational amplifiers 241 and 271 are provided with control input lines 203 and 2 for controlling whether or not to output the respective outputs to BUSA or BUSB.
04.

The bus coupling circuit of this embodiment operates as follows. When the signal of BUSA is put on BUSB, BUS
The signal level of A is compared with voltages obtained by dividing VDD by n by n-1 comparators 221 and temporarily converted to an intermediate digital value. The output from the comparator 221 is at the VDD or GND level, the voltage is added by the (n−1) resistors 231 connected to the comparator, an ideal voltage is generated again, and the signal on the control signal line 204 is activated and controlled. When the signal on the signal line 203 is non-active and the output of the operational amplifier 241 is high impedance, the voltage generated by the resistor 231 is driven by the operational amplifier 271 and put on the BUSB 202, so that the content of the BUSA is changed to the BUSB without increasing the load. It is possible to put on. Conversely, the BUS signal is changed to BUS
When the signal is put on A, the signal level of BUSB is compared with voltages obtained by dividing VDD by n by the (n-1) comparators 251, and is temporarily converted to an intermediate digital value. The output from the comparator 251 is at the VDD or GND level, and n−1 resistors 26 connected to the comparator are output.
1 to generate an ideal voltage again. When the signal on the control signal line 203 is active, the signal on the control signal line 204 is non-active, and the output of the operational amplifier 271 is high impedance, the voltage is generated by the resistor 261. Voltage is driven by the operational amplifier 241 and BUSA
By putting it on 201, it becomes possible to put it on BUSA without increasing the load on the contents of BUSB.

FIG. 3 shows the level compensating circuit shown in FIG.
FIG. 3 is a diagram illustrating a connection example of a plurality of devices using the bus coupling circuit illustrated in FIG. 2.

The devices or function blocks 311 and 321 having independent functions are respectively provided with an A / D converter 312
And a D / A converter 313, which is connected to the BUSA 301, and is connected to the device or the functional blocks 331 and 341.
Are connected to the BUSB 302 via an A / D converter and a D / A converter, respectively. BUSA30
1 and the USB 302 are connected to each other by a BUS coupling circuit 303.

As described above, by connecting the level compensating circuit to a portion where the level fluctuation of the BUS is considered and connecting the bus coupling circuit between different buses, communication by a multilevel bus between a large number of devices is possible. , And mutual data communication between a plurality of multi-value buses.

[0025]

According to the level compensation circuit of the present invention, the multi-valued signal of the analog bus is once converted to digital data, converted again to an analog multi-valued signal, and output. Therefore, it is possible to absorb the level fluctuation and noise within the potential difference of the divided voltage on the bus, and to correctly transmit the original ideal multi-level data, and to increase the number of devices connected on the bus. But multi-level data is transmitted correctly.

According to the bus coupling circuit of the second aspect,
The multi-valued signals of the two analog buses are once converted to digital data, converted to analog multi-valued signals, and output again. Therefore, it is possible to absorb the level fluctuation and noise within the potential difference between the divided voltages on the two buses and to correctly transmit the original ideal multi-valued level data to each other, and to use a plurality of buses in the system. can do.

According to the bus coupling circuit of the third aspect,
It is possible to correctly transmit the contents of the bus on the transmission side to each other without increasing the load.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of a level compensation circuit of the present invention.

FIG. 2 is a circuit diagram showing an embodiment of a bus coupling circuit according to the present invention.

FIG. 3 is a diagram showing an example in which a plurality of devices are connected using the level compensation circuit of FIG. 1 and the bus coupling circuit of FIG. 2;

FIG. 4 is a diagram showing a connection example of a device using a conventional multilevel analog bus.

[Explanation of symbols]

 101,102,201,202,301,302 Multi-valued BUS 111,131,211,231,261 Resistance 121,221,251 Comparator 141,241,271 OP amplifier 312,404,407 A / D converter 313,405,408 D / A converter 311,321,331,341,401,411 Equipment

Claims (3)

(57) [Claims] 1. A circuit for performing level compensation of an analog bus having a multi-valued level, comprising: a dividing means for dividing a power supply voltage into the number of the multi-valued levels and outputting a plurality of divided voltages; Comparing means for comparing the input voltage with the input voltage;
Output means for outputting a signal having one of the multi-valued levels in accordance with the comparison result of the comparing means. 2. A bus coupling circuit for interconnecting two analog buses having a multi-level level, comprising: a dividing means for dividing a power supply voltage into the number of the multi-level levels and outputting a plurality of divided voltages. A first comparing unit that compares each divided voltage with an input voltage of the first bus, and a first unit that outputs a signal having one of the multi-level levels according to a comparison result of the first comparing unit. Output means, a second comparing means for comparing each divided voltage with an input voltage of the second bus,
And a second output means for outputting a signal having one of the multi-levels in accordance with the comparison result of the comparison means. 3. The bus coupling circuit according to claim 2, wherein each of said first and second output means further comprises means for controlling an output by an external signal.