JP3106989B2 - Simulation method of simulation debugger - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory access method of a simulation debugger used when debugging a program of a switching system, and more particularly to detecting an erroneous access to memory data and an illegal access to outside the memory space. About the method of doing.

[0002]

2. Description of the Related Art When debugging a program for an exchange system, it is common practice to perform a pseudo run on a host computer before installing the program in the exchange system, and use a simulator in advance to confirm operation. It is.

In a conventional simulator, a pseudo memory space used by an operation target program is prepared for a size allocated by a linkage program, and is allocated to each data portion and execution instruction portion linked by the linkage program. Store in pseudo memory space.

Next, in accordance with an execution instruction, instructions are sequentially fetched from the execution instruction portion and executed. Further, when a memory access to the data portion occurs during execution of the instruction, access is made to the pseudo memory space assigned to the data portion. The executed result is stored in the pseudo memory space and the CPU internal register.

The contents of the pseudo memory space and the contents of the CPU internal registers are displayed on a display in response to a display instruction.

An embodiment of the prior art will be described in detail with reference to the drawings. FIG. 7 is a block diagram of a simulation debug system according to a conventional technique. The debugger includes a memory access mechanism 310, a load mechanism 320, an instruction execution mechanism 330, a symbol information management mechanism 340, a load module file 350 storing a load module, and debugging. A mechanism 360, a display display mechanism 370 for displaying an execution result, and a keyboard input mechanism 380 for inputting an instruction to the simulator are provided.

[0007] The memory access mechanism 310 has a
14 and an execution instruction storage unit 315,
20 has a data part, a raw data input mechanism 321 for inputting an execution instruction part, and a symbol information input mechanism 322, and the instruction execution mechanism 330 has an instruction decoding part 331, an instruction execution part 332, and a register part 333. doing.

[0008] In response to a load instruction input from the keyboard input mechanism 380, the load mechanism 320 reads a raw data portion and a symbol information portion to be loaded into the simulator from a program stored in the load module file 350, and reads the raw data portion. To the memory access mechanism 310 and the symbol information part to the symbol information part management mechanism 340.

The row data part is divided into an execution instruction part and a data definition by the load mechanism 320, and the execution instruction storage part 315 and the data part 31 of the memory access mechanism 310 are separated.
4 and stored separately.

In response to an execution instruction input from the keyboard input mechanism 380, the instruction execution mechanism 330 is moved from the debug mechanism 360, and the instructions are sequentially read from the execution instruction storage section 315 of the memory access mechanism 310.
The instruction is decoded by 1 to extract a memory address and CPU internal register information required for execution. When an instruction requiring a memory access is decoded, the memory access mechanism 310 is operated to access target data in the pseudo memory space.

The memory access mechanism 310 checks whether the specified address value is within the range of the memory space allocated to the data section 314 in the pseudo memory space, and if it is within the range, accesses the target data. Do. On this occasion,
The content of the access range check is determined based on the range of the allocation start address and the end address of the data section 314.

[0012]

A first problem of the above-described conventional embodiment is that when data is accessed, the address of the data is within the range of the allocation start address and end address of the data section 314. Is checked only if the data is within the range, and even if data other than the target data is erroneously accessed, the error cannot be detected.

The reason is that the data of the program is collected in the data section 314 allocated by the linkage program. In the conventional simulator, the pseudo memory space of the size of the data section is collectively allocated and the data is arranged therein. Because it was only.

The second problem is that if an address in the memory is incorrectly specified and the contents of the data other than the purpose of the change are changed, the program will not execute even if the program is erroneously executed. The inability to detect errors.

The reason is that the conventional simulator does not check whether pointer data is accessible for each individual data.

An object of the present invention is to prevent erroneous execution due to an illegal address access which has conventionally occurred due to difficulty in detection.
It is an object of the present invention to provide a simulation debugging method capable of preventing access by monitoring each data and detecting a program error.

[0017]

SUMMARY OF THE INVENTION A simulation system of a simulation debugger according to the present invention provides a method for accessing erroneous memory data when debugging a program of an exchange system using a simulation debugger.
And a simulation method of a simulation debugger for detecting an illegal access to the outside of the memory space, wherein the simulation debugger includes a data space allocating unit, a pointer data managing unit, and an access determining unit, and defines definition data input to the simulation debugger. In each unit, the memory space is individually allocated to the pseudo space of the simulation debugger via the data space allocation unit, and the data entity is stored. If the data entity is pointer data, the pointer data address and pointer data can be accessed. The initial value of the data address is recorded in the pointer data management unit, and when executing the simulation, the access determination unit determines whether or not the specified access target address matches the registered pointer data address. Performs one of determination is metadata, the access determination unit calls from a range of addresses and the address corresponding to the specified access target, respectively pointer data management unit and the data space allocation unit,
If the access target is pointer data, it is determined whether the access is correct based on whether the register having the same value as the pointer data and the register accessing the memory are the same. Whether the access is correct or not is determined based on whether the access is within the range.

In the execution of the simulation, if the access target is pointer data, the pointer data management unit registers the contents of the pointer data and the register number of the register for executing the simulation, and registers the same register number as the register number. When the pointer data has already been registered in another pointer data, it is desirable to clear the registration of the register number of the pointer data having the same register number to separate the equivalence relation.

Using a load module file created by a linkage program, the simulator can detect unauthorized access to a data portion in the program without modifying the source file.

It is possible to detect when pointer data in a program accesses data other than the intended data, and detect access outside the memory space.

This makes it possible to detect an access to an illegal data portion, which is difficult to detect by a conventional simulator, thereby improving the quality of a program before being mounted on an actual machine.

[0022]

Next, embodiments of the present invention will be described with reference to the drawings. [1] Description of Configuration The configuration of an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of a simulation debug system according to an embodiment of the present invention.
10 is a memory access mechanism, 111 is a data space allocation unit, 112 is an access determination unit, 113 is a pointer data management unit, 114 is a data unit, 115 is an execution instruction storage unit, 120 is a load mechanism, 130 is an instruction execution mechanism, and 13
1 is an instruction decoding unit, 132 is an instruction execution unit, 133 is a register unit, 140 is a symbol information management mechanism, 150 is a load module file, 160 is a debugging mechanism, 170 is a display display mechanism, and 180 is a keyboard input mechanism.

Referring to FIG. 1, a memory access mechanism 110 which plays a major role in the present invention is a load mechanism 1 for reading raw data from a load module file 150.
20, an instruction execution mechanism 130 for executing instructions, a symbol information management mechanism 140, and a debugging mechanism 160.

The memory access mechanism 110 receives a load instruction input from the keyboard input mechanism 180,
The data of the row data portion from the load module file 150 is passed via the load mechanism 120. At the same time, the symbol information management mechanism 140
The data of the symbol information part is also passed. Further, an access address of data is passed from the instruction execution unit 130 to the memory access unit 110.

The instruction execution unit 130 sequentially reads instructions from the execution instruction storage unit 115 of the memory access unit 110 according to an execution instruction input from the keyboard input unit 180, decodes the instruction by the instruction decoding unit 131, and executes the instruction. Necessary memory addresses and CPU internal register information are extracted, and the CPU internal register information is stored in the register unit 133. When an instruction that requires memory access for execution is decoded, the instruction access unit 130 passes the data access address to the memory access unit 110.

The debug mechanism 160 uses the memory access mechanism 110 and the symbol information management mechanism 140, and controls the interface with the user using the display display mechanism 170 and the like.

The memory access mechanism 110 has a data space allocating unit 111, an access determining unit 112, and a pointer data managing unit 113, in addition to the data unit 114 and the execution instruction storing unit 115 which have been used in the conventional example.

The data space allocating section 111 allocates the data section 114 as a pseudo memory space. The pointer data management unit 113 manages information when the data to be assigned is pointer data. Access determination unit 112
Determines the violation of the memory access from the instruction execution unit 130. The data section 114 is a section to which the substance of data is assigned. The execution instruction storage unit 115 is a part that stores the substance of the program.

The data from the loading mechanism 120 is passed to the data space allocating unit 111. If the data is pointer data, the data is transmitted to the pointer data managing unit 113. The data allocating unit 111 allocates an independent address of the data unit 114 to each piece of data including the passed pointer data.

An access request from the instruction execution unit 130 is sent to the data space allocating unit 111 and the access determining unit 112 via the access determining unit 112, and the access determining unit 112 registers the access request in the pointer data managing unit 113. Access violation is determined based on the content of the access violation. [2] Description of Operation Next, the operation of the simulation debug system according to the embodiment of the present invention will be described in detail with reference to the drawings. FIG. 2 is a schematic diagram showing the flow of data at the time of reading between blocks in the simulation debug system according to the embodiment of the present invention. In the figure, reference numerals D11 represent data entities, D12 represents data attributes, D13 represents addresses, and D14 represents data. The initial value of
D15 is data and D16 is a program instruction.
The same reference numerals are given to the same blocks as. FIG. 3 is a flowchart at the time of reading in the simulation debug method according to the embodiment of the present invention.
S112 is each step.

First, the operation of storing a program in the pseudo memory space in the memory access mechanism 110 will be described in detail. Referring to FIGS. 1, 2 and 3, storage is started by a load instruction (S101), and the loading mechanism 12 is started.
At 0, the raw data is read from the load module file 150 (S102), and the presence or absence of the raw data is determined (S103). If there is the raw data (Yes), the data entity D11 of the read raw data and the data attribute are read. D12 is transferred to the data space allocating unit 111 (S12).
104), if there is no raw data (No), the storage ends (S112).

The data space allocating unit 111 determines whether the read data entity D11 is a program execution instruction part or data definition (S105). If the data entity D11 is a program execution instruction (Yes), the data entity D11 is stored in the execution instruction storage unit 115. The program instruction D16 is stored (S110), and the process returns to reading the next row data (S102). If the read data entity D11 is a data definition (S105-
No), individual assignment for storing the data entity D11 in the data section 114, which is a pseudo memory space, is performed (S
106) Also, based on the data attribute D12, it is determined whether or not the data definition is pointer data (S10).
7) In the case of pointer data (Yes), the address D13 assigned to the pointer data and the initial value D14 of the accessible data address of the pointer data are passed to the pointer data management unit 113 (S108), and the pointer data management unit 113 Then, the address D14 and the initial value D15 of the transmitted pointer data are stored as a pointer data management table (S108). Further, the data space allocating unit 111 stores the data D15 in the data unit 114 together with the data other than the pointer data (S107-No) via the access determining unit 112 (S111), and reads the next load module file (S102). Return to).

Next, the operation for detecting a memory access violation will be described in detail. FIG. 4 is a schematic diagram showing a data flow when an address access violation is detected in the simulation debug system according to the embodiment of the present invention.
1 is a register number, D22 is an access instruction, D23 is a data section address, D24 is an assigned address, D25 is an access, and D26 is an error notification. The same blocks as those in FIG. FIG. 5 is a flowchart at the time of detecting a violation of the simulation debug method according to the embodiment of the present invention. In the figure, reference numerals S201 to S212 denote steps. FIGS. 6A and 6B show formats of a memory allocation table and a pointer data management table according to the embodiment of the present invention. FIG. 6A shows a memory allocation table, and FIG. 6B shows a pointer data management table.

Referring to FIG. 1, FIG. 4, FIG. 5, and FIG. 6, judgment is started in response to the execution instruction (S201),
The memory access instruction D specified by the CPU internal register number D21 of the register unit 133 from the instruction execution unit 130
22 is sent to the access determination unit 112 (S202).
The access determination unit 112 includes a pointer data management unit 113
The address D23 of the data section corresponding to the register number to be accessed and the range (assigned address) D24 of the data section to be accessed from the data space allocating section 111 are extracted (S203). It is determined whether or not the access is based on pointer data based on whether or not the address matches the address (S204). If the access is based on pointer data (Yes), the pointer data management unit 11
It is determined whether the register having the same value relationship as the pointer data registered in No. 3 and the register accessing the memory are the same and are accessible data portions (S205). If the registers are not the same and are not accessible data portions (S205-No), the process proceeds to S211 as an access violation. If it is determined in S205 that the registers are the same and are accessible data portions (Yes),
It is determined whether or not the same register number as the register number of the register specified in the instruction has already been registered in another pointer data (S206).
206-Yes), the register of the pointer data having the same register number is cleared, and the equivalence relation is separated (S2).
07), the process proceeds to S208. If not registered (S206-No), the process directly proceeds to S208. S20
In step 8, the register number of the register specified in the instruction and the contents of the pointer data are registered in the pointer data management unit 113, and the flow shifts to S209. If it is not pointer data access (S204-No), the process proceeds to S209 as general data access.

In S209, the data space allocating unit 11
It is determined whether or not the address of the data section 114 to be accessed from the assigned address D24 extracted from the address 1 exceeds the address range (S209). If the address does not exceed the address range (Yes), it is determined that there is no access violation, and the access D25 to the data unit 114 is permitted (S21).
0), the determination ends (S212). If the address exceeds the address range (S209-No), it is detected as an access violation and the process proceeds to S211. In S211 detected as an access violation, an error notification D26 is sent to the debugging mechanism unit 160.

[0036]

【Example】

[1] Description of Configuration of Example The configuration of an example of an embodiment of the present invention will be described in detail. The load mechanism 120 is connected to the memory access mechanism 110. Row data from the load module file 150 input to the memory access mechanism 110 includes data d1 including pointer data p1 and a program instruction i1.
It is included. The memory access mechanism 110 additionally includes:
It is also connected to an instruction execution mechanism 130, a symbol information management mechanism 140, and a debugging mechanism 160. [2] Description of Operation of Example The operation of an example of the embodiment of the present invention will be described in detail. First, the operation when a program is stored in the pseudo memory space in the memory access mechanism 110 will be described in detail.

Referring to FIG. 1, FIG. 2 and FIG. 3, data d1 including pointer data p1 and program instruction i1 are read from load module file 150 by load mechanism 120 (S102), and the read data is read. The data entity “data1” D11 and the data attribute “char array” D12 are transferred to the data space allocating unit 111 (S104).

The data space allocating unit 111 determines whether the instruction is a program instruction based on the data attribute “char array” D12 (S105). If the instruction is a program instruction i1 (Yes), the program instruction i1 is stored in the execution instruction storage unit 115. (D16) is stored (S111), and if it is the data part of the program (No), the pseudo memory space 0
x30000 to 0x3ffff in the data entity "data
Assignment for storing 1 "D11 is performed. In this case, for example, data d1 is stored at data address 0x30000 to
Assigned to 0x30004 (S106).

Next, it is determined whether or not the data entity "data1" D11 is pointer data based on the data attribute "char array" D12 (S107).

If the pointer data is p1, the pointer data address 0x30100 (D13) and the accessible data address initial value 0x30000 (D14) are passed to the pointer data embedment unit 112 (S108). In the pointer data embedment unit 112, the address 0x30100 (D13) of the transmitted pointer data and the accessible data address initial value 0x3000 of the pointer data
0 (D14) is stacked as a pointer data management table (S109).

Further, the data space allocating section 111 passes the pointer data together with data other than the pointer data (S107-No) via the access determining section 112 to a predetermined address of the pseudo space to which the data section 114 is allocated, for example, an address. The data entity “data1” (D15) is stored in 0x30000 to 0x30004 (S1
11), reading the next load module file (S
Return to 102).

Next, the operation for detecting a memory access violation will be described in detail. Referring to FIG. 1, FIG. 4, FIG. 5, and FIG. 6, determination is started in response to the execution instruction (S20).
1), from the instruction execution unit 130 to, for example, the register unit 133
0x30100 (D2
The memory access instruction D22 specified in 1) is sent to the access determination unit 112 (S202). The access judging section 112 receives the request from the pointer data managing section 113 as shown in FIG.
The register number r1 (0x
30100) Address initial value 0x of the data section corresponding to
3000 (D23) and the range 0 of the address 0x3000 of the data part to be accessed as shown in FIG.
x30000 to 0x30004 (D24) is taken out (S203).

Next, the address 0x30100 of the pointer data p1 registered in the pointer data management unit 113
It is determined whether or not the access is based on pointer data based on whether or not the access matches (S204). In the case of access using pointer data (Yes), an address 0x30000 at which a memory access is to be actually performed indicates whether the data is an accessible data part registered in the point data management table of the pointer data management unit 113. The value of the register r1 and the accessible address 0x3 of the pointer data management table that matches the register name r1
0000 (S205). If the registers are not the same and are not accessible data sections (S205
-No), proceed to S211 as an access violation. S
If it is determined in 205 that the register is the same and the data portion is accessible (Yes), it is determined whether the same register number as the register number r1 of the register specified in the instruction has already been registered in other pointer data. (S20
6) If registered (S206-Yes),
The register of the pointer data having the same register number is cleared to disconnect the equivalence relationship (S207), and the process proceeds to S208. If not registered (S206-N
o), proceed directly to S208. In S208, the register number r1 of the register specified in the instruction and the address 0x30100 of the pointer data p1 are registered in the pointer data management unit 113 as an equivalence relationship (S208), and S209 is performed.
Move to.

If not pointer data access (S
204-No), S209 as general data access
Move to.

In S209, the data space allocating unit 11
1 to the address range of the data part 114 to be accessed from the assigned address D24 taken out from 0x3000
It is determined whether or not it exceeds 0-0x30004 (S209). If the address range is not exceeded (Y
es) The access D25 to the data part 114 is permitted as there is no access violation (S210), and the determination is terminated (S212).

If the address range is exceeded (S20)
9-No), it is detected as an access violation, and the routine shifts to S211. In S211 detected as an access violation,
An error notification D26 is sent to the debugging mechanism 160.

[0047]

A first effect of the present invention is that a portion of a program causing a data access violation can be found, so that the problem of the program can be solved at an early stage. The reason is that among the problems of the program, data access violations are the most difficult to detect. By assigning this point to the data section one by one for each data and managing the pointer data, Because they can be found in

A second effect is that the time for using the exchange can be reduced. The reason for this is that a data access violation can be detected in advance without using an exchange, and a test using the exchange can be smoothly performed.

[Brief description of the drawings]

FIG. 1 is a block diagram of a simulation debug system according to an embodiment of the present invention.

FIG. 2 is a schematic diagram showing a flow of data at the time of reading between blocks in the simulation debug system according to the embodiment of the present invention.

FIG. 3 is a flowchart at the time of reading in a simulation debugging method according to the embodiment of the present invention.

FIG. 4 is a schematic diagram showing a data flow at the time of detecting an address access violation in the simulation debug system according to the embodiment of the present invention;

FIG. 5 is a flowchart at the time of detecting a violation of the simulation debug method according to the embodiment of the present invention.

FIG. 6 is a format of a memory allocation table and a pointer data management table according to the embodiment of this invention. (A) is a memory allocation table. (B) is a pointer data management table.

FIG. 7 is a block diagram of a simulation debug system according to a conventional technique.

[Explanation of symbols]

110, 310 Memory access mechanism 111 Data space allocation unit 112 Access determination unit 113 Pointer data management unit 114, 314 Data unit 115, 315 Execution instruction storage unit 120, 320 Load unit 130, 330 Instruction execution unit 131, 331 Instruction decoding unit 132 332 Instruction execution unit 133, 333 Register unit 140, 340 Symbol information management unit 150, 350 Load module file 160, 360 Debugging unit 170, 370 Display display unit 180, 380 Keyboard input unit 321 Raw data input unit 322 Symbol information input unit D11 Data entity D12 Data attribute D13 Address D14 Initial value of data D15 Data D16 Program instruction D21 Register number D22 Access instruction D23 Over data unit address D24 assigned address D25 access D26 error notice S101~S112, S201~S212 steps

Claims (2)

(57) [Claims] 1. A simulation method of a simulation debugger for detecting an erroneous access to memory data and an illegal access to outside of a memory space when debugging a program of an exchange system using the simulation debugger. The simulation debugger includes a data space allocating unit, a pointer data management unit, and an access determining unit. In a definition data unit input to the simulation debugger, a pseudo space of the simulation debugger, via the data space allocating unit. A data entity is stored by individually allocating a memory space. If the data entity is pointer data, the pointer data address and the initial value of the address of the accessible data of the pointer data are stored in the pointer data tube. When executing the simulation, the access determination unit determines whether the designated address of the access target matches the address of the registered pointer data to determine whether or not the pointer data is pointer data. The unit calls an address and a range of addresses corresponding to the designated access target from the pointer data management unit and the data space allocating unit, respectively. When the access target is pointer data, the unit has the same value relationship as the pointer data. And the register that is accessing the memory to determine whether the access is correct or not, and further determine whether the access is correct based on whether the access target is within the address range,
A simulation method of a simulation debugger, characterized in that: 2. In the execution of a simulation, when the access target is pointer data, the pointer data management unit registers the contents of the pointer data and a register number in a register for executing simulation, and registers the register number. 2. The simulation of the simulation debugger according to claim 1, wherein when the same register number is already registered in another pointer data, the registration of the register number of the pointer data having the same register number is cleared to disconnect the equivalence relation. method.