JP3099124B2 - Semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit device.

B. 2. Description of the Related Art Conventionally, in a semiconductor integrated circuit device such as an operational amplifier, for example, a protection circuit for preventing destruction of an element such as an output transistor due to an overcurrent when an output terminal is short-circuited to a power supply line is generally provided at an output portion thereof. It has been incorporated.

FIG. 9 shows an example of the output section of the above-mentioned operational amplifier, for example, and the signal (V
_A predetermined output signal is output to an output terminal Y in response to an arbitrary level between _CC and GND). In addition,
In this example, the output terminal Y is connected to a circuit such as a sample-and-hold, which requires the accuracy of the output voltage, and a circuit such as an A / D converter as the next stage circuit.

That is, the connection relation of the main circuit elements in the output section of the operational amplifier shown in FIG. 9 will be described. As shown in FIG. circuit).

The base of the NPN transistor Q1 is the input circuit section 10 and the NPN
The collector is connected to the collector of the transistor Q4, the collector is connected to the power supply V _CC , and the emitter is connected to the output terminal Y via the base of the transistor Q4 and the resistor R2.
The emitter of the transistor Q4 is connected to the output terminal Y. The NPN transistor QS1 has a collector connected to the output terminal Y via a resistor R2, and a base connected to the NPN transistor QS1.
The base and collector of the transistor QR1, and the emitter thereof are connected to GND, respectively. The emitter of the transistor QR1 is connected to GND. The junction field-effect transistor PJF1 has a gate and a source connected to the power supply V _CC , and a drain connected to the collector and the base of the transistor QR1.

The protection circuit 1 is configured by the transistor Q4 and the resistor R2. Here, the function of each circuit element in FIG. 9 will be described. The transistor Q1 is for transmitting the signal at the base to the output with a one-to-one amplitude, and the transistor Q4 is for transmitting the signal Q1 when an overcurrent occurs at the output.
Is used to control the base current of the device. Also the resistance
When overcurrent occurs at the output, the voltage drop (at the resistor R2) increases and becomes larger due to the voltage between the base and emitter of Q4, turning on Q4 and controlling the base current of Q1. To make the transistor QR1
Is for determining the base potential of QS1, transistor Q
S1 is for pulling down the output to the ground side, and junction type transistor PJF1 is for configuring a constant current source.

In the semiconductor integrated circuit device described above, a large current flows at the output portion when the output terminal Y is short-circuited to the GND line (that is, when the transistor Q1 is on). This leads to destruction of circuit elements such as the transistor Q1. Therefore, as described above, the short-circuit protection circuit 1 including the transistor Q4 and the resistor R2.
The next stage is connected to a circuit that requires the accuracy of its output voltage, such as a sample and hold, an A / D converter, etc., at the next stage. If it is desired to incorporate a protection element similar to an operational amplifier, the voltage drop due to the resistor R2 cannot be neglected. Therefore, it is impossible to obtain a predetermined voltage accurately amplified one-to-one with the input potential at the terminal Y of the sample and hold. Very difficult.

C. SUMMARY OF THE INVENTION An object of the present invention is to provide a highly reliable semiconductor integrated circuit device which can prevent an overcurrent from flowing to an output transistor and does not adversely affect an output signal.

D. Configuration of the invention That is, the present invention provides an output transistor that conducts according to an input signal input to a control terminal and outputs a voltage from a power supply voltage terminal to an output terminal side, and a control terminal and a ground terminal of the output transistor. A current controlling transistor connected between the first semiconductor region, a barrier metal forming a Schottky barrier, and an anode electrode and a cathode electrode respectively provided from a first semiconductor region of a first conductivity type; A drain electrode provided from a second semiconductor region of the second conductivity type formed, wherein the anode electrode is on the power supply voltage terminal side and the cathode electrode is on the output transistor side, and the power supply voltage terminal and the output are A control current supplied from the drain electrode to a control terminal of the current control transistor; The present invention relates to a semiconductor integrated circuit device having a Schottky barrier diode.

E. Examples Hereinafter, examples of the present invention will be described.

1 to 5 show a first embodiment of the present invention.

The same parts as those in the above-described example are denoted by the same reference numerals for convenience of description, and description thereof is omitted. However, as shown in FIG. 1, a significantly different circuit configuration mainly includes the base of the output transistor Q1 and GND. An NPN transistor Q2 is connected between the power supply _Vcc and the collector of the output transistor Q1. The base of the transistor Q2 has three electrodes (having an anode, a cathode and a third electrode) connected between the power supply _VCC and the collector of the output transistor Q1. Having a third electrode (hereinafter, referred to as a drain electrode) of a Schottky barrier diode (hereinafter, referred to as a triode) TS
Is connected.

That is, as shown in the figure, the NPN transistor Q2 has its base connected to the drain of the triode TS and
The collector is connected to GND via R1, the collector is connected to the base of the output transistor Q1, the input circuit unit 10, and the emitter is connected to GND. The anode of the triode TS is connected to the power supply V _CC , and the cathode is connected to the collector of the output transistor Q1. The protection circuit 2 is constituted by the triode TS, the transistor Q2, and the resistor R1 described above.

FIG. 2 is a plan view showing an actual layout pattern of the equivalent circuit of FIG. 1, where reference numeral 11 denotes a P-type isolation region, 12 denotes an N ⁻ -type epitaxial layer, and 13a denotes a triode TS drain region. (P ⁺ type diffusion region), 13b is a base electrode extraction region (P ⁺ type region region) of each transistor Q1, Q2, QS1, and QR1, and 13c and 13d are transistors PJ, respectively.
The source region (P ⁺ type diffusion region) and the drain region (P ⁺
Diffusion region), 13e is a P ⁺ type diffusion region, 14a is an N ⁺ type diffusion region (cathode), 14b is each transistor Q1, Q2, QS1, QR1
Removal area of the collector electrode (N ⁺ -type diffusion region), 14c each transistor Q1, Q2, QS1, emitter electrode deriving region of QR1 (N ⁺ -type diffusion region), 14d are N ⁺ -type diffusion region 15 is a contact hole, Reference numeral 18 denotes an anode electrode of the triode TS (a wiring connected to the power supply Vcc, which constitutes a barrier metal of a Schottky barrier in the triode TS), 19 denotes a drain electrode of the triode TS, and 20 denotes a cathode electrode.

FIG. 3 is an enlarged cross-sectional view of the triode TS taken along the line III-III of FIG.
On one principal surface of the P-type silicon substrate 9, N through N ⁺ -type buried layer 16 ^- -type epitaxial layer 12 is formed, the N ^- P formed -type epitaxial layer 12 ⁺ -type diffusion region 13a, N ^The above-described triode TS is configured with the ⁺ type diffusion region 14a as a drain electrode extraction region and a cathode electrode extraction region, respectively. In the figure, reference numeral 17 denotes an insulating film, and reference numeral 21 denotes a contact.

Here, the main operation in the output unit shown in FIG. 1 of the above-described semiconductor integrated circuit device will be described. In the triode TS, as shown in FIG. 4, the forward current (cathode current) between the anode and the cathode is increased. 1mA (1000μ
A) In the following regions, the injection amount of minority carriers (holes) into the drain of the triode TS (that is, the magnitude of the drain current) is negligibly small, but as shown in the figure, the cathode current is 1 mA or more. As the value increases, the value of the drain current also increases. Then, in the triode TS, when a large current flows in the forward direction (that is, when a high potential signal close to Vcc of the input circuit unit 10 causes the transistor Q
1 is turned on and the output terminal Y is further short-circuited to the GND side), as shown in FIG. 1, the drain current flows from the drain of the triode TS to the base of the transistor Q2 in the protection circuit 2, and the transistor Q2 is turned on. Turn on. Therefore, the base current of the output transistor Q1 can be absorbed by the transistor Q2 on the GND side. The resistor R1 of the protection circuit 2 in FIG. 1 adjusts the current detection level in this circuit (that is, adjusts the base current to Q2 according to the magnitude of R1 and adjusts the degree of absorption of the base current of Q1). That). FIG. 5 shows the beta-cathode current characteristics of the triode TS.

As described above, according to the present embodiment, the current control transistor Q2 is connected to the base electrode of the output transistor Q1, and therefore, as described above, when the output terminal Y is short-circuited to GND, etc. Excessive current can be prevented from flowing through Q1. Furthermore, the current control transistor Q2
Is connected between the power supply V _CC and the output transistor Q1, so that a predetermined output signal can be obtained without adversely affecting the output signal output by the output transistor Q1. (Here, the accuracy of the level of the output signal is determined only by the base-emitter voltage V _BE of the output transistor Q1, and the triode TS does not affect the accuracy of the level of the output signal.)

6 and 7 show another example of the present invention. Since the basic circuit configuration is almost the same as that of the example of FIG. 1, the same reference numerals are used for the sake of explanation. May be omitted. FIG. 7 is a plan view of FIG.

As shown in FIG. 6, the circuit configuration different from the example of FIG. 1 will be mainly described. The base of the output transistor Q1 is connected to the bases of NPN transistors Q1 'and Q1 ", and the emitter is connected to the emitter. Is the transistor Q1 'and
The emitters of Q1 ″ are connected to each other.
The collectors of 1 'and Q1 "are respectively connected to the power supply V _CC .

Next, the operation of the transistors Q1 'and Q1 "in FIG. 6 will be mainly described.

The circuit function of FIG. 6 is the same as that of FIG. 1 except that the output drive current is 3% in the circuit of FIG.
That is, it is doubled. Since the output current is large, the output transistors Q1, Q'1, Q2 in FIG.
The total emitter area of 1 ″ also increases, and if the output transistor is configured as one element as shown in FIG.
Also have a correspondingly large area. Therefore, the sixth
By dividing the output transistor as shown in the figure and connecting the TS to only Q1, a TS having a small area can be used. Here, Q1, Q1 ', and Q1 "have the same emitter size, and the collector current of Q1 is 1/3 of the current at the node of output Y. Therefore, the current flowing through the cathode of TS is also the current of output Y. As a result, the area of TS can be reduced, and the detection currents in this case are (Q1) and (Q1 + Q
1 ′ + Q ″).

This example shows an example of what kind of circuit configuration should be used to control the output current with a small TS when the output transistor becomes large.

As described above, the present embodiment also has the above-described advantages, and in the case of the present embodiment, the increase in the voltage drop in the TS due to the increase in the drive current of the output transistor is determined by the method of increasing the area of the TS. However, by dividing the output transistor, the output current can be detected with a small TS, thereby minimizing the output current. As a result, it is possible to obtain an effect of preventing an unnecessary increase in the area without reducing the output voltage amplitude and in the layout pattern.

FIG. 8 shows still another example of the present invention. The basic circuit configuration is almost the same as that of the above-described embodiment. ,
A different circuit configuration consists of an NP between the triode TS and the output Y.
Connect N transistor Q1 and connect this transistor Q1
Is configured to operate the triode TS by the collector current. FIG. 8 shows only the main circuit configuration.

That is, as shown in the figure, the transistor Q1 has its base connected to the collector of the transistor Q2 and the base of the transistor Q1, its collector connected to the cathode of the triode TS, its emitter connected to the emitter of the transistor Q1 and the output Y. Connected to each other.

And here, the output current in normal operation is several mA
When the current detection level is set to a high value, or when the current detection level is set to a high value, and it is not possible to set the predetermined detection value only by adjusting R1 in FIG. 1, that is, when the drain current of the TS at the output current to be detected is When R1 is reduced because of its large size, if the desired value of R1 cannot be achieved due to layout restrictions, as shown in this example, the transistor Q1 is connected to the base and the emitter with the emitter area of the transistor Q1.
1 / n of transistor Q1 is added, and triode T
S is put on the collector side of transistor Q1, By operating TS with the collector current of Q1,
R1 can be set to a value in a convenient range for an appropriate layout.

As described above, the present example also has the advantages of the above-described example, and in the present example, by adjusting the ratio of the emitter size of the transistor Q1 to the transistor Q1, the band of the current detection level can be reduced. This is very convenient for the operation of the protection circuit 2 because it can be adjusted beyond the limitation on the layout of R1.

Although the present invention has been described above, the above-described example can be further modified based on the technical idea of the present invention.

For example, any of the above-described transistors and the like can be used as appropriate in addition to the above.In the above-described example, the triode TS is used as a current supply element that supplies a control current of the current control transistor Q2. , TS
It is possible to use various devices such as a three-terminal amplifying element that can obtain the same performance as the characteristics shown in FIGS.

Note that the present invention is not limited to the sample and hold circuit described above, but can be applied to, for example, an output unit of a D / A converter circuit or the like, and its application range is wide.

F. As described above, according to the present invention, a current control transistor is connected between a control terminal of an output transistor and a ground terminal, and a power supply voltage terminal for providing an output voltage and the output transistor are connected. Drain electrode (third electrode)
And a control current is supplied from the drain electrode to the control terminal of the current control transistor, so that a predetermined output signal is obtained without adversely affecting the output signal. And a highly reliable semiconductor integrated circuit device that can be used.

[Brief description of the drawings]

1 to 8 show an embodiment of the present invention. FIG. 1 is an equivalent circuit diagram of a main part showing a first embodiment of the present invention. FIG. 2 is a layout pattern of FIG. FIG. 3 is an enlarged sectional view taken along line III-III of FIG. 2, FIG. 4 is a graph showing the drain current-cathode current characteristics of the triode TS in FIGS. 1 and 2, and FIG. 6 is a graph showing the beta-cathode current characteristics of the triode TS in FIGS. 1 and 2. FIG. 6 is a main part equivalent circuit diagram showing another example of the present invention. FIG. 7 is a layout pattern of FIG. FIG. 8 is a main part equivalent circuit diagram showing still another example of the present invention. FIG. 9 is a main part equivalent circuit diagram showing a conventional example. In the reference numbers shown in the drawings, Q1, Q1 ', Q1 ", Q1, Q2, Q4, QR1, QS1 ... NPN transistors R1, R2 ... Resistance TS ... Triode (current supply element) V _CC ... Power supply side GND …… Connection side.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03F 1/52 H01L 27/04

Claims (3)

(57) [Claims] 1. An output transistor which conducts in response to an input signal input to a control terminal and outputs a voltage from a power supply voltage terminal to an output terminal side, and is connected between a control terminal of the output transistor and a ground terminal. Current control transistor, an anode electrode and a cathode electrode respectively provided from a barrier metal forming a Schottky barrier and a first semiconductor region of a first conductivity type, and a second electrode formed in the first semiconductor region. A drain electrode provided from a second semiconductor region of two conductivity type, wherein the anode electrode is on the power supply voltage terminal side and the cathode electrode is on the output transistor side, between the power supply voltage terminal and the output transistor. And a schottky that supplies a control current from the drain electrode to a control terminal of the current control transistor. The semiconductor integrated circuit device having a rear diode. And a resistor connected between a control terminal of the current control transistor and a ground terminal, wherein the output transistor and the current control transistor are NPN transistors.
2. The semiconductor integrated circuit device according to claim 1, wherein the semiconductor integrated circuit device is a bipolar transistor. 3. The first semiconductor region is formed on a main surface of a semiconductor substrate of a second conductivity type, and a wiring connected to the first semiconductor region via a predetermined opening forms the barrier metal. And providing the anode electrode, and extracting the cathode electrode from the third semiconductor region of the first conductivity type having a higher impurity concentration than the first semiconductor region formed on the main surface of the first semiconductor region. 3. The semiconductor integrated circuit device according to claim 1, wherein said second semiconductor region is formed on a main surface of said first semiconductor region independently of said third semiconductor region.