JP3097605B2 - AGC circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a digital multi-valued Q
Regarding AM demodulation, in particular, AG that performs gain control of an input signal
It relates to a C (Auto Gain Control) circuit.

[0002]

2. Description of the Related Art Multi-valued Q which is one of digital transmission systems
The AM (Quadrature Amplitude Modulation) transmission method is a bidirectional TV in a cable TV (Cable TV).
And the Internet using a cable modem (Inte
(rnet) distribution, etc., and is attracting attention in fields requiring transmission of a large amount of digital data.

As a conventionally proposed method for performing AGC control with a multi-level QAM demodulator, data of an in-phase signal and a quadrature signal after quadrature demodulation are squared, added, and added. A method of performing level determination based on the result, adjusting the gain of the input signal, determining the balance using the squared in-phase and quadrature signal data, and correcting the balance between the in-phase signal level and the quadrature signal level after quadrature demodulation. Has been proposed, for example, in Japanese Utility Model Laid-Open No. 5-11521.

[0004] Referring to FIG. 5, in this prior art, a gain adjustment circuit 2 for adjusting the gain of a QAM signal inputted from an input terminal 1 and a quadrature-modulated QAM signal are in-phase.
Quadrature demodulation circuit 3 for quadrature separation, gain adjustment circuits 4 and 5 for adjusting the gain of the in-phase signal and quadrature signal after quadrature demodulation, and squaring circuits 25 and 2 for squaring the in-phase and quadrature signals.
6 and an adding circuit 27 for adding the squared in-phase and quadrature signals
And a level determination circuit 28 that determines whether a signal obtained by squaring and adding the in-phase and quadrature signals is within a reference range and controls the gain of the gain adjustment circuit 2, and the in-phase and quadrature squared by the squaring circuits 25 and 26. A balance control circuit 29 for controlling the gains of the gain adjustment circuits 4 and 5 so as to eliminate the difference between the signal amplitude levels, a phase correction circuit 6 for correcting the phases of the in-phase and quadrature signals, and a phase of the output of the phase correction circuit 6 And a carrier demodulation circuit 7 for detecting the deviation of the carrier wave.

The QAM signal input from the input terminal 1 is
The gain is adjusted by the gain adjustment circuit 2 and input to the quadrature demodulation circuit 3.

The quadrature demodulation circuit 3 performs quadrature modulated QAM
The signal is separated into an in-phase signal and a quadrature signal, and gain adjustment is performed by gain adjustment circuits 4 and 5, respectively.

In the quasi-synchronous method, since the in-phase and quadrature signals have a phase error and the data phase is rotating, the in-phase and quadrature signals are summed of squares and the level is determined based on the distance from the origin. That is, referring to FIG. 5, the squaring circuits 25 and 2
In step 6, the in-phase and quadrature signals are each squared, added by an adding circuit 27, and a level determination circuit 28 determines the level.

As a reference value in the level determination circuit 28, the sum of squares of a point farthest from the origin is set to a maximum value, and the sum of squares of a point closest to the origin is set to a minimum value. Input data 2
If the sum of the squares is larger than the maximum value, the gain adjustment circuit 2 outputs the gain so as to decrease the gain. If the sum is smaller than the minimum value, the gain adjustment circuit 2 increases the gain.

A balance control circuit 29 compares the difference between the amplitude levels of the in-phase and quadrature signals squared by the squaring circuits 25 and 26, controls the gains of the gain adjustment circuits 4 and 5, and adjusts the in-phase and quadrature signals. Eliminate level differences.

The outputs of the gain adjustment circuits 4 and 5 are input to a phase correction circuit 6. The output of the phase correction circuit 6 is input to the carrier wave demodulation circuit 7, which detects the phase error of the output of the phase correction circuit 6 and rotates the data so that the phase error is eliminated. Is output to the phase correction circuit 6.

The phase correction circuit 6 corrects a phase error in a quasi-synchronous system by rotating the phase at the angle input from the carrier wave demodulation circuit 7.

The in-phase signal output of the phase correction circuit 6 is output from an output terminal 8 to the outside, and the quadrature signal output is output from an output terminal 9 to the outside.

[0013]

However, in the prior art described above, as the QAM value increases, the number of data for which the level cannot be determined increases and the number of times of performing the AGC control decreases, so that the AGC operation becomes unstable. There is a problem that becomes. The reason is as follows.

That is, in the above prior art, since the in-phase and quadrature signals are sum of squares and the level is determined based on the distance from the origin, the maximum value is determined when the data comes to the four corners farthest from the origin. The minimum value is determined when data comes to the four central points closest to the origin. Therefore, even if the QAM is multi-valued, the number of controllable points does not change, and the data for which the level of the maximum value or the minimum value cannot be determined relatively increases.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made in view of the above problems, and has as its object to independently determine the level of an in-phase signal and a quadrature signal after phase correction and waveform equalization. AGC for performing stable AGC control by returning the level determination result to the original phase by the phase reverse correction circuit so as to be the same as the phase before the phase correction, and adjusting the gain.
It is to provide a circuit.

[0016]

In order to achieve the above object, an AGC circuit according to the present invention comprises:
Multi-level QAM demodulation that divides into an in-phase signal and a quadrature signal by the quasi-synchronous method, corrects the phase error generated by the quasi-synchronous method by the phase correction circuit, equalizes the waveform of the signal after the phase error correction, and outputs AGC circuit of the circuit , wherein the input signal gay
A first gain adjustment circuit for adjusting the quadrature modulation,
Quadrature demodulation circuit for separating signals into in-phase and quadrature, and quadrature demodulation
A second gain adjustment circuit for adjusting the gain of the subsequent in-phase signal, a phase correction circuit for correcting the phases of the in-phase and quadrature signals ,
Detecting the phase error of the output of the phase correction circuit,
The carrier demodulator circuit for outputting an angular theta, or the phase correction circuit
Phase is et output, determines the amplitude level of the quadrature signal
First and second level determination circuits and in- phase and quadrature codes
First and second code output circuits for outputting
The phase error angle θ, which is the output of the wave demodulation circuit,
And a second level determination circuit, and the first and second codes
The output of the output circuit is used as an input, and the correction method of the phase correction circuit is used.
A phase inverse correction circuit for correcting the phase in the opposite direction to the direction, phase
Signal, the average circuit asking you to mean the correction value of the quadrature signal, the
A difference circuit for calculating a difference between correction values of the phase signal and the quadrature signal;
And outputting the output of the averaging circuit to the first gain adjustment circuit.
Connected to the gain control terminal of the
Do not connect to the gain control terminal of the second gain adjustment circuit.
In the AGC circuit, the phase reverse correction circuit is as follows.
There is a UNA configuration.

In the present invention, the phase reverse correction circuit is provided.
However, the first and second phases differ in the method of calculating the phase reverse correction.
Incorrect correction circuit and wrong mode for determining the mode of error of amplitude level
The difference mode judgment circuit and the mode of the amplitude level error
To switch the output of the first and second phase reverse correction circuits
First and second select for in-phase and quadrature signals
And the outputs of the first and second selectors
A first and a second integrating circuit, Ru comprising a.

[Operation] The operation of the present invention will be described. Since the level can be determined independently for the in-phase signal and the quadrature signal after the phase correction, the AGC control can be performed at many points. Therefore, AGC is possible even for multi-valued QAM
Control becomes stable.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, preferred embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

Referring to FIG. 1, the embodiment of the present invention comprises (a) an input terminal 1, (b) a gain adjustment circuit 2 for adjusting the gain of an input signal, and (c) a quadrature modulated signal. A quadrature demodulation circuit 3 for separating in-phase and quadrature, (d) gain adjustment circuits 4 and 5 for adjusting the gains of the in-phase and quadrature signals after quadrature demodulation, and (e) a phase correction for correcting the phases of the in-phase and quadrature signals. A circuit 6; (f) a carrier demodulation circuit 7 for detecting a phase shift of the output of the phase correction circuit 6;
Level determination circuit 1 for determining the level of the absolute value of a quadrature signal
0 and 11; (h) a phase reverse correction circuit 12 for correcting the phase of the AGC control signal in the opposite direction to the correction direction of the phase correction circuit 6; and (i) an average of the correction values of the in-phase signal and the quadrature signal. And an averaging circuit 13 to be obtained.

The operation of the embodiment of the present invention will be described below. In the embodiment of the present invention, the phase shift in the quasi-synchronous method is corrected by the phase correction circuit 6, and the levels of the in-phase signal and the quadrature signal after waveform equalization are independently determined.

The results of the in-phase signal and the quadrature signal whose levels have been determined are made equal to the phase before the phase correction by the phase reverse correction circuit 12, and the gain is adjusted after quadrature demodulation.

The level determination results of the in-phase signal and the quadrature signal are averaged to adjust the gain of the entire input signal.

The embodiment of the present invention differs from the prior art described with reference to FIG. 5 in that level determining circuits 10 and 11 for determining in-phase and quadrature signal levels, and the rotational direction of the phase correcting circuit 6 Phase reverse correction circuit 12 rotating in the opposite direction
And the basic operation is almost the same except that the averaging circuit 13 is added, and the basic operation is almost the same. Therefore, the description of the same part will be appropriately omitted, and the added function will be mainly described below in detail.

Because of the quasi-synchronous method, the output of the quadrature demodulation 3 has a phase error, and the data is rotated.

The carrier demodulation circuit 7 detects the phase error of the output of the phase correction circuit 6 and removes the phase error so as to eliminate the phase error.
A rotation angle opposite to the direction in which the data is rotating is output to the phase correction circuit 6.

The phase correction circuit 6 corrects the phase error by rotating the phase by the angle input from the carrier wave demodulation circuit 7 and stops the data rotation.

The level determination circuits 10 and 11 perform level determination independently based on the absolute values of the in-phase and quadrature outputs of the phase correction circuit 6 in which the rotation of the data is stopped.

The result of the in-phase and quadrature level determination is input to the phase reverse correction circuit 12. The phase reverse correction circuit 12 receives the rotation angle of the phase error correction from the carrier wave demodulation circuit 7 and rotates the phase of the level determination output in the opposite direction so as to cancel the effect of the phase correction circuit 6. The phase is adjusted to the phase before the phase correction in step 6.

The in-phase and quadrature outputs of the phase reverse correction circuit 12 are as follows:
The signals are input to gain adjustment circuits 4 and 5, and adjust the gains of the in-phase and quadrature signals, respectively. Further, the in-phase and quadrature outputs of the phase reverse correction circuit 12 are averaged by the averaging circuit 13, and the gain of the QAM signal is adjusted by the gain adjustment circuit 2.

Because of the quasi-synchronous system, the output after quadrature demodulation is
Since the data is rotating, it is impossible to determine the level of the in-phase signal and the quadrature signal independently. In the above prior art, the level is determined by summing the squares of the outputs after the quadrature demodulation. However, as in this embodiment, the absolute value of the data output from the phase correction circuit 6 whose rotation has been stopped is used. If the level judgment is performed, it is not necessary to take the sum of the squares of the in-phase and the quadrature, and the level judgment can be performed independently.

Thus, for example, in the case of 64-value QAM, it can be determined that the gain is large.
In GC control, only at the four corners farthest from the origin,
In the embodiment of the present invention, since the in-phase signal and the quadrature signal are individually subjected to level determination, the outermost 28
You can judge by points. The same is true when it is determined that the gain is small.

When the 256-value QAM is reached, the AGC control of the prior art remains at 4 points, but the AGC control according to the embodiment of the present invention can determine at 60 points.

[0034]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention;

FIG. 2 is a diagram showing the configuration of the first embodiment of the present invention. Referring to FIG. 2, the first embodiment of the present invention comprises: (a) an input terminal 1, (b) a gain adjustment circuit 2 for adjusting the gain of an input signal, and (c) a quadrature modulated signal in phase. A quadrature demodulation circuit 3 for quadrature separation, and (d) a gain adjustment circuit 4 for adjusting the gain of the in-phase signal after quadrature demodulation.
(E) a phase correction circuit 6 for correcting the phase of the in-phase and quadrature signals, and (f) a carrier demodulation circuit 7 for detecting a phase error of an output of the phase correction circuit 6 and outputting a phase error angle θ.
(G) level judgment circuits 10 and 11 for judging in-phase and quadrature signal levels, (h) code output circuits 14 and 15 for outputting in-phase and quadrature codes, and (i) correction direction of phase correction circuit 6. Is a phase reverse correction circuit 1 for correcting the phase in the reverse direction
2; (j) an averaging circuit 13 for calculating the average of the correction values of the in-phase signal and the quadrature signal; and (k) a difference circuit 16 for calculating the difference between the correction values of the in-phase signal and the quadrature signal. ing.

FIG. 3 shows a configuration of the phase reverse correction circuit 12 in one embodiment of the present invention.

Referring to FIG. 3, the phase reverse correction circuit 12
Are two phase reverse correction circuits 17 and 18 having different calculation methods for phase reverse correction, an error mode determination circuit 19 for determining an error mode of the amplitude level, and two phase reverse correction circuits depending on the mode of the amplitude level error. An in-phase signal selector 20 and a quadrature signal selector 21 for switching the output of
And integrating circuits 22 and 23.

Next, the operation of the first embodiment of the present invention will be described in detail with reference to FIGS.

In the present embodiment, the gain adjustment after the quadrature demodulation circuit 3 is performed only on the in-phase signal side, and the in-phase output after the phase reverse correction and the The gain is adjusted based on the difference between the outputs so that the gains of the in-phase and quadrature signals are the same.

There are two types of operations for the phase reverse correction, which are selected according to the level determination results of the in-phase and quadrature signals.

The QAM signal input from the input terminal 1 is
The gain is adjusted by the gain adjustment circuit 2 and input to the quadrature demodulation circuit 3.

The quadrature demodulation circuit 3 performs quadrature modulated QAM
The signal is separated into an in-phase signal and a quadrature signal, and the in-phase signal is gain-adjusted by a gain adjustment circuit 4 so as to balance the amplitudes of the in-phase and quadrature signals so as to be the same.

The output of the gain adjustment circuit 4 and the quadrature demodulation circuit 3
Are output to a phase correction circuit 6, and the output of the phase correction circuit 6 is input to a carrier demodulation circuit 7.

The carrier demodulation circuit 7 obtains the phase error angle θ of the output of the phase correction circuit 6 and outputs it to the phase correction circuit 6.
The output phase correction circuit 6 corrects the phase error in the quasi-synchronous method by rotating the phase by the angle input from the carrier wave demodulation circuit 7.

The operation of the phase correction circuit 6 is performed according to the following equation (1).

Io = Ii · cos θ + Qi · (−sin θ) Qo = Ii · sin θ + Qi · cos θ (1)

Here, Io: in-phase output, Ii: in-phase input,
Qo: quadrature output, Qi: quadrature input, θ: phase error angle.

The in-phase signal output of the phase correction circuit 6 is output from the output terminal 8 to the outside, and the quadrature signal output is output from the output terminal 9 to the outside.

The in-phase and quadrature outputs of the phase correction circuit 6 are input to level determination circuits 10 and 11, respectively.

The output of the level determination circuit is 1 bit. The absolute value of the input signal is compared with a reference value. If the absolute value of the input signal exceeds the upper limit of the reference value, an H level is output. If it exceeds L, an L level is output. If neither is the case, the previous value is retained.

The in-phase and quadrature outputs of the phase correction circuit 6 are input to code output circuits 14 and 15, respectively. The output of the sign output circuits 14 and 15 is 1 bit, and outputs an L level when the input signal is positive, and outputs an H level when the input signal is negative.

The phase error angle of the carrier demodulation circuit 7, the level judgment outputs of the level judgment circuits 10 and 11, the code output circuit 1
The code outputs of 4 and 15 are input to the phase reverse correction circuit 12.

FIG. 3 shows the configuration of the phase reverse correction circuit 12 according to one embodiment of the present invention. The phase reverse correction circuit 17 includes the outputs of the level determination circuits 10 and 11 and the code output circuit 14.
15 and the output of the carrier demodulation circuit 7 are input.

The operation of the phase reverse correction operation circuit 17 is performed by the following equation (2).

Ia = | Is · cos θ + Qs · sin θ | · Ie Qa = | Is · (−sin θ) + Qs · cos θ | · Qe (2)

Here, Ia: in-phase output, Ie: output value of the level judgment circuit 10, Is: output value of the sign output circuit 14, Qa:
Quadrature output, Qe: output value of level determination circuit 11, Qs: output value of sign output circuit 15, θ: phase error angle.

The output of the level judgment circuits 10 and 11 and the output of the carrier demodulation circuit 7 are input to the phase reverse correction operation circuit 18.

The operation of the phase reverse correction operation circuit 18 is performed by the following equation (3).

Ib = Ie · | cos θ | + Qe · | sin θ | Qa = Ie · | −sin θ | + Qe · | cos θ | (3)

Here, Ib: in-phase output, Ie: output value of the level judgment circuit 10, Qb: quadrature output, Qe: output value of the level judgment circuit 11, Qs: output value of the sign output circuit 15, and θ: phase error angle. .

The outputs of the level determination circuits 10 and 11 are input to an error mode determination circuit 19,
9 is input to selectors 20 and 21. The error mode determination circuit 19 selects the phase reverse correction calculation circuit 17 by the selectors 20 and 21 if the outputs of the level determination circuits 10 and 11 are the same, and selects the phase reverse correction calculation circuit 18 if the outputs are different.

The outputs of the selectors 20 and 21 are output from the integrating circuit 2
2 and 23, and output as an output of the phase reverse correction circuit 12.

The in-phase and quadrature outputs of the phase reverse correction circuit 12 are averaged by the averaging circuit 13, and the gain is adjusted by the gain adjustment circuit 2. The in-phase and quadrature outputs are also input to the difference circuit 16, which determines the difference between the in-phase signal and the quadrature signal, and adjusts the gain of the in-phase signal by the gain adjustment circuit 4.

The configuration of the second embodiment of the present invention will be described with reference to the drawings.

Referring to FIG. 4, the configuration of the second embodiment of the present invention is different from the first embodiment shown in FIG. 2 in that a waveform equalization circuit 24 is added immediately after the output of the phase correction circuit 6. Yes,
Other configurations are the same.

The operation of the second embodiment of the present invention is different from that of the first embodiment described with reference to FIG. 2 in that a waveform equalization circuit 24 is added immediately after the output of the phase correction circuit 6. Since the other parts are the same, the description of the same parts will be appropriately omitted, and the functions added in the present embodiment will be described below with reference to FIG.

The output of the phase correction circuit 6 is
4 for waveform equalization. The output of the waveform equalizer 24 is input to the carrier demodulator 7. Carrier demodulation circuit 7
Calculates the phase error angle θ at the output of the waveform equalization circuit 24 and outputs it to the phase correction circuit 6.

The phase correction circuit 6 corrects the phase error in the quasi-synchronous method by rotating the phase by the angle input from the carrier wave demodulation circuit 7. The in-phase signal output of the waveform equalization circuit 24 is output from the output terminal 8 to the outside, and the quadrature signal output is output from the output terminal 9 to the outside.

The in-phase and quadrature outputs of the waveform equalization circuit 24 are input to level determination circuits 10 and 11, respectively, and the in-phase and quadrature outputs of the waveform equalization circuit 24 are input to code output circuits 14 and 15, respectively. AGC similar to the embodiment of
Perform control.

By adding the waveform equalization circuit 24 after the phase correction circuit 6, the level can be determined with the signal after the waveform equalization, and the AGC control is further stabilized.

[0071]

As described above, according to the present invention,
The maximum value and the minimum value can be determined at many points even with a multi-valued QAM signal, so that there is an effect that stable AGC control can be performed.

The reason is as follows. That is, in the present invention, level determination is performed independently for the in-phase signal and the quadrature signal from which the phase error in the quadrature demodulation has been removed. For this reason, the number of points at which the level can be determined even with multi-valued QAM increases, and the number of times of performing the AGC control increases, whereby stable AGC control can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of one embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a phase reverse correction circuit according to one embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input terminal 2, 4, 5 Gain adjustment circuit 3 Quadrature demodulation circuit 6 Phase correction circuit 7 Carrier wave demodulation circuit 8 In-phase signal output terminal 9 Quadrature signal output terminal 10, 11 Level judgment circuit 12 Phase reverse correction circuit 13 Average circuit 14, Reference Signs List 15 Sign output circuit 16 Difference circuit 17, 18 Phase reverse correction operation circuit 19 Error mode determination circuit 20, 21 Selector 22, 23 Integration circuit 24 Waveform equalization circuit 25, 26 Square circuit 27 Addition circuit 28 Level determination circuit 29 Balance control circuit

Continuation of the front page (56) References JP-A-6-152676 (JP, A) JP-A-8-223237 (JP, A) JP-A-6-205067 (JP, A) JP-A-6-90265 (JP) , A) JP-A-5-292140 (JP, A) JP-A-8-317012 (JP, A) JP-A-5-11521 (JP, U) Proc. August 15, Sep. 2, pp. 2-301 Proceedings of the 1993 Autumn Meeting of the Institute of Electronics, Information and Communication Engineers, August 15, 1993, Sep. 2, pp. 2-302 (58) Fields surveyed (Int. . ^7, DB name) H04L 27/00 - 27/38 H03G 3/30

Claims (1)

(57) [Claims] 1. An input multi-level QAM signal is divided into an in-phase signal and a quadrature signal by a quasi-synchronous method, and a phase error generated by the quasi-synchronous method is corrected by a phase correction circuit to correct the phase error. An AGC circuit of a multilevel QAM demodulation circuit for equalizing a waveform of a subsequent signal and outputting the same, wherein a first gain adjustment circuit for adjusting a gain of an input signal, and a quadrature for separating a quadrature-modulated signal into in-phase and quadrature signals A demodulation circuit, a second gain adjustment circuit for adjusting the gain of the in-phase signal after quadrature demodulation, a phase correction circuit for correcting the phases of the in-phase and quadrature signals, and detecting a phase error of an output of the phase correction circuit. A carrier demodulation circuit that outputs a phase error angle θ; first and second level determination circuits that determine the amplitude levels of in-phase and quadrature signals output from the phase correction circuit; Output first and second A code output circuit, a phase error angle θ that is an output of the carrier wave demodulation circuit, the first and second level determination circuits, and an output of the first and second code output circuits. A phase reverse correction circuit that corrects the phase in a direction opposite to the correction direction of the phase correction circuit; an averaging circuit that calculates an average of correction values of the in-phase signal and the quadrature signal; and a difference between the correction values of the in-phase signal and the quadrature signal. And an output of the averaging circuit is connected to a gain control terminal of the first gain adjustment circuit, and an output of the difference circuit is connected to a gain control terminal of the second gain adjustment circuit. In the AGC circuit, the phase reverse correction circuit has a different operation method of the phase reverse correction.
An error mode determination circuit for determining a mode of an error of an amplitude level with the first and second phase reverse correction circuits;
The first and the second depending on the path and the mode of the amplitude level error.
In-phase signal for switching the output of the phase reverse correction circuit, and quadrature
First and second selectors for signals and first and second selectors connected to the outputs of the first and second selectors.
And AGC circuit, wherein the second integrator, further comprising a.