JP3097521B2 - Method for manufacturing field emission element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a field emission element.

[0002]

2. Description of the Related Art In recent years, a vacuum microdevice technology for producing a minute cold cathode electron source using a microfabrication technology of a semiconductor integrated circuit and applying the same to an ultrafine amplifying element, an integrated circuit, a flat display, and the like has attracted attention. Have been. For practical use of vacuum microdevices, it is essential to develop a cold cathode electron source that can stably emit a large current at a low voltage. The cold cathode electron source is roughly divided into a field emission type in which electrons are emitted from a sharp tip of an emitter electrode using electric field concentration,
There is a method of generating high-energy electrons in a semiconductor by avalanche or the like and extracting the electrons to the outside. The emitter electrode structure includes a vertical emitter in which needle-like sharp protrusions are formed in a direction perpendicular to the substrate, and a horizontal emitter in which needle-like sharp protrusions are formed in a plane along the substrate surface.

As a conventional method of manufacturing a field emission electron source of a vertical emitter, as shown in FIG. 31, a recess having vertical side walls is formed in a substrate (a), and a sacrificial film is formed by a layered uniform deposition method, as shown in FIG. Is deposited, and then an emitter electrode material film is deposited (b), and the substrate and the sacrificial film are removed to form an emitter (c) (S. Zimmerman, Abs. 3rd Int. Vac).
uum Microelectronics Conf., Monterey, 1990, 1-4). In this method, it is necessary to make the sacrificial film to be deposited sufficiently thick in order to obtain an inverted conical emitter mold using the sacrificial film. However, when a thick sacrificial film is deposited in one step, cracks are likely to occur due to thermal stress during cooling after film formation. When the emitter material enters this crack,
An emitter having a desired shape cannot be obtained, and a field emission element having desired performance cannot be obtained.

In the method shown in FIG. 31, a sacrificial film is deposited by a layered uniform deposition method, that is, a film deposition method with good step coverage. According to this method, as shown in FIG. 32A, the radius of curvature of the tip A of the concave portion formed in the sacrificial film tends to be as large as about 50 nm, and it is difficult to produce an emitter having a sharp tip. Conversely, when a film deposition method with poor step coverage is used, even if a sacrificial film having the same thickness as that shown in FIG. 32A is formed, an overhang is formed as shown in FIG. Cannot be obtained. In this method as well, if the sacrificial film is made thicker, FIG.
As shown in (c), an inverted conical emitter molding die is obtained, but in this case, the apex angle of the tip becomes too large and the occurrence of cracks becomes more remarkable.

As another method for manufacturing a vertical emitter, FIG.
As shown in (1), an etching mask is formed on the crystal substrate (a), the substrate is etched by anisotropic etching to form a recess (b), an emitter electrode material film is deposited (c), and unnecessary portions are removed. A method (d) for completing the emitter by performing the above method has also been proposed (see, for example, JP-A-4-61729 and JP-A-5-225895). In this method, the concave portion formed has a quadrangular pyramid shape, and the apex angle of the concave portion is determined by the angle formed by the crystal plane of the substrate. Therefore, when a concave portion obtained by anisotropic etching is used as it is as an emitter mold, an emitter having a small apex angle cannot be obtained. Also, a square emission emitter cannot provide stable emission current characteristics. Further, a substrate on which anisotropic etching can be performed is limited to single crystal silicon or GaAs having a (100) plane, and the etching method is also wet etching. Therefore, the degree of freedom in design is small and miniaturization of elements is difficult.

As another conventional method using anisotropic etching, as shown in FIG. 34, an etching mask is formed on a silicon layer and anisotropic etching is performed (a), and then the etching mask is removed to remove heat. A method (b) has been proposed in which an oxide film is formed by performing oxidation, a concave portion having a small apex angle is obtained on the surface thereof, and an emitter electrode film is deposited (Japanese Unexamined Patent Application Publication No. Hei 5 (1994)).
174703). According to this method, the apex angle of the tip can be reduced by oxidizing the concave portion to form an emitter mold. However, since the apex angle before oxidation is determined as described above, an arbitrary apex angle cannot be obtained. Further, similarly to the above-described method, only a quadrangular pyramid-shaped emitter can be obtained, the substrate to be used is limited, the degree of freedom in design is low, and it is difficult to miniaturize the element.

[0007]

As described above, according to the conventional method of obtaining a mold for a vertical emitter by depositing a sacrificial film, if a tip having a small radius of curvature is to be obtained, the sacrificial film is easily cracked and a high yield is obtained. And reliability cannot be obtained. Further, in the method of obtaining an emitter mold using anisotropic etching, the degree of freedom of design is limited, and it is not possible to obtain an emitter of an arbitrary shape having a small radius of curvature and apical angle at the tip, and the There is a drawback that miniaturization is also difficult.

An object of the present invention is to provide a method of manufacturing a field emission element in which an emitter having a small tip curvature and a small apex angle can be formed into an arbitrary shape.

[0009]

According to a method of manufacturing a field emission element according to the present invention, first, a step of forming a recess having a side wall perpendicular or substantially perpendicular to the surface of a substrate, and forming the recess. Depositing a first sacrificial film on the substrate,
Etching the first sacrificial film to form a side spacer on a side wall of the concave portion, depositing a second sacrificial film on a substrate having the concave portion in which the side spacer is formed, Forming an emitter by depositing a conductive film on the sacrificial film, and exposing the emitter by removing unnecessary material thereunder. In this manufacturing method, preferably,
Over-etching is performed in the process of forming the pacer,
Carve the board.

In the method for manufacturing a field emission element according to the present invention, secondly, a step of depositing a first conductive film serving as a gate electrode on a surface of the substrate, and reaching the substrate on the first conductive film. Forming a recess having a vertical or substantially vertical sidewall, depositing a first insulating film on the first conductive film having the recess formed therein, etching the first insulating film, Forming a side spacer on the side wall of the concave portion, depositing a second insulating film on the first conductive film and the side spacer, and depositing a second conductive film on the second insulating film. And forming at least a portion of the first and second insulating films around the tip of the emitter.

According to the method of the present invention, a side spacer is formed in a concave portion having a vertical or almost vertical side wall,
The concave side wall is provided with a smooth inclination and the concave volume is reduced. Thereby, the sacrificial film or the insulating film to be subsequently deposited can be thinned to obtain an emitter mold.
Therefore, even when a film deposition method with good step coverage is used for depositing these insulating films and sacrificial films, it is possible to suppress the thermal stress applied at the time of cooling after the film formation and to prevent cracks. As described above, a field emission element having an emitter having a desired shape can be manufactured with high yield.

In the method of the present invention, the opening of the concave portion is made to have a forward tapered shape by the side spacer. As a result, a sacrificial film or an insulating film to be subsequently deposited can be formed by a film deposition method with poor step coverage to obtain an inverted conical emitter mold having a small radius of curvature and a small apex angle. And a conical emitter with a small apex angle can be obtained. According to the present invention, a large maximum electric field strength can be obtained at the tip of the emitter, so that a high-performance field emission element capable of obtaining a large emission current with a low gate-emitter voltage can be realized.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a manufacturing process of a basic embodiment of the present invention. First, as shown in FIG. 1A, at least one concave portion 11 having a vertical side wall is formed on the surface of a substrate 10. Although one recess 11 corresponding to one emitter is shown in the figure, a large number of similar recesses are formed when a large number of emitters are arranged to form a field emission emitter array (FEA). The shape of the concave portion 11 is a circle when a point type emitter is formed, and is a stripe shape when a wedge type emitter is formed.

In this embodiment, a silicon substrate is used as the substrate 10, and a resist mask is formed by using a usual lithography technique for processing the concave portion 11, and reactive ion etching (RIE) is used. The size of the concave portion 11 is set according to the required size of the cold cathode emitter.
For example, the width is about 0.1 to 1 μm and the depth is 1
/ 2. The substrate 10 includes another semiconductor substrate such as Ge or GaAs, an insulating substrate such as glass or quartz, Al,
Other materials such as a conductive substrate such as Cu may be used. Further, these laminated substrates may be used. Ion milling can also be used to process the recess 11. Also, without using a resist mask, the substrate 1 can be directly formed using ion milling or a laser beam.
The recess 11 can be machined to zero.

Next, on the substrate 10 in which the concave portion 11 is opened,
As shown in FIG. 1B, a silicon oxide film is deposited as the first sacrificial film 12. For the film deposition method, a low-pressure CVD method with good step coverage is used. As a result, the surface of the first sacrificial film 12 reflects the shape of the underlying concave portion 11.
The preferred thickness of the first sacrificial film 12 is determined by the size of the concave portion 11, but is, for example, about 0.05 to 0.5 μm. As the first sacrificial film 12, another insulating film such as a silicon nitride film, a semiconductor film such as an amorphous silicon film or a polycrystalline silicon film, Ti, Mo, Al, TiN, TiW, WSi
Or other conductive material films. As a film deposition method with good step coverage, in addition to the low pressure CVD method,
The VD method and the CVD method using O ₃ and TEOS are also effective. Alternatively, a vacuum deposition method or a sputtering method can be used.

Next, the entire surface of the first sacrificial film 12 is etched (etched back) to leave a side spacer 13 only on the side wall of the recess 11 as shown in FIG. Anisotropic dry etching is used for this etch back.
For example, low pressure magnetron RIE, microwave plasma etching, ECR, light excitation etching, induction excitation type plasma etching, and the like. Due to the formation of the side spacers 13, the side walls of the recess 11 are provided with a smooth inclination, and the volume is reduced.

Next, as shown in FIG. 1D, the same silicon oxide film as the first sacrifice film 12 is formed on the entire surface as the second sacrifice film 14 by, for example, 20 to 20 Å by a film deposition method with good step coverage. Deposit 300 nm. Second sacrificial film 14
Is determined by the size of the concave portion 11, but the thickness of the concave portion 11 needs to be at least half the diameter of the bottom of the concave portion 11 narrowed by the side spacer 13. The second sacrificial film 14 serves as a mold for the emitter, and a concave portion 15 having a sharp tip is formed on the surface as shown in the figure without increasing the film thickness so much. Side spacer 13
Since the second sacrificial film 14 is formed in a relatively thin shape by a film deposition method having a good step coverage, the second sacrificial film 14 is formed in a forward tapered shape in which the upper opening of the concave portion 11 is substantially opened.
The occurrence of cracks and the like is prevented. The second sacrificial film 14
Alternatively, another material similar to the first sacrificial film 12 can be used instead of the silicon oxide film. Specifically, for example, as the second sacrificial film 14, a silicon nitride film (Si ₃
N ₄ ) or an alumina film (Al ₂ O ₃ ) can be used. However, since the first sacrifice film 12 and the second sacrifice film 14 are etched later in the step of exposing the tip of the emitter,
It is preferable to select a material in consideration of etching selectivity and etching rate.

Next, as shown in FIG. 1E, an emitter electrode film (cold cathode material film) 16 is formed on the second sacrificial film 14. As described above, in this embodiment, as a result of forming the side spacer 13 having a taper in the concave portion 11, the second spacer is formed.
Since a concave portion 15 having a sharp tip is formed on the upper surface of the sacrificial film 14 with a smooth curve, the emitter electrode film 16 has a smooth and sharp tip formed in a portion embedded in the concave portion 15. . Specifically, in this embodiment, a W film was used as the emitter electrode film 16, but other various metal materials (Al, Cu, Mo, Au, Pt, Ag, T
i, Ni, Ta, Re, Cr, Zr, Hf, Y, Bi,
(Sr, Tl, Pb, Ca, Sn, Ge, etc.) or a conductive material composed of these compounds can be used. However,
Since the second sacrifice film 14 is etched later, it is necessary to select a combination of materials with the second sacrifice film 14 so that an etching selectivity with the second sacrifice film 14 is sufficient.

Finally, an unnecessary portion under the emitter is removed by wet etching or dry etching.
For example, as shown in FIG. 1F, the substrate 10, the side spacers 13, and the second sacrificial film 14 are all removed to expose a sharp emitter tip. Thus, according to this embodiment, it is possible to obtain a fine emitter having a radius of curvature at the tip of about 10 nm or less.

In the above embodiment, the first sacrificial film 12
Was formed by a film deposition method with good step coverage. The problem generated by this method will be described with reference to FIG. FIG. 2 (a)
(C) is an enlarged view corresponding to FIGS. 1 (b) to (d). When the first sacrificial film 12 is formed by a film deposition method with good step coverage, a large curvature tends to appear at the bottom corner C of the concave portion as shown in FIG. In this state, when the first sacrificial film 11 is etched back, as shown in FIG.
Has a shape that pulls the hem. Then, when the second sacrificial film 14 is deposited thereon, it is affected by the shape of the side spacer 13, and as shown in FIG. There is a high possibility that these will be large.

In order to solve this problem, it is preferable to perform over-etching for slightly etching the substrate in the step of etching back the first sacrificial film 12 for forming the side spacer. FIG. 3A shows the shape of the side spacer 13 formed by this method. According to this method, FIG.
The side spacer 13 can be obtained even when the corner C has a large radius of curvature as shown in FIG.
Therefore, if the second sacrificial film 14 is subsequently deposited, FIG.
As shown in (b), an emitter forming type having a sharp tip with a radius of curvature of 10 nm or less can be obtained.

In the above embodiment, the second sacrificial film 14 shown in FIG. 1D is formed by a film deposition method having poor step coverage.
For example, it can be formed by a low pressure CVD method, a sputtering method, or the like. FIG. 4 shows the structure obtained at that time. As is apparent from comparison with FIGS. 32B and 32C when the sacrificial film is deposited in the concave portion having the vertical side wall by the film deposition method with poor step coverage, the curvature of the radius of curvature is increased by the action of the side spacer 13. A mold with a very small tip is obtained. In other words, when the second sacrificial film 14 is formed by a film deposition method with good step coverage, the bottom of the slope formed by the side spacers 13 becomes gentle, and the upper surface of the second sacrificial film 14 is also easy to become gentle, so that it is sharp. Emitter tip cannot be obtained. On the other hand, if the second sacrificial film 14 is formed by a film deposition method with poor step coverage, the thickness of the second sacrificial film 14 becomes thinner at the bottom of the concave portion, so that the upper surface thereof becomes steep. Therefore, a sharp tip is formed on the emitter electrode film formed thereon. Incidentally, as a similar technique, a method of forming a side spacer in a hole of a wiring contact of a semiconductor device is known (for example, US Pat. No. 5,408,130, US Pat. No. 5,403,7).
No. 57 etc.). However, these are techniques for preventing disconnection of wiring, and do not suggest a technique for obtaining a sharp emitter tip as in the present invention.

In the embodiment shown in FIG.
In order to impart sufficient mechanical strength to the film 6, before removing unnecessary portions by etching, for example, as shown in FIG. It is preferable that the support substrate 18 is bonded. As the adhesive 17, an organic material such as an epoxy resin or an inorganic material such as a low-melting glass can be used. The support substrate 18 can be made of an insulating material such as glass, quartz, a silicon oxide film, or a silicon nitride film, a semiconductor material such as Si or Ge, a conductive material such as Al or Cu, or a combination thereof. At that time, FIG.
As shown in (b), it is also effective to previously planarize the surface of the emitter electrode film 16 with a planarizing film 19 such as SOG. Although not shown, it is also effective to flatten the surface of the emitter electrode film 16 by CMP or to flatten it by etch back using a resist or SOG as a sacrificial film.

In the embodiment shown in FIG. 1, the substrate 10 has a single-layer structure, but may have a two-layer structure as shown in FIG. In this case, it is desirable that the materials of the starting substrate 10a and the laminated film 10b be a combination that allows a large etching selectivity. Then, when the concave portion 11 is etched, the starting substrate 10a serves as an etching stopper, and the concave portion 11 having a depth determined by the film thickness of the laminated film 10b is obtained.

In the embodiment of FIG. 1, the first sacrificial film 12
Can be stopped in a state where the first sacrificial film 12 on the non-concave portion does not completely disappear. FIG. 7 shows the structure obtained in that case. By controlling the etching amount, the concave portion 15 reflected on the surface of the second sacrificial film is formed.
, That is, the tip shape of the emitter electrode film 16 can be finely adjusted.

FIG. 8 shows a manufacturing process of another embodiment of the present invention corresponding to FIG. 1 are given the same reference numerals as in FIG. 1 and detailed description is omitted. In this embodiment, the first sacrificial film 12 is deposited by a film deposition method having poor step coverage, so that the overhang 12a is formed as shown in FIG. 8B. Specifically, as the film deposition method of the first sacrificial film 12, a vacuum deposition method, a sputtering method, a plasma CVD method, or the like is used.

The first sacrificial film 12 on which such an overhang 12a is formed is etched back to form a side spacer 13 as shown in FIG. The sides spacer 13 is affected by the overhang 12a,
It is formed so as to draw a two-step arc as shown. When the second sacrificial film 14 is formed by a film deposition method with good step coverage, as shown in FIG. 8D, a sharp tip shape that also draws a two-step arc reflecting the surface shape of the side spacer 13 is formed. Is formed.

Therefore, according to this embodiment, FIG.
As shown in (f), an emitter having a sharper projection with the tip narrowed in two stages is obtained. In this embodiment, modifications similar to those described with reference to FIGS. 3 to 7 are possible.

FIGS. 9 and 10 show a manufacturing process of an embodiment in which the present invention is applied to a three-electrode device having a gate electrode and an anode electrode. As shown in FIG.
Are formed on the insulator 20a by the anode electrode 20b and the insulating film 20c.
Are laminated substrates. Specifically, the insulator 20a is a glass such as a silicon oxide film or soda lime, and the anode electrode 20b is a polycrystalline silicon.
c is a silicon oxide film. First, a stacked film of a polycrystalline silicon film and a W silicide film is deposited as a first conductive film 21 serving as a gate electrode on the substrate 20, and then the first conductive film 21 and the insulating film 20c thereunder are deposited by RIE. By selective etching, a concave portion 22 having a vertical side wall having a depth reaching the anode electrode 20b is formed. The shape of the recess 22 as viewed from above is not limited to a perfect circle, but is round. This is because an unnecessary ridge that disturbs the electric field is not formed on the finally obtained side surface of the emitter, and an emitter shape close to a substantially cone is obtained.

Next, as shown in FIG. 9B, a silicon oxide film is deposited by a CVD method as the first insulating film 23, and this is etched back. As shown in FIG. A side spacer 24 is formed on the side wall of the recess 22.
This first insulating film 23 corresponds to the first sacrificial film of the previous embodiment. Thereafter, as shown in FIG. 9D, a silicon oxide film is again deposited as the second insulating film 25 by the CVD method. The second insulating film 25 corresponds to the second sacrificial film of the previous embodiment, and has a concave portion 26 having a sharp tip for forming an emitter formed on the surface thereof.

Subsequently, as shown in FIG. 10A, a second conductive film 27 serving as an emitter electrode is formed on the second insulating film 25. Specifically, the second conductive film 27 is, for example,
A stacked film of a TiN film formed by a sputtering method or a CVD method and a W film formed by a CVD method is used. Then, the second conductive film 2
7 is selectively etched, and as shown in FIG.
The slit openings 28 are opened on both sides of the portion actually functioning as the emitter 27a. Through the slit opening 28, the second insulating film 25 used as a template, the side spacer 24 of the first insulating film, and the insulating film 20c in the substrate 20 are isotropically formed using buffered hydrofluoric acid (BHF). Etching is performed by wet etching to expose the tip of the emitter 27a, the gate electrode surface, and the surface of the anode electrode 20b, as shown in FIG.

FIG. 11 is a perspective view showing the state of FIG. 10 (c). By vacuum-sealing the triode element thus obtained, a minute triode vacuum tube can be obtained.
As described above, according to this embodiment, a field emission element having a high-performance cold cathode emitter, which is self-aligned with the gate electrode and integrally formed, is obtained.

In the above embodiment, the anode electrode 2
0b other materials include amorphous silicon, W silicide, Mo silicide, W, Mo, Ti, Ta, Cr
Etc. can be used. As the first conductive film 21 serving as a gate electrode, polycrystalline silicon, amorphous silicon, W silicide, Mo silicide, W, Mo, T
i, Ta, Cr or the like can be used. Further, as the second conductive film 27 serving as the emitter, another material as exemplified in the above embodiment can be used. As the first and second insulating films 23 and 25 and the insulating film 20c inside the substrate, a silicon nitride film, a laminated film of a silicon oxide film and a silicon nitride film, or the like can be used.

In the above embodiment, in the step of FIG. 10C, the insulating film under the emitter is removed only by isotropic wet etching, but dry etching may be combined. For example, as shown in FIG. 12A, the insulating film immediately below the slit opening 28 is removed almost vertically by RIE using an RIE method, and subsequently, shown in FIG. 12B by lateral etching by isotropic etching. Thus, the insulating film immediately below the emitter can be removed.

FIGS. 13 to 15 show another embodiment. In this embodiment, as shown in FIG.
A starting substrate 30 is formed by forming a 450 nm silicon nitride film 30b on a silicon substrate 30a of about μm. On this substrate 30, a 150 nm phosphorus-doped polycrystalline silicon film 31a as a first conductive film 31 and a 100n
Thus, a laminated film of the W silicide film 31b is formed. Then, a concave portion 32 having a diameter of about 0.5 μm is formed in the first conductive film 31 by lithography and RIE etching.

Next, as shown in FIG. 13B, a silicon oxide film is formed as the first insulating film 33. Specifically, TEOS is performed at a substrate temperature of 720 ° C. and a pressure of 50 Pa.
Is performed as a raw material, and a 240 nm-thick silicon oxide film is deposited. Subsequently, only the first sacrificial film 33 is selectively etched back by RIE, and FIG.
As shown in (c), a side spacer 34 is formed on the side wall of the recess 32.

Next, as shown in FIG. 13D, a silicon oxide film is deposited again as the second insulating film 35. Here, atmospheric pressure CVD is performed at a substrate temperature of 400 ° C. using TEOS, O _3, and O ₂ as raw materials to form a 200 nm silicon oxide film. As a result, a concave portion 36 having a sharp tip is formed on the surface. After the formation of the silicon oxide film, lamp heating is performed to increase the temperature from room temperature to 850 ° C. for 10 seconds and maintain the temperature at 850 ° C. for 10 seconds.

Next, as shown in FIG. 14A, a second conductive film 37 serving as an emitter electrode film is formed. Specifically, the second conductive film 37 is a 50 nm TiN film 37 formed by reactive sputtering in a N ₂ gas using a Ti target.
a, a 200 nm W film 37b formed by CVD using WF ₆ as a raw material, and a 300 nm Al film 37 formed by sputtering.
c to form a three-layer laminated film. Then, a glass substrate 38 of about 5 mm thickness, such as soda lime, is bonded to the second conductive film 37 side of the obtained sample as shown in FIG. For this bonding, anodic bonding (electrostatic bonding) that heats the sample side to 450 ° C. and applies a voltage of about 1.5 kV is used.

Subsequently, HF + HNO ₃ + CH ₃ COOH
As shown in FIG. 15A, the silicon substrate 30a is etched away by wet etching using an aqueous solution or wet etching using a mixed aqueous solution of ethylenediamine and catechol. Then, HF +
The silicon oxide film is etched with an NH ₄ F aqueous solution to expose the gate electrode 31 and the tip 39 of the emitter as shown in FIG.

FIG. 16 is a perspective view of the FEA obtained by the method of this embodiment. As shown, conical fine emitter tips 39 are arranged in a plurality of gate electrode openings in a self-aligned manner. The radius of curvature of the emitter tip 39 is about 1
0 nm, the apex angle is 20 degrees or less, the gate electrode diameter is about 0.6 μm, and the distance between the gate and the emitter is about 0.3 μm.
μm.

FIG. 17 shows an embodiment in which the element structure of the above embodiment is slightly modified. FIG. 17A shows an example in which the second conductive film 37 serving as an emitter electrode has a two-layer structure. Specifically, for example, a 200 nm thick TiN film is formed by reactive sputtering in a nitrogen gas using Ti as a target, and a 200 nm thick polysilicon film or amorphous silicon film is formed thereon to form a two-layered emitter electrode. Get. FIG. 17B shows an example in which both the first conductive film 31 serving as a gate electrode and the second conductive film 37 serving as an emitter electrode have a single-layer structure. Specifically, as the first conductive film 31, a 150-nm polysilicon film is deposited by a low-pressure CVD method, and doped with phosphorus to impart conductivity. The second conductive film 27 is a 200 nm-thick TiN film formed by reactive sputtering. 17 (c), the second conductive film 37 serving as an emitter electrode is made, for example, of a W film 37d optimal for field emission only at the tip of the emitter, and polycrystalline silicon or amorphous silicon is provided between the W film 37d and the Al film 37f. This is an example in which a three-layer structure sandwiching a resistive film 37e made of the same is used.

The manufacturing process of the emitter structure shown in FIG. 17C is, for example, as follows. First, a 50 nm TiN film is formed as a barrier layer for improving adhesion by reactive sputtering in nitrogen gas using Ti as a target. Subsequently, a blanket W film 37d is formed by the CVD method.
Is formed to a thickness of 200 nm, and then the W film is etched back to a thickness of 200 nm. As a result, the W film is embedded only in the bottom of the concave portion of the sacrificial film. Then, after etching the TiN film using the W film as a mask, a polysilicon film or an amorphous silicon film is deposited to a thickness of 200 nm, and this is
Then, the resistive film 37e made of polysilicon or amorphous silicon is formed only at the bottom of the sacrificial film.
Leave. Finally, the Al film 37f is formed to 800 nm by sputtering.
accumulate. Thereafter, the substrate is removed, part of the sacrificial film is removed, and the TiN film is further removed to expose the W film at the tip of the emitter. In the above embodiment, an insulating substrate such as glass or quartz may be used instead of the silicon substrate 31a, or a conductive substrate may be used. Instead of the silicon oxide film of each part, a silicon nitride film, a laminated film of a silicon oxide film and a silicon nitride film, or the like can be used.

FIG. 18 shows a flat panel display which is a specific application example of the element obtained by the method of the present invention. The electron source is made using the method of the present invention, and a conductive film 42 of Al or Cu is formed on an insulating substrate 41.
And a resistor film 43 made of polycrystalline silicon or the like, on which fine emitters 44 are arranged in openings of the gate electrode 45.

Opposite to this electron source, an opposing substrate is provided in which a transparent conductive film 47 such as ITO and a phosphor film 48 which are to be an anode electrode are formed on a transparent substrate 46 such as quartz or glass. Note that the gate electrode 45 and the conductive film 42 also have a resistance pair film 43,
The phosphor film 48 and the transparent conductive film 47 may be separated into a pattern corresponding to a pixel, for example. On the electron source side,
A getter material 51 made of Ti, Al, Mg or the like is provided to prevent the released gas from re-adhering to the emitter surface.

The distance between the transparent conductive film 47 serving as the anode electrode and the emitter 44 is set to 0.1 to
Bonding is performed via a spacer 50 made of a glass plate to which an adhesive is applied so as to be maintained at about 5 mm. For example, low-melting glass is used as the adhesive. Note that, without using a glass plate or the like as the spacer, a spacer can be formed by dispersing glass beads or the like in an adhesive such as an epoxy resin.

An exhaust pipe 49 is connected to the counter substrate in advance. After the substrate is bonded, the inside of the panel is evacuated to about 10 ^-5 to 10 ^-9 Torr using the exhaust pipe 49, and the exhaust port is sealed with a burner or the like. Then, the anode, emitter and gate electrode wirings are attached to complete the flat panel display.

FIG. 19 shows another example of a flat panel configuration. Parts corresponding to those in FIG. 18 are denoted by the same reference numerals as in FIG. 18 and detailed description is omitted. In this embodiment, an exhaust pipe 49 is provided on the electron source side. As the spacer 50, a silicon substrate processed by etching is used.

Next, some data showing the effectiveness of the present invention will be described. First, data on the relationship between the emitter shape and the like and the field emission characteristics will be described. FIG. 20 shows the parameters. The emitter is a point type which is rotationally symmetric about the Z axis, the taper angle of the emitter is θ, the radius of curvature of the tip of the emitter is re, the distance between the emitter and the gate electrode is ra, the gate electrode thickness is ta, and the gate electrode is under the gate electrode. Is an oxide film thickness of tox. When each parameter is not a variable, θ = 60 °, re = 10 nm, ra = 0.4 μm,
ta = 0.4 μm and tox = 1 μm. The height of the emitter is fixed at 1 μm.

FIG. 21 shows the relationship between the taper angle θ and the maximum electric field Emax obtained at the tip of the emitter, using the radius of curvature re at the tip as a parameter. As the taper angle θ increases, that is, as the vertex angle of the emitter decreases, the maximum electric field Emax increases. Also, re
The maximum electric field Emax is about 30% larger at re = 10 nm than at 15 nm.

FIG. 22 shows the relationship between the emitter-gate electrode distance ra and the maximum electric field E using the gate electrode thickness ta as a parameter.
The relation of max is shown. It can be seen that the smaller the distance ra between the emitter and the gate electrode, the larger the maximum electric field Emax. The case where the gate electrode thickness ta is 0.3 μm and the case where 0.
There is almost no significant difference from the case of 4 μm. From the data shown in FIGS. 21 and 22, it is understood that a whisker-shaped emitter having a small apex angle and a sharp tip is preferable as the emitter.

FIG. 23 shows that the emitter and
This is the relationship between the distance ra between the gate electrodes, the maximum electric field Emax, and the emission current Ifn from the emitter. For the emitter-gate voltage, Va = 30V and Va = 40V are selected.
The work function of the emitter material was assumed to be 4.5 eV. ra
= 0.4 μm, it is necessary to set Va = 40 V in order to obtain a current of Jfn = 1.3 A / cm ² . However, when ra = 0.18 μm, the same emission current can be obtained even when the voltage is reduced to Va = 30V. It can be seen that, with the same emitter-gate voltage, the emission current increases as the distance ra decreases.

FIGS. 24 and 25 show the relationship between the positional relationship between the gate electrode and the emitter in the z direction and the distribution of equipotential lines at the tip of the emitter. The electric field is stronger where the equipotential lines are denser. FIG. 24 shows the case where the distance zge from the center position of the gate electrode in the z direction to the tip of the emitter is zge = −0.3 μm.
FIG. 25 shows the case where zge = 0. When zge = 0, z
It can be seen that the distribution of equipotential lines around the tip of the emitter is denser than in the case of ge = −0.3 μm, and a strong electric field is concentrated at the tip of the emitter.

FIG. 26 shows the above-mentioned positional relationship between the emitter and the gate electrode, that is, the distance zge in the z direction is zge = −0.35 μm.
The graph shows a change in the maximum electric field intensity Emax at the tip of the emitter when the distance is changed from m to 0.25 μm. zge =
At −0.1 μm, Emax has a maximum value of 1.16 × 1
Show a 0 ⁷ V / cm.

Next, FIGS. 27 to 30 show simulation data showing that an emitter having a sharp tip can be stably obtained by the method of the present invention. This is due to the conventional method in which a sacrificial film is directly deposited on a substrate having a concave portion having a vertical side wall, and an embodiment of the present invention in which a side spacer is formed by a first sacrificial film and the concave portion side wall is inclined. 9 is simulation data showing the state of sacrificial film deposition in the case of the method. The concave portion on the left side of each drawing is the case of the method of the embodiment in which the inclination is given by the side spacer, and the inclination is a linear approximation.

The simulation conditions are shown in each figure. The recess diameter is the diameter at the top of the recess. The migration length is a distance over which a molecule or a group of molecules moves on a substrate, and has a relationship that a film having a better step coverage has a longer migration length. In each figure, the diameter of the concave portion, the depth of the concave portion, and the migration length are the same in the embodiment and the conventional example. The state of film deposition at intervals of 0.1 μm in the direction perpendicular to the substrate is indicated by a broken line, and the film thickness position at which a sharp tip is obtained is indicated by a solid line.

For example, from the results shown in FIG. 27, in the case of the embodiment, a good emitter mold was obtained with a thickness of 0.35 μm, and in the case of the conventional example, a good emitter mold was obtained with a thickness of 0.45 μm for the first time. It can be seen that it can be obtained. Under the conditions of FIG. 28, in the case of the embodiment, a good emitter mold is obtained with a thickness of 0.4 μm, whereas in the conventional example, a good emitter mold is obtained with a thickness of 0.6 μm. Under the conditions of FIG. 29, there is no significant difference. Under the conditions of FIG.
While a good emitter mold with a thickness of 2 μm can be obtained,
In the conventional example, a good emitter mold having a thickness of 0.55 μm can be obtained.

FIGS. 27 to 29 show zge in both the embodiment and the conventional example.
Is positive, and zge of the embodiment is smaller than that of the conventional example. In FIG. 30, the conventional example has zge = 0.35 μm.
m, whereas zge = −0.1 μm in the embodiment. That is, at this time, as is apparent from FIG. 26, zge has an optimal value. On the other hand, the maximum electric field strength E
FIG. 22 shows that max does not substantially depend on the thickness of the gate electrode. Therefore, the maximum electric field intensity Emax at the tip of the emitter is larger in the embodiment under the condition of FIG. From the simulation results shown in FIGS. 27 to 30, the method according to the present invention for forming the side spacers shows that even if the sacrificial film to be formed is thin, an appropriate emitter type can be obtained and the depth of the concave portion and the migration length change. However, it can be seen that the shape of the emitter mold does not change significantly, and that the position of the emitter and the gate electrode in the z direction can be controlled.

[0058]

As described above, according to the present invention, a side spacer is formed in a hole formed in a substrate with vertical side walls to provide a smooth inclination, thereby depositing a sacrificial film serving as a template for a minute emitter. Cracks can be effectively prevented from occurring, and a field emission type electron source having a high-performance micro cold cathode having a small radius of curvature and a vertical angle at the tip can be obtained. Further, according to the present invention, the emitter and the gate are self-aligned, the position of the emitter and the gate electrode in the z direction is optimized, and the micro cold cathode with a high-performance gate electrode having a small radius of curvature and a vertical angle at the tip is provided. Can be obtained.

[Brief description of the drawings]

FIG. 1 shows a process of manufacturing an emitter according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a problem when forming a side spacer.

FIG. 3 shows a sacrificial film forming step of another embodiment.

FIG. 4 shows a sacrificial film forming step of another embodiment.

FIG. 5 shows an emitter support structure of another embodiment.

FIG. 6 shows a substrate structure of another embodiment.

FIG. 7 shows a step of forming a side spacer according to another embodiment.

FIG. 8 shows an emitter manufacturing process of another embodiment.

FIG. 9 shows a manufacturing process of a field emission element according to another embodiment.

FIG. 10 shows a manufacturing process of the example.

FIG. 11 shows an element structure obtained by the same example.

FIG. 12 shows a manufacturing process of a field emission element according to another embodiment.

FIG. 13 shows a manufacturing process of a field emission device according to another embodiment.

FIG. 14 shows a manufacturing process of the example.

FIG. 15 shows a manufacturing process of the example.

FIG. 16 shows an element structure according to the example.

FIG. 17 shows an element structure according to another embodiment.

FIG. 18 shows an application example of a field emission element to a display.

FIG. 19 shows an application example of a field emission element to a display.

FIG. 20 shows conditions for clarifying the effectiveness of the present invention.

FIG. 21 shows the relationship between the maximum electric field strength and the tilt angle.

FIG. 22 also shows the relationship between the maximum electric field strength and the distance between the emitter and the gate.

FIG. 23 also shows the relationship between the maximum electric field strength and the distance between the emitter and the gate.

FIG. 24 also shows the positional relationship between the emitter and the gate and the distribution of equipotential lines.

FIG. 25 also shows the positional relationship between the emitter and the gate and the distribution of equipotential lines.

FIG. 26 shows the relationship between the positional relationship between the emitter and the gate and the maximum electric field strength.

FIG. 27 shows a state of film deposition according to the present invention and a conventional method.

FIG. 28 shows a state of film deposition according to the present invention and a conventional method.

FIG. 29 shows a state of film deposition according to the present invention and a conventional method.

FIG. 30 shows a state of film deposition according to the present invention and a conventional method.

FIG. 31 shows a conventional method of manufacturing an emitter.

FIG. 32 shows a state of film deposition according to a conventional example.

FIG. 33 shows a conventional method of manufacturing an emitter.

FIG. 34 shows a conventional method of manufacturing an emitter.

[Explanation of symbols]

Reference numeral 10: substrate, 11: concave portion, 12: first sacrificial film, 13:
Side spacer, 14 second sacrificial film, 15 recess, 1
6 Emitter electrode film, 20 substrate, 21 first conductive film, 22 recess, 23 first insulating film, 24 side spacer, 25 second insulating film, 26 recess, 27th 2
Conductive substrate, 30 ... substrate, 31 ... first conductive film, 32 ... concave portion, 33 ... first insulating film, 34 ... side spacer, 35
... second insulating film, 36 ... concave portion, 37 ... second conductive film, 3
8: Glass substrate.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-71142 (JP, A) JP-A-5-507580 (JP, A) Steven M. Zimmerman and Wayne T .; Babie, "A Fabrication Method for the Integration of Vacuum Microelectronic Devices", IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol. 2294-2303 (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01J 9/02 H01J 1/30

Claims (3)

(57) [Claims] A step of forming a concave portion having a side wall perpendicular or substantially perpendicular to the surface of the substrate; a step of depositing a first sacrificial film on the substrate having the concave portion formed therein; Forming a side spacer on the side wall of the concave portion by etching the substrate; depositing a second sacrificial film on the substrate having the concave portion in which the side spacer is formed; and conducting a conductive film on the second sacrificial film. A method for manufacturing a field emission element, comprising: depositing a film to form an emitter; and exposing the emitter by removing unnecessary material thereunder. 2. A step of forming a concave portion having a vertical or substantially vertical side wall on the surface of the substrate; a step of depositing a first sacrificial film on the substrate having the concave portion formed therein; Forming a side spacer on the side wall of the concave portion, and further engraving the substrate by over-etching; and depositing a second sacrificial film on the substrate having the concave portion in which the side spacer is formed. A step of forming an emitter by depositing a conductive film on the second sacrificial film; and a step of exposing the emitter by removing unnecessary material therebelow. Device manufacturing method. A step of depositing a first conductive film serving as a gate electrode on a surface of the substrate; and a step of forming a concave portion having a vertical or substantially vertical side wall reaching the substrate in the first conductive film. Depositing a first insulating film on the first conductive film in which the concave portion is formed, etching the first insulating film to form a side spacer on a side wall of the concave portion, Depositing a second insulating film on the conductive film and the side spacers, depositing a second conductive film on the second insulating film to form an emitter, and forming the first and second conductive films on the second insulating film. Removing at least a portion of the insulating film around the distal end portion of the emitter.