JP3091846B1 - Spherical semiconductor including solar cell and spherical semiconductor device using the same - Google Patents

Abstract

An object of the present invention is to provide a solar cell that can be easily manufactured and that can be reduced in size. To improve the electromotive force per unit area and provide a highly efficient solar cell. A small and highly efficient semiconductor device having a power generation function is provided. SOLUTION: A second conductivity type semiconductor layer formed so as to form a pn junction on at least a surface of a spherical substrate constituting a first conductivity type semiconductor layer, and a second semiconductor layer formed on the surface of the second semiconductor layer A spherical solar cell section comprising an outer electrode made of a transparent conductive film, and an inner electrode connected to the semiconductor layer of the first conductivity type and taken out on the surface; and an inverter circuit on the spherical semiconductor surface. A spherical semiconductor integrated circuit section formed, wherein an outer electrode and an inner electrode of the spherical solar cell section and the spherical semiconductor integrated circuit are interconnected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a solar cell and a semiconductor device using the same, and more particularly to a structure of a solar cell using a spherical semiconductor.

[0002]

2. Description of the Related Art An internal electric field is generated at a pn junction of a semiconductor. When light is applied to the pn junction to generate an electron-hole pair, the generated electrons and holes are separated by the internal electric field.
Electrons are collected on the n side and holes are collected on the p side. When a load is connected to the outside, a current flows from the p side to the n side. Utilizing this effect, solar cells have been put into practical use as elements for converting light energy into electric energy.

In recent years, a technique has been developed in which a semiconductor element is manufactured by forming a circuit pattern on a spherical semiconductor (Ball Semiconductor) having a diameter of 1 mm or less, such as single crystal silicon.

As one of the methods, there has been proposed a method of manufacturing a solar array in which a large number of semiconductor particles are connected by using an aluminum foil (JP-A-6-13633). In this method, as shown in FIG. 14, a semiconductor particle 207 having a first conductivity type skin portion and a second conductivity type interior is disposed in an opening of an aluminum foil so as to protrude from both sides of the aluminum foil 201, and a skin on one side is formed. The portion 209 is removed, and an insulating layer 221 is formed. Next
Part of 2-conductivity-type interior 111 and insulating layer 221 thereon
Is removed, and the second aluminum foil 2
Combine 19 The flat region 217 provides a good ohmic contact with the second aluminum foil 219 as a conductive portion.

[0005]

However, in such a method, there is a limit to the high-density arrangement, and since the aluminum foil exists in a planar shape, light to the lower layer is transmitted by the aluminum foil. Will be shut off. Therefore, only one semiconductor particle serving as a photoelectric conversion unit can be arranged, which has been a problem of preventing an improvement in electromotive force per unit area.

Further, such a solar cell requires an inverter circuit for converting DC to AC. However, since this inverter circuit is connected to the solar cell via the aluminum foil 219, the wiring distance is long. Since it has to be prepared as another semiconductor chip, there has been a problem that it is difficult to miniaturize the device.

Furthermore, when connecting to a logic circuit chip, the wiring length from the terminal for extracting electromotive force from the solar cell to the logic circuit chip driven by this electromotive force increases, and the occurrence of parasitic capacitance and the like occur. This has led to various problems.

The present invention has been made in view of the above circumstances, and has as its object to provide a solar cell which is easy to manufacture and can be reduced in size. Another object of the present invention is to improve the electromotive force per unit area and to provide a highly efficient solar cell. Still another object of the present invention is to provide a small and highly efficient semiconductor device having a power generation function.

Spherical semiconductor including first solar cell of the present invention
Constitutes a semiconductor layer of at least a first conductivity type at the surface
Formed to form a pn junction on the surface of the spherical substrate
A semiconductor layer of the second conductivity type; and a semiconductor layer of the second conductivity type.
An outer electrode made of a transparent conductive film formed on the surface;
Connected to one-conductivity type semiconductor layer and extracted to the surface
Formed in a predetermined area on the spherical surface by the
Formed spherical solar cell part and the solar cell with the spherical surface
A sphere formed with an inverter circuit in an area that is not
A semiconductor integrated circuit unit or a logic circuit unit,
An outer electrode and an inner electrode of the spherical solar cell, and the spherical half
Interconnected with conductive integrated circuits or logic circuits
It is characterized by.

According to such a configuration, one spherical semiconductor
Form an inverter circuit on the surface other than the solar cell section
Semiconductor integrated circuit part or logic circuit part
The solar cell unit and the semiconductor integrated circuit unit or the logic circuit unit
Since they are interconnected, the power generated from the solar cells can be directly
Small, high-efficiency that can be supplied to semiconductor integrated circuits or logic circuits
A spherical semiconductor having a high efficiency can be obtained.

According to a second aspect of the present invention, at least the surface is
Pn is formed on the surface of the spherical substrate constituting the semiconductor layer of the first conductivity type.
Semiconductor layer of second conductivity type formed to form a junction
And a transparent conductive layer formed on the surface of the second conductive type semiconductor layer.
An outer electrode made of an electroconductive film and the first conductive type semiconductor layer.
Connect with the inner electrode taken out from the surface.
Spherical solar cell part formed in a predetermined area on the spherical surface
And in the area of the spherical surface where the solar cells are not formed
Spherical semiconductor integrated circuit part formed by an inverter circuit
And a logic circuit portion, outside the spherical solar cell portion
An electrode and an inner electrode, and the spherical semiconductor integrated circuit and
The logic circuit unit is interconnected with the logic circuit unit.
are doing.

According to such a configuration, one spherical semiconductor
Form an inverter circuit on the surface other than the solar cell section
Semiconductor integrated circuit part and logic circuit part
The solar cell section, the semiconductor integrated circuit section, and the logic circuit section
Since they are interconnected, the power generated from the solar
Since it can be directly supplied to both the inverter and the logic circuit,
A compact and highly efficient spherical semiconductor can be obtained.

According to a third aspect of the present invention, the spherical solar cell section is
It is characterized that it is formed in at least the upper hemisphere of the spherical surface.
It is a sign.

According to this configuration, the number of spherical semiconductors is small.
In both cases, solar cells are formed in the upper hemisphere.
Is more efficient.

According to a fourth aspect of the present invention, a plurality of spherical semiconductors are provided.
To a semiconductor device cluster-connected via bumps.
And at least one of the plurality of spherical semiconductor devices
3. A spherical semiconductor comprising the solar cell according to claim 1 or 2,
It is characterized by being a conductor.

According to this configuration, the plurality of spherical semiconductors
By connecting the clusters via bumps,
Can form two or three-dimensional spherical semiconductors
The device can be configured with higher density and individual semiconductor
Because the body is spherical, not only the outer spherical semiconductor but also the inner
Even the spherical semiconductor on the side can receive light, although it is inferior to the outside
Therefore, more efficient power generation by the solar cell can be performed.

According to a fifth aspect of the present invention, a plurality of spherical semiconductors are provided.
To a semiconductor device cluster-connected via bumps.
And at least one of the spherical semiconductor devices connected in clusters.
On the outside, all of the spherical surface is a spherical half with solar cells formed.
It is characterized in that a conductor is arranged.

According to this configuration, the cluster connection is established.
The spherical semiconductor outside the plurality of spherical semiconductors is the entire spherical surface.
To arrange a spherical semiconductor with a solar cell
Therefore, more efficient power generation by solar cells becomes possible.
You.

According to a sixth aspect of the present invention, a plurality of spherical semiconductors are provided.
The body is the same diameter phase of the sphere surface passing through the horizontal plane containing the diameter.
Contact the outer and inner electrodes on opposite surfaces, respectively.
Connected to each other and connected in series through each bump.
It is characterized by having.

According to such a configuration, it is possible to arrange and connect a large number of spherical solar cells at the highest density via the bumps. Further, when the solar cell section is provided in two or more layers, the space between the spherical semiconductors formed by the bumps can be used as the light introducing section, and the positioning becomes easy.

According to a seventh aspect of the present invention, the spherical substrate comprises:
A silicon sphere of the first conductivity type;
A second conductivity type amorphous silicon layer formed on the surface
Characterized in that a pn junction is formed between them.

According to this configuration, the semiconductor element having a large element area can be extremely easily formed by either depositing an amorphous silicon layer of the second conductivity type on the surface of the silicon sphere or forming an impurity diffusion layer by diffusion. A device can be provided.

According to an eighth aspect of the present invention, the spherical substrate comprises:
It is made of a metal spherical body, and the first conductive
Type silicon layer and the first conductive type silicon layer
Forming a second conductivity type silicon layer and forming a pn junction
It is characterized by being formed.

According to this configuration, since the semiconductor layer having a pn junction on the surface is formed using the metal spherical body as the base, the metal spherical body serves as a low-resistance current collector. Therefore, by using a metal having good ohmic contact with the semiconductor layer, it is possible to extract electromotive force with extremely high efficiency. If necessary,
A barrier layer may be interposed.

According to a ninth aspect of the present invention, the spherical substrate comprises:
It consists of an insulating spherical body, and the first conductive
Type silicon layer and the first conductive type silicon layer
Forming a second conductivity type silicon layer and forming a pn junction
It is characterized by being formed.

With this configuration, it is possible to obtain an inexpensive semiconductor device having stable characteristics.

According to a tenth aspect of the present invention, the first and the second are
The second silicon layer is an amorphous silicon layer
It is characterized by.

According to this configuration, the amorphous silicon layer can be formed as a high-quality film on the surface of the insulating substrate, and has good characteristics as a solar cell.

According to an eleventh aspect of the present invention, the spherical solar cell
Ikebe was formed on the surface of spherical silicon of the first conductivity type
Form a pn junction with the impurity diffusion layer of the second conductivity type
It is characterized by being made.

[0030]

Next, embodiments of the present invention will be described in detail with reference to the drawings. Embodiment 1 As shown in FIG. 1, a solar cell according to a first embodiment of the present invention is formed by interconnecting three solar cells 1 made of spherical silicon in the vertical direction via bumps 2, A diode constituting the inverter circuit section 3 is formed below the spherical silicon. The solar cell is connected to a mounting substrate 5 via mounting bumps 4 formed below the lowermost spherical silicon.

On the other hand, in the solar cell 1 constituting this solar cell, an n-type polycrystalline silicon layer 12 is formed on a surface of a p-type single-crystal silicon sphere 11 having a diameter of 1 mm as shown in an enlarged sectional view of FIG. In addition to forming a pn junction, an outer electrode 13 made of a transparent conductive film made of indium tin oxide (ITO) is formed so as to cover this surface.
A part of this is polished to form a p-type single crystal silicon sphere 1.
1 until the outer electrode 13 and the n-type polycrystalline silicon layer 12 are removed. The surface of the removed portion is covered with the silicon oxide film 14 and the p-type single-crystal silicon sphere 11 is removed.
, An inner electrode 15 made of a chromium thin film is formed, and a bump 2a is formed on the surface. On the other hand, a bump 2b is formed at a position symmetrical to the bump and the center of the sphere so as to contact the outer electrode 13.

Next, a method for manufacturing the solar cell 1 will be described. First, as shown in FIG.
The surface of the m-type p-type single-crystal silicon sphere 11 is mirror-polished and washed, and the n-type polycrystalline silicon layer 1 is formed by a CVD method using a mixed gas such as silane containing phosphine.
Form 2 Here, in the CVD step, a thin film can be formed by using an apparatus as shown in FIG. 4 (described later) and transporting it in a gas atmosphere heated to a desired reaction temperature.

Thereafter, as shown in FIG. 3 (b), an IT layer having a thickness of about 1 μm
An O thin film 13 is formed.

Then, as shown in FIG. 3 (c), the outer electrode 1 is polished until it reaches the p-type single crystal silicon sphere 11.
The 3 and n-type polycrystalline silicon layers 12 are partially removed.

Then, as shown in FIG. 3D, the surface of the removed portion is covered with a silicon oxide film 14 by performing a heat treatment in an oxygen atmosphere. At this time, since the oxidation rate is high on the p-type polycrystalline silicon layer 12, which is a high-concentration impurity region, a silicon oxide layer having a thickness about twice as large as the surface of the p-type single-crystal silicon sphere 11 is formed.

By etching this without a mask, the p-type single-crystal silicon sphere 11 is exposed in a region where the thickness of the silicon oxide layer 14 is small. Then, as shown in FIG. 3E, an inner electrode 15 made of a chromium thin film is formed so as to contact the p-type single crystal silicon sphere 11. 3 (d) and 3 (e) can be easily formed by controlling the gas type and the gas temperature in the transfer device of FIG. 4 in the same manner.

Finally, a bump 2a is formed on the surface of the inner electrode 15, and a bump 2b is formed at a position symmetrical with respect to the center of the bump and the sphere so as to contact the outer electrode 13. The spherical solar cell as shown in FIG. 2 is completed.

Next, the CV for forming the n-type polycrystalline silicon layer 12 used in the step shown in FIG.
The D device will be described. As shown in FIGS. 4A to 4C, a CV is applied to an inner pipe 102 configured so that a desired temperature can be controlled by a heater 101 in a CVD unit 100.
A reaction gas obtained by adding monosilane (SiH ₄ ) and phosphine as an impurity from a gas supply source 104 for D via a gas supply pipe 103 (referred to as a first reaction gas)
Is supplied and thermally decomposed to form an n-type polycrystalline silicon layer 12 on the surface of a p-type single-crystal silicon sphere 11 passing through the inner tube 102 at a predetermined speed. Then, a spiral flow forming unit 110, a suction / discharge unit 120 for sucking the first reaction gas together with the spiral flow, and a high-pressure pulse of an inert gas applied to the p-type single-crystal silicon sphere 11 to send out while accelerating. The first reaction gas is completely removed from the surface of the silicon sphere by the atmosphere conversion section composed of the section 130 and the film formation is stopped, so that the n-type polycrystalline silicon layer whose film thickness is controlled with high precision. 12 can be formed.

That is, this apparatus uses a p-type single crystal silicon sphere 11 in an inner tube in which a first reaction gas is maintained at a desired temperature.
To form the n-type polycrystalline silicon layer 12 with good controllability. The first reactive gas is removed from the p-type single-crystal silicon sphere 11 to form a second carrier made of an inert gas. An apparatus having an atmosphere conversion function for sending the gas to the next processing step together with the gas. Here, FIGS. 4B and 4C are a sectional view taken along line AA and a sectional view taken along line BB of FIG. 4A, respectively.

The spiral flow forming unit 110 has an inner diameter of 2 mm, which is configured to allow a single crystal silicon sphere to pass along with the first reaction gas from a supply port connected to the CVD unit.
Inner tube 112 made of a Teflon pipe having a diameter of about 15 mm, and an outer pipe 1 having an inner diameter of about 15 mm disposed so as to surround the inner pipe 112.
13, a first transport path 114 formed between the outer pipe 113 and the inner pipe 112, and a first transport path 114 communicating with the first transport path 114 so as to be symmetrical with respect to a central axis. Established
Two high-pressure gas supply ports 115 are provided on the outer wall of the outer tube 113 to supply high-pressure gas from the tangential direction through the outer wall.
a, 115b, and the high-pressure gas supply port 1
By injecting an inert gas from 15a, 115b, a spiral flow is formed along the wall of the inner tube 112.

The suction / discharge unit 120 is disposed at a predetermined distance from the lower end of the inner pipe 112, and has a recovery pipe 121 made of a porous pipe having a diameter larger than that of the inner pipe. And a cylindrical discharge chamber 122 disposed therein. The space inside the discharge chamber 122 for sucking and discharging the first reaction gas is provided through a plurality of discharge holes 123 arranged along the outer periphery of the downstream portion through a pipe through a collection pump 124 as a pressure reducing device and It is connected to a collection tank (not shown) cooled to a predetermined temperature.

The recovery pipe 121 communicates with the inner pipe 112, and has an inner diameter substantially equal to the inner pipe 112, about 2 mm, and an outer diameter about 4 mm. This recovery pump 2
4, the inside of the discharge chamber 22 is depressurized, so that the inside of the discharge chamber is in a negative pressure state with respect to the inside of the recovery pipe 121, and a gas containing the reactive gas from the CVD apparatus (referred to as a first reaction gas). ) Is brought into contact with the vortex flow rectified through the transfer path 114 at the open end of the inner tube 112, and adiabatically expands and vortex flows in the large-diameter recovery pipe 121. At the same time, the air is efficiently discharged to the outer discharge chamber 122.

The discharge chamber 122 is provided for the recovery pipe 12
On the downstream side from 1, a tapered surface spreading outward is formed so that the first reaction gas discharged through the recovery pipe 121 is efficiently discharged while forming a laminar flow along the tapered surface 127T. It is configured.

Then, as shown in FIG. 4 (c), it is collected by a collection pump 124 through a discharge hole 123 arranged at a predetermined interval along the outer periphery near the downstream end of the discharge chamber 122 by a collection pump 124. It has become so.

Here, as the porous material forming the recovery pipe, a material obtained by a method such as sintering a powder of ceramic, resin, or metal is used. A large number of through holes are provided in the side wall of the collection pipe 121 located inside the discharge chamber 22.

Further, a downstream end of the recovery pipe 121 is connected to a discharge pipe 125 made of a Teflon pipe having substantially the same diameter as the inner pipe. The discharge pipe 125 is connected to a delivery section 130 where the high pressure is applied. The pulse is accelerated by a second carrier gas made of an inert gas and ejected as a pulse.

The delivery section 130 includes an acceleration pipe 131 and a branch pipe 132, and the upper end of the acceleration pipe 131 is connected to a discharge pipe 125 via a joint tube 133. Here, the branch pipe 132 is connected to the pulse generator 13.
5, the second carrier gas is supplied into the branch pipe 132 in a pulsed manner, and the branch angle θ is adjusted so that the accelerated inert gas is delivered at a desired speed while accelerating the single crystal silicon sphere. Selected. This branch angle θ is
There is no particular limitation as long as it can accelerate,
It is preferably at least 45 ° or less, especially 30 °
゜ The following is preferred. If the branch angle θ is larger than 45 °, the second carrier gas may flow backward in the joint tube and hinder the movement of the single crystal silicon sphere.

This CVD apparatus is capable of forming a desired thin film efficiently with high accuracy without contact.

Incidentally, if necessary, a barrier layer made of a titanium nitride layer or the like may be formed at the interface between the electrode and the bump or between the electrode and the semiconductor layer.

On the other hand, the inverter circuit portion is formed by forming a diode by a photolithography process, forming a circuit pattern, and connecting to a solar cell portion.

The solar cell as shown in FIG. 1 is completed by connecting the spherical semiconductor cell thus formed on the mounting substrate 5 via the bump 4.

According to such a configuration, the spherical solar cell section includes:
Since the inverter circuit formed on the surface of the spherical semiconductor is connected, a small-sized solar cell having a small mounting area can be provided.

The solar cells may be connected in series or in parallel. When connecting in series, it is also possible to form a series connection body by alternately arranging cells in which the p-layer and the n-layer are inverted on the outer surface side and the inner surface side and connecting them in the same manner.

Embodiment 2 Next, a second embodiment of the present invention will be described. In this solar cell, as shown in FIG. 5, a solar cell unit and an inverter circuit unit 30 connected to the solar cell unit 10 are formed on one spherical silicon surface via an element isolation insulating film 40. And a spherical semiconductor integrated circuit section.

The inverter circuit portion is formed by forming a p-type well region 31 in an element region surrounded by an element isolation film 40 and forming an n-type diffusion layer 32 inside the well region. Then, an electrode 33 is formed so as to be connected to a load. The interconnection between the inverter circuit unit and the solar cell unit is connected by a circuit pattern (not shown) formed on the substrate surface.

At the time of manufacturing, a photolithography step, a step of forming an element isolation film, a film forming step, and the like can be similarly performed in the apparatus shown in FIG. 4 according to the first embodiment.

According to this configuration, since the solar cell unit and the inverter circuit are provided on the same spherical semiconductor surface, it is possible to provide a small and highly efficient power supply device. In addition, it is possible to obtain a solar cell with higher efficiency by using a single spherical semiconductor as the solar cell part where the surface that is easy to receive light is the solar cell part, and the back part with a small amount of received light constitutes an inverter circuit. Become.

Embodiment 3 Next, a third embodiment of the present invention will be described. In this apparatus, as shown in FIG. 6, a second conductive type semiconductor layer formed so as to form a pn junction on at least the surface of a spherical substrate constituting a first conductive type semiconductor layer; An outer electrode made of a transparent conductive film formed on the surface of the second semiconductor layer, and a spherical solar cell portion comprising an inner electrode connected to the first conductive type semiconductor layer and taken out on the surface, A spherical semiconductor integrated circuit portion formed by forming an inverter circuit on the spherical semiconductor surface; and a logic circuit portion formed on the spherical semiconductor surface, wherein an outer electrode and an inner electrode of the spherical solar cell portion 1; The integrated circuit 3 and the logic circuit section 6 are interconnected via bumps 4.

According to such a configuration, the electromotive force obtained by the solar cell unit 1 can be directly converted into an alternating current by the inverter circuit and used directly by the logic circuit unit, so that the wiring length can be reduced. In addition, the mounting is easy, the mounting area is small, and a highly efficient semiconductor device can be provided.

Fourth Embodiment In the first embodiment, an example was described in which the spherical bodies were connected in a cluster so as to form a three-layer structure. However, as shown in FIG. The semiconductor integrated circuit unit 3 and the logic circuit unit 6 are formed on independent spherical substrates, respectively, and are cluster-connected via bumps 4 and 2 on the surface of the mounting substrate 5 so as to form a two-layer structure. The battery unit is arranged on the front side.

According to such a configuration, in addition to the effects of the first embodiment, the surface side that easily receives light is a solar cell unit, and the lower layer having a small amount of received light constitutes an inverter circuit or a logic circuit unit. Therefore, a semiconductor device with a smaller mounting area and higher efficiency can be obtained.

Embodiment 5 In this embodiment, as shown in FIG. 8, the spherical solar cell unit 1, the spherical semiconductor integrated circuit unit 3, and the logic circuit unit 6 are
The spherical solar cell units are formed in the same spherical substrate, and are arranged so as to be located in the hemisphere on the front surface side.

According to this configuration, the front side of the spherical semiconductor which is easy to receive light is a solar cell section, and the back side of the light receiving amount which is small constitutes an inverter circuit or a logic circuit section. An efficient semiconductor device can be obtained.

Embodiment 6 In this embodiment, as shown in FIG. 9, the spherical solar cell unit 1 has an outer electrode and an inner electrode on opposite surfaces of the same diameter on a spherical surface passing through a horizontal plane including the diameter. It has a bump 2 connected to an electrode, and is characterized in that it is connected in series via each bump.

According to such a configuration, it is possible to arrange and connect a large number of spherical solar cells at the highest density via the bumps. Further, when the solar cell section is provided in two or more layers, the space between the spherical semiconductors formed by the bumps can be used as the light introducing section, and the positioning becomes easy.

Embodiment 7 As shown in an enlarged cross-sectional view of FIG. 10, a solar cell 1 constituting this solar cell has a copper ball 50 having a diameter of 1 mm with a barrier layer 50B made of chromium and titanium interposed therebetween.
Forming an amorphous silicon layer 51 and a p-type amorphous silicon layer 52, forming a pn junction, and further forming an outer electrode 53 made of indium tin oxide (ITO) transparent conductive film so as to cover the surface. The outer electrode 53, the p-type amorphous silicon layer 52, and the n-type amorphous silicon layer 5 are partially polished until they reach the barrier layer made of chromium and titanium.
1 is removed, and a bump 55a is formed so as to contact the barrier layer of the removed portion. On the other hand, the bump 55 a is symmetrical with respect to the center of the sphere so as to contact the outer electrode 53.
b is formed.

Next, a method of manufacturing the solar cell 1 will be described. First, as shown in FIG.
The surface of the copper sphere 50 mm is polished and washed, and a barrier layer composed of chromium and titanium is sequentially formed by a vacuum deposition method (FIG. 11B). In this method, the gas supply pipe of the CVD section of the CVD apparatus used in the first embodiment is connected to an evaporation chamber equipped with an evaporation source for vacuum evaporation, and the steam containing chromium particles and the steam containing titanium particles are transferred to a copper bulb. By contacting with 50, the deposition film can be formed in a non-contact manner while controlling the film thickness with high precision.

Thereafter, similarly to the first embodiment, an n-type amorphous silicon layer 51 and a p-type amorphous silicon layer 52 are formed by a method using a mixed gas such as silane containing phosphine. Here, in the CVD process, a thin film can be formed by using the apparatus shown in FIG. 4 and transporting it in a gas atmosphere heated to a desired reaction temperature (FIG. 11C).

Thereafter, as shown in FIG. 11 (d), an I-layer of about 1 μm thick is formed on the entire surface of the substrate by sputtering.
A TO thin film 53 is formed.

Then, as shown in FIG. 11E, the outer electrode 53 and a part of the p-type amorphous silicon layer 52 and a part of the n-type amorphous silicon layer 51 are removed by polishing until they reach the copper ball 50 or the barrier layer 50B. I do.

Then, as shown in FIG. 11 (f),
A bump 55a is formed on the surface of the copper sphere 50 or the barrier layer 50B in the removed portion. In this case, the bump 55a can be formed directly on the copper ball 50 or the barrier layer 50B. Also, a bump 55b is formed on the outer electrode, as shown in FIG.
0 is completed.

FIG. 12 shows a solar cell device in which two solar cells formed as described above are fixed. Here, after the bumps 55a and 55b are fixed and melted by heating to be electrically connected, the periphery of the bumps is fixed with an insulating adhesive 56 so as to increase the bonding strength and to attain electrical insulation around the bumps. Becomes possible.

Embodiment 8 A solar cell constituting this solar cell comprises a spherical substrate,
An n-type amorphous silicon layer and a p-type amorphous silicon layer formed on the surface of the n-type amorphous silicon layer are formed on the surface of the spherical body to form a pn junction. It is characterized by the following.

As shown in an enlarged sectional view of FIG. 13, this solar cell has a chromium layer 60c formed on the surface of a glass 60 having a diameter of 1 mm, and an n-type amorphous silicon layer 61 and a p-type amorphous silicon Layer 62
Is formed, a pn junction is formed, and an outer electrode 63 made of an indium tin oxide (ITO) transparent conductive film is further formed so as to cover this surface. Then, the outer electrode 63, the p-type amorphous silicon layer 62, and the n-type amorphous silicon layer 61 are removed until a part thereof reaches the chrome layer 60c by polishing, and the bumps 65a are brought into contact with the barrier layer of the removed portion. Is formed. On the other hand, a bump 65b is formed at a position symmetrical to the bump 65a and the center of the sphere so as to contact the outer electrode 63.

With this configuration, it is possible to obtain an inexpensive semiconductor device having stable characteristics.

In the above embodiment, amorphous silicon is used as a semiconductor layer for forming a pn junction. However, the present invention is not limited to this. For example, a polycrystalline silicon layer or a single crystal silicon layer, or GaAs, GaP or the like may be used. It is also applicable to the compound semiconductor layer of the above. Furthermore, pn
Not only the structure but also the pin structure can be applied.

In the production of this spherical semiconductor device, each processing step can be connected to form a line.
It is characterized by extremely high productivity.

In each step, the treatment is performed in various atmospheres including not only gases such as active gas and inert gas, but also liquids such as water and various solutions. In the case of connecting such processing steps, it is necessary to prevent the atmosphere for transporting the workpiece from being carried from the previous step to the subsequent step. It is necessary to convert the atmosphere into an atmosphere suitable for the process and transport the workpiece. However, by using an atmosphere conversion device as shown in FIG. 4, each processing step can be performed while transporting the workpiece. A highly reliable semiconductor device with good workability can be provided.

Further, the silicon surface is easily oxidized, and if a natural oxide film is formed on the surface, there is a problem that the contact with a metal electrode layer or the like formed thereon is deteriorated. The transfer and processing can be performed in the closed space without performing.

[0080]

As described above, according to the present invention , the solar cell unit and the inverter circuit are provided on one spherical semiconductor surface.
Since the power supply device includes a circuit or a logic circuit, a small and highly efficient power supply device can be provided.

In addition, a solar cell portion is formed on the surface portion of one spherical semiconductor which is easy to receive light, and a back surface portion having a small amount of received light constitutes an inverter circuit. Becomes possible.

[Brief description of the drawings]

FIG. 1 is a diagram showing a solar cell according to a first embodiment of the present invention.

FIG. 2 is a sectional view of a cell constituting the solar cell according to the first embodiment of the present invention.

FIG. 3 is a manufacturing process diagram of a cell constituting the solar cell according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a manufacturing apparatus for manufacturing the solar cell according to the first embodiment of the present invention.

FIG. 5 is a sectional view of a cell constituting a solar cell according to a second embodiment of the present invention.

FIG. 6 is a view showing a solar cell according to a third embodiment of the present invention.

FIG. 7 is a diagram showing a solar cell according to a fourth embodiment of the present invention.

FIG. 8 is a diagram showing a solar cell according to a fifth embodiment of the present invention.

FIG. 9 is a diagram showing a solar cell according to a sixth embodiment of the present invention.

FIG. 10 is a sectional view of a cell constituting a solar cell according to a seventh embodiment of the present invention.

FIG. 11 is a manufacturing process diagram of a cell constituting a solar cell according to a seventh embodiment of the present invention.

FIG. 12 is a diagram showing a solar cell according to a seventh embodiment of the present invention.

FIG. 13 is a sectional view of a cell constituting a solar cell according to an eighth embodiment of the present invention.

FIG. 14 is a diagram showing a conventional solar cell.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Solar cell 2 Bump 3 Inverter circuit part 4 Bump 5 Mounting substrate 6 Logic circuit part 11 p-type single crystal silicon sphere 12 n-type polycrystalline silicon layer 13 Outer electrode 14 Insulating film 15 Inner electrode 2a, 2b Bump

────────────────────────────────────────────────── (5) References JP-A-58-54684 (JP, A) U.S. Pat. No. 5,787,943 (US, A) U.S. Pat. No. 5,028,546 (US, A) Published 98/25090 (WO, A1) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 31/04-31/078

Claims (11)

(57) [Claims] 1. A semiconductor layer having at least a surface of a first conductivity type.
To form a pn junction on the surface of the spherical substrate
The formed second conductivity type semiconductor layer and the second conductivity type semiconductor layer;
Outer electrode made of transparent conductive film formed on the surface of semiconductor layer
And connected to the semiconductor layer of the first conductivity type.
A predetermined area of the spherical surface is defined by the inner electrode
The spherical solar cell portion formed in the region and the spherical surface portion where the solar cell is not formed on the spherical surface.
A spherical semiconductor integrated circuit part formed by a barter circuit or
A logic circuit unit, and an outer electrode and an inner electrode of the spherical solar cell unit;
The spherical semiconductor integrated circuit or logic circuit is interconnected
A spherical semiconductor including a solar cell. 2. A semiconductor layer having at least a surface of a first conductivity type.
To form a pn junction on the surface of the spherical substrate
The formed second conductivity type semiconductor layer and the second conductivity type semiconductor layer;
Outer electrode made of transparent conductive film formed on the surface of semiconductor layer
And connected to the semiconductor layer of the first conductivity type.
A predetermined area of the spherical surface is defined by the inner electrode
The spherical solar cell portion formed in the region and the spherical surface portion where the solar cell is not formed on the spherical surface.
A spherical semiconductor integrated circuit portion formed with a barter circuit; and
Forming a logic circuit portion, an outer electrode and an inner electrode of the spherical solar cell portion,
The spherical semiconductor integrated circuit and the logic circuit are interconnected.
Spherical semi-conductor including a solar cell characterized by being connected
body. 3. The method according to claim 1, wherein the spherical solar cell portion has a small spherical surface.
2. The device according to claim 1, wherein both are formed in the upper hemisphere.
Or a spherical semiconductor including the solar cell according to 2. 4. A method of forming a plurality of spherical semiconductors via bumps.
In a raster-connected semiconductor device, multiple spherical semiconductors
At least one spherical semiconductor in the body device;
Is a spherical semiconductor including the solar cell described in 2.
Semiconductor device using spherical semiconductor including solar cell
Place. 5. A method of forming a plurality of spherical semiconductors via bumps.
In a raster-connected semiconductor device,
The least the outer spherical-shaped surface of the spherical semiconductor device
Spherical semiconductors with solar cells are placed in all of them
A spherical half including the solar cell according to claim 4.
A spherical semiconductor device using a conductor. 6. The plurality of spherical semiconductors include a diameter.
On the opposite surface on the same diameter of the sphere surface passing through the horizontal plane,
Include bumps that connect to the outer and inner electrodes, respectively.
It is characterized by being connected in series via each bump
The solar cell according to claim 4 or 5,
A spherical semiconductor device using a spherical semiconductor. 7. The method according to claim 1, wherein the spherical substrate is silicon of a first conductivity type.
A second conductor formed of a sphere and formed on the surface of the silicon sphere
Pn junction is formed with the amorphous silicon layer
The method according to any one of claims 1 to 3, wherein
Semiconductors, including solar cells. 8. The spherical substrate is made of a metal spherical body.
A silicon layer of the first conductivity type on the surface of the spherical body;
The second conductive type formed on the surface of the first conductive type silicon layer.
Characterized by forming a silicon layer and forming a pn junction
The solar cell according to any one of claims 1 to 3 is included.
Spherical semiconductor. 9. The spherical substrate is made of an insulating spherical body.
A silicon layer of the first conductivity type on the surface of the spherical body;
The second conductive type formed on the surface of the first conductive type silicon layer.
Characterized by forming a silicon layer and forming a pn junction
The solar cell according to any one of claims 1 to 3 is included.
Spherical semiconductor. 10. The semiconductor device according to claim 1, wherein said first and second silicon layers are
9. The method according to claim 8, wherein the silicon layer is a rufus silicon layer.
A spherical semiconductor comprising the solar cell as described. 11. The spherical solar cell section is of a first conductivity type.
Second impurity diffusion formed on the surface of spherical silicon
The pn junction is formed between the layer and the layer.
The solar cell according to any one of claims 1 to 3,
Semiconductors including ponds.