JP3081357B2 - Liquid crystal display device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the same, and more particularly, to an active matrix liquid crystal display device for performing gradation display in full color display and a method of manufacturing the same. The liquid crystal display is a CRT (Cathod Ray T
It has advantages such as light weight, thinness and low power consumption compared to ube), and has already been put to practical use in small TVs, etc., but demand is expected for large TVs, displays for laptop PCs, etc. .

In recent years, there has been a demand for lower prices, larger screens, and higher image quality, and their development has been progressing rapidly. In particular, in a liquid crystal display using a TFT (thin film transistor), a full-color display is required. It has been a problem to improve the viewing angle dependency in the gray scale display at the time and obtain a display with higher image quality.

[0003]

BACKGROUND OF THE INVENTION Conventional active matrix liquid crystal display device will be described with reference to FIG. 11. FIG. 11A is a schematic diagram showing a pixel portion of a conventional active matrix liquid crystal display device, and FIG. 11B is an equivalent circuit diagram showing a control capacitance of the pixel portion. A TFT 66 including a source 60, a drain 62, and a gate 64 formed on an active layer interposed therebetween through an insulating film is formed. Also, by connecting to the drain 62 of the TFT 66, the areas S1, S2
2. ITO control capacitor electrodes 68a, 68b, 68c, 68 made of ITO (Indium Tin Oxide) layers of S2, S3, S4
d is provided.

[0004] These ITO control capacitor electrodes 68
a, 68b, 68c, and 68d respectively have the areas S1, S2 of the ITO first layer connected to the drain 62 of the TFT 66.
It is formed by patterning into a shape having 2, S3 and S4. Also, these ITO control capacitor electrodes 68a, 68
The ITO sub-pixel electrodes (sub-pixels) 72 overlapping each other via an insulating film 70 on b, 68c, and 68d.
a, 72b, 72c, 72d are formed. This I
The formation of the TO sub-pixel electrodes 72a, 72b, 72c, 72d is also performed by patterning the second ITO layer deposited on the insulating film 70. The ITO sub-pixel electrodes 72a, 72b, 72c, and 72d that are divided from each other are combined to form a pixel electrode (pixel) of a one-dot cell.

[0005] In this manner, the ITO sandwiching the insulating film 70 is formed.
Between the sub-pixel electrodes 72a, 72b, 72c, 72d and the ITO control capacitor electrodes 68a, 68b, 68c, 68d, control capacitors C1, C2, C3, defined by the areas S1, S2, S3, S4 respectively. C4 is formed. Therefore, the ITO sub-pixel electrodes 72a, 72b, 72c, 72d having the respective capacitances C _LC1 , C _LC2 , C _LC3 , C _LC4.
Are connected to the drain 62 of the TFT 66 via the control capacitors C1, C2, C3, and C4, respectively, so that different voltages are applied to the respective sub-pixel electrodes, so that these ITO sub-pixel electrodes 72a, 72b, 72c , 72d, the viewing angle dependency in the gradation display of the pixel electrode can be improved, and a higher quality display can be obtained.

[0006]

However, in the conventional active matrix liquid crystal display device described above, each ITO
In order to shield light leaking from a portion where the liquid crystal state between the sub-pixel electrodes 72a, 72b, 72c, and 72d is not controlled,
There is a problem that the black matrix on the counter substrate side becomes complicated, and the loss of the aperture ratio is large in consideration of the alignment margin.

When forming the ITO control capacitor electrodes 68a, 68b, 68c, 68d to add a control capacitor, a step of depositing an ITO first layer and a step of patterning the ITO first layer are newly added. Therefore, there is a problem that the number of steps and the number of masks increase. Therefore, the present invention improves the viewing angle dependency in gray scale display by adding a control capacitor, and shields light leaking between sub-pixel electrodes to prevent loss of aperture ratio, without increasing the number of steps and the like. It is an object to provide a liquid crystal display device capable of forming a control capacitor and a method for manufacturing the same.

[0008]

The object of the present invention is to provide a thin film transistor comprising a source, a drain, an active layer, a gate insulating film and a gate, a pixel electrode connected to the drain, and a pixel electrode sandwiching a liquid crystal. In the liquid crystal display device having the opposing electrode provided, the pixel electrode is divided into a plurality of sub-pixel electrodes, and above or below a peripheral portion of the plurality of sub-pixel electrodes, via an insulating film. ,
A control capacitor electrode formed of a metal film layer is formed, a control capacitor is formed between the plurality of sub-pixel electrodes and the control capacitor electrode, and the control capacitor is provided between the plurality of sub-pixel electrodes.
This is achieved by a liquid crystal display characterized by being coupled by quantity .

In the above liquid crystal display device, the control capacitor electrode overlaps substantially the entire periphery of the plurality of subpixel electrodes and a gap between the plurality of subpixel electrodes via the insulating film. This is achieved by a liquid crystal display device. Further, the object is to form a first metal film layer on a substrate , and then pattern the first metal film layer into a predetermined shape to block light from entering the thin film transistor simultaneously with the control capacitor electrode. Forming a light-shielding film layer, and sequentially depositing a first insulating film and a transparent conductive layer on the entire surface, patterning the transparent conductive layer into a predetermined shape, and forming a source and a drain above the light-shielding film layer. simultaneously forming, the control capacity is the peripheral portion in the electrode above for the control capacitance
Forming a pixel electrode composed of a plurality of sub-pixel electrodes overlapping the quantity electrode, forming an active layer sandwiched between the source and the drain, and forming a second insulating film and a second metal on the entire surface. Forming a gate electrode over the active layer by patterning the second metal film layer into a predetermined shape after sequentially depositing the film layers, and providing the gate electrode via the first insulating film. A control capacitor is formed between the plurality of sub-pixel electrodes thus formed and the control capacitor electrode, thereby achieving a liquid crystal display device manufacturing method.

After the first metal film layer is deposited on the substrate , the first metal film layer is patterned into a predetermined shape to form a light-shielding film layer. After sequentially depositing a film and a transparent conductive layer, the transparent conductive layer is patterned into a predetermined shape, and a source and a drain are formed above the light shielding film layer, and at the same time, a pixel electrode including a plurality of sub-pixel electrodes is formed. Forming an active layer sandwiched between the source and the drain; and sequentially depositing a second insulating film and a second metal film layer on the entire surface. Forming a gate electrode above the active layer and, simultaneously, forming a control capacitor electrode above the periphery of the plurality of sub-pixel electrodes, wherein the second insulating film The plurality of sub-pixel electrodes provided through It is achieved by a method of manufacturing a liquid crystal display device, and forming a control capacitance between the control capacitor electrode.

A step of depositing a metal film layer on the substrate and then patterning the metal film layer into a predetermined shape to form a control capacitor electrode simultaneously with a gate electrode; Forming a gate insulating film on the electrode for use, forming an active layer on the gate insulating film, and then forming a source and a drain connected to the active layer facing each other; in, and a step of peripheral portion is formed of a transparent conductive layer and a pixel electrode composed of a plurality of sub-pixel electrodes overlapping the control capacitor electrode, the plurality of which are provided via the gate insulating film sub This is achieved by a method for manufacturing a liquid crystal display device, wherein a control capacitor is formed between a pixel electrode and the control capacitor electrode.

[0012]

According to the present invention, since the overlap between the sub-pixel electrode forming the control capacitor and the control capacitor electrode is limited to the peripheral portion of the sub-pixel electrode, the aperture ratio is not impaired. Further, since the control capacitor electrode is formed of a metal layer, a light-shielding effect of blocking light leaking between the sub-pixel electrodes can be exhibited. Further, since the control capacitor electrode is formed simultaneously with the light shielding film layer or the gate electrode in the same step, the number of steps,
There is no need to increase the number of masks.

Therefore, the control capacity can be easily added without reducing the aperture ratio.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the illustrated embodiments. FIG. 1 is a plan view showing an active matrix liquid crystal display device having a staggered TFT according to a first embodiment of the present invention, FIG. 2 is a sectional view taken along the line AA 'of FIG. 1, and FIG. It is.

On the transparent insulating substrate 10, a Cr light-shielding film layer 12 made of a Cr layer and a Cr control capacitance electrode 14 are formed, and these transparent insulating substrate 10, Cr light-shielding film layer 12 and Cr control capacitance electrode 14 are formed. On top of it, a Si
An N insulating film 16 is formed. In addition, the Cr light shielding film layer 1
An a-Si active layer 18 is formed on the upper SiN insulating film 16, and an a-Si active layer 18 is formed on the a-Si active layer 18 via a SiN channel protective film 20 and a SiN gate insulating film 22 having a thickness of about 250 nm. A Cr / Al gate electrode 24 made of a Cr / Al layer having a thickness of about 600 nm is formed, and a Cr / Al gate bus line 26 connected to the Cr / Al gate electrode 24 is formed. Thus, a stagger type TFT 28 is formed.

An ITO source wiring layer 32 connected to the source 30 of the TFT 28 is formed between the SiN insulating film 16 and the SiN gate insulating film 22. The ITO source wiring layer 32 having a thickness of about 100 nm is formed on the ITO source wiring layer 32. A Mo / Al source bus line 34 composed of a Mo / Al layer is formed. Similarly, the SiN insulating film 16 and the SiN gate insulating film 2
2 and 7 connected to the drain 36 of the TFT 28.
A 5 μm × 106 μm ITO sub-pixel electrode 38 a and this I
A 75 μm × 190 μm ITO sub-pixel electrode 38 b separated from the TO sub-pixel electrode 38 a by a gap of 4 μm is formed, and constitutes the pixel electrode 38 composed of the ITO sub-pixel electrodes 38 a and 38 b. Therefore, the area ratio between the ITO sub-pixel electrode 38a and the ITO sub-pixel electrode 38b is
It is about 1: 2.

Further, although not shown, a transparent insulating counter substrate facing the transparent insulating substrate 10 is provided on the SiN gate insulating film 22 and the Cr / Al gate electrode 24 via a liquid crystal. A counter electrode facing the pixel electrode 38 is provided on the liquid crystal side on the transparent insulating counter substrate. Thus, the pixel electrode 38 is replaced with the ITO sub-pixel electrode 38.
one dot 1 divided into a and the ITO sub-pixel electrode 38b
An active matrix liquid crystal display device in which cells of 10 μm × 330 μm are arranged is configured.

In this active matrix liquid crystal display device, the Cr control capacitor electrode 14 has a width of 3 .mu.m adjacent to the ITO sub-pixel electrodes 38a and 38b via the SiN insulating film 16, and the remaining peripheral portion. 4 μm
This embodiment is characterized in that it overlaps with the gap having a width of 4 μm between the ITO sub-pixel electrodes 38a and 38b. Therefore,
Due to this overlap, as shown in the equivalent circuit diagram of FIG. 3, the Cr control capacitor electrode 14 and the ITO sub-pixel electrode 38
Control capacitances C1 and C2 are generated between the control capacitances a and 38b, respectively. The control capacitances C1 and C2 are as follows: C1 = 0.175 pF C2 = 0.375 pF Therefore, the ITO sub-pixel electrode 38a is directly
Although connected to the drain 36 of the FT 28, the ITO sub-pixel electrode 38b is coupled via a control capacitor C, that is, C = C1 · C2 / (C1 + C2) = 0.119 pF.

At this time, the ITO sub-pixel electrode 38
a, capacitive C _LC1 and the capacitance C _{LC 2} of 38b are each _{C LC1 = 0.063pF (MIN) C} LC2 = 0.126pF (MIN).

Next, a method of manufacturing the active matrix liquid crystal display device shown in FIGS. 1 and 2 will be described with reference to FIGS. (A) of each figure shows a plan view of the process, and (b) shows a sectional view taken along line AA '. After a Cr layer is deposited on the transparent insulating substrate 10, it is patterned into a predetermined shape to form the Cr light-shielding film layer 12 and the Cr control capacitor electrode 14 (see FIG. 4).

Next, an Si film having a thickness of about 300 nm is
After forming the N insulating film 16, an ITO layer is deposited. Subsequently, the ITO layer is patterned into a predetermined shape,
75 μm × 106 μm ITO subpixel electrode 38 a separated by a TO source wiring layer 32 and a 4 μm gap
And an ITO sub-pixel electrode 38b of 75 μm × 190 μm is formed.

At this time, the ITO sub-pixel electrodes 38a, 38
3 μm width of adjacent peripheral part of b, 4 μm of remaining peripheral part
A gap having a width of m and a width of 4 μm between the ITO sub-pixel electrodes 38a and 38b is overlapped with the Cr control capacitor electrode 14 via the SiN insulating film 16. Thus, the pixel electrode 38 including the ITO sub-pixel electrodes 38a and 38b is formed (see FIG. 5).

Next, a Mo / Al source bus line 34 having a thickness of about 100 nm is formed on the ITO source wiring layer 32 (see FIG. 6). Next, an a-Si layer and S
After continuously forming iN films, these SiN films and a-
The Si layer is patterned into a predetermined shape to perform element isolation, and the ITO source wiring layer 32 and the ITO sub-pixel electrode 38a
Then, an a-Si active layer 18 sandwiched between them and an SiN channel protective film 20 on this a-Si active layer 18 are formed (FIG. 7).
reference).

Next, an Si film having a thickness of about 250 nm
After forming the N gate insulating film 22, a Cr / Al layer having a thickness of about 600 nm is deposited. Subsequently, the Cr / Al layer is patterned into a predetermined shape, and the Cr / Al gate electrode 24 and the Cr connected to the Cr / Al gate electrode 24 are formed.
/ Al gate bus line 26 is formed. Thus, a stagger type TFT 28 is formed (see FIG. 8).

Although not shown in the drawings, the pixel electrode 38 shown in FIGS. 1 and 2 is replaced with the ITO sub-pixel electrode 38a and the ITO through the same processes as those of a normal active matrix liquid crystal display device. Sub-pixel electrode 38
An active matrix liquid crystal display device in which cells each having a size of 110 μm × 330 μm divided into b and b are arranged is completed.

As described above, according to this embodiment, the control capacitors C1 and C2 are formed between the Cr control capacitor electrode 14 and the ITO sub-pixel electrodes 38a and 38b, respectively, and the ITO sub-pixel electrode 38a is connected to the drain of the TFT 28. 36, and the ITO sub-pixel electrode 38b is connected to the control capacitor C = C1 · C2.
/ (C1 + C2) to connect the ITO
Since different voltages are applied to the sub-pixel electrodes 38a and 38b, the viewing angle dependency in gradation display of the pixel electrode 38 obtained by combining the ITO sub-pixel electrodes 38a and 38b is improved.
A display with higher image quality can be obtained.

For example, in the case of normally black, ITO
When the transmittance of the sub-pixel electrode 38a rises to about 90%, the transmittance of the ITO sub-pixel electrode 38b becomes about 10%. By combining these, the viewing angle dependency in the halftone is reduced, and a good display is obtained. Can be. Also, the Cr control capacitor electrode 14 forming the control capacitors C1 and C2 and IT
The overlap with the O sub-pixel electrodes 38a and 38b is limited to the peripheral portions of the ITO sub-pixel electrodes 38a and 38b. Since this portion is originally a portion that does not transmit light due to the alignment margin of the black matrix, the aperture ratio is reduced. There is no loss.

Conversely, this Cr control capacitor electrode 14
With the layer, a light-shielding effect can be expected, so that the black matrix on the counter substrate side can be prevented from becoming complicated. Further, this Cr control capacitor electrode 14
Is formed simultaneously in the same step as the Cr light-shielding film layer 12 using the same mask, so that there is also a process advantage that it is not necessary to increase the number of steps and masks in order to form a control capacitor.

Next, an active matrix liquid crystal display device having a staggered TFT according to a second embodiment of the present invention will be described with reference to the sectional view of FIG. Note that the same components as those of the active matrix liquid crystal display device of FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. A Cr light-shielding film layer 12 is formed on the transparent insulating substrate 10, and an a-Si active layer 18 is formed above the Cr light-shielding film layer 12 via a SiN insulating film 16. Above,
SiN channel protective film 20 and SiN gate insulating film 22
Through a Cr / Al gate electrode 2 made of Cr / Al
4 and Cr / Al connected to this Cr / Al gate electrode 24
An Al gate bus line 26 is formed, and a staggered TF
T28.

In addition, between the SiN insulating film 16 and the SiN gate insulating film 22, there is provided an I
The TO source wiring layer 32 and the Mo / Al source bus line 34 are formed, and the ITO sub-pixel electrode 38a connected to the drain of the TFT 28 is separated from the ITO sub-pixel electrode 38a by a gap having a width of 4 μm. ITO
The sub-pixel electrode 38b is formed to form the pixel electrode 38.

On the SiN gate insulating film 22, C
A Cr / Al control capacitor electrode 40 made of an r / Al layer is formed, and a 3 μm width of the adjacent peripheral portion of the ITO sub-pixel electrodes 38 a and 38 b and a 4 μm of the remaining peripheral portion are interposed via the SiN gate insulating film 22. Width, ITO sub-pixel electrode 38a, 3
This embodiment is characterized in that it overlaps with a gap of 4 μm width between 8b.

Further, although not shown, a transparent insulating film opposed to the transparent insulating substrate 10 is provided on the SiN gate insulating film 22, the Cr / Al gate electrode 24 and the Cr / Al control capacitor electrode 40 via the liquid crystal. An opposing substrate is provided,
A pixel electrode 38 is provided on the liquid crystal side on the transparent insulating counter substrate.
Are provided. Thus, the pixel electrode 38 is divided into the ITO sub-pixel electrode 38a and the ITO sub-pixel electrode 38b, so that one dot 110 μm × 330 μm
An active matrix liquid crystal display device in which the above cells are arranged is configured.

Next, a method of manufacturing the active matrix liquid crystal display device shown in FIG. 9 will be described. This manufacturing process is almost the same as that of the first embodiment shown in FIGS. 4 to 7 except that in the process of FIG. Instead of forming the electrode 14, the Cr / Al layer is patterned in the step of FIG.
/ Al gate bus line 26 and Cr
The difference is that the / Al control capacitor electrode 40 is formed.

As described above, according to this embodiment, the first embodiment is different from the first embodiment in that the Cr control capacitor electrode 14 is replaced with the ITO sub-pixel electrode 3.
8a and 38b are formed below the SiN insulating film 16 with the Cr / Al control capacitor electrode 40
The difference is that the Cr / Al control capacitor electrode 40 and the ITO sub-pixel electrode 38 are formed above the O sub-pixel electrodes 38a and 38b with the SiN gate insulating film 22 interposed therebetween.
The point that the control capacitors C1 and C2 are formed between the control capacitors C1 and C2 is common to the control capacitors C1 and C2.

Therefore, as in the case of the first embodiment, different voltages are applied to the ITO sub-pixel electrodes 38a and 38b, and the viewing angle dependency in the gray scale display of the pixel electrode 38 obtained by combining these voltages is improved. A display with higher image quality can be obtained. In addition, the aperture ratio is not impaired, and Cr / A
This is the same as the case where the electrode 40 for control capacitance exerts a light shielding effect.

Further, the Cr / Al control capacitor electrode 40
Is formed simultaneously in the same step as the Cr / Al gate electrode 24 using the same mask, and thus has the advantage in process that the number of steps and the number of masks do not need to be increased. As described above, the first and second embodiments relate to an active matrix liquid crystal display device having a staggered TFT.

Next, an active matrix liquid crystal display device having an inverted staggered TFT according to a third embodiment of the present invention will be described with reference to FIG. FIG. 10A is a plan view showing an active matrix liquid crystal display device having an inverted staggered TFT according to the third embodiment, and FIG.
It is a sectional view taken on line -A '. The same components as those of the active matrix liquid crystal display device shown in FIGS. 1 and 2 are denoted by the same reference numerals, and description thereof will be omitted.

On the transparent insulating substrate 10, an Al / Ti gate electrode 42 made of Al / Ti, an Al / Ti gate bus line 44 connected to the Al / Ti gate electrode 42, and an Al / Ti control capacitor electrode 46 are provided. The transparent insulating substrate 10, the Al / Ti gate electrode 42,
The SiN gate insulating film 22 is formed on the Ti gate bus line 44 and the Al / Ti control capacitor electrode 46.

The a-Si active layer 1 is formed on the Al / Ti gate electrode 42 via the SiN gate insulating film 22.
8 are formed. On the a-Si active layer 18 and the SiN gate insulating film 22, a Ti / Al source electrode 48 and a T / Al
The i / Al drain electrode 50 is formed to face each other to constitute an inverted staggered TFT 52. On the SiN gate insulating film 22, ITO sub-pixel electrodes 38a and 38b are formed. This ITO sub-pixel electrode 38a is
The ITO sub-pixel electrode 38b is connected to the Ti / Al drain electrode 50 of T52, and the ITO sub-pixel electrode 38b is connected to the ITO sub-pixel electrode 38 via a control capacitor composed of the Al / Ti control capacitor electrode 46 and the SiN gate insulating film 22. 38a, and these ITO sub-pixel electrodes 38a, 38b
The pixel electrode 38 is formed.

The electrode 46 for the Al / Ti control capacitor is
Through the SiN gate insulating film 22, the ITO sub-pixel electrode 3
This embodiment is characterized in that it overlaps with a gap of 3 μm in the peripheral portion adjacent to 8a and 38b, a width of 4 μm in the other peripheral portion, and a width of 4 μm between the ITO sub-pixel electrodes 38a and 38b. Further, although not shown, the Ti / Al source electrode 4
8. Ti / A connected to this Ti / Al source electrode 48
1 source bus line 54, Ti / Al drain electrode 5
0, on the pixel electrode 38 and the SiN gate insulating film 22,
A transparent insulating counter substrate facing the transparent insulating substrate 10 is provided via liquid crystal, and a counter electrode facing the pixel electrode 38 is provided on the liquid crystal side of the transparent insulating counter substrate. .

In this manner, an active matrix liquid crystal display device in which cells each having a size of 110 μm × 330 μm in which the pixel electrode 38 is divided into the ITO sub-pixel electrode 38a and the ITO sub-pixel electrode 38b is provided. As described above, according to the present embodiment, the configuration in which the control capacitors C1 and C2 are formed at the overlapping portion between the ITO sub-pixel electrodes 38a and 38b and the Al / Ti control capacitor electrode 46 with the SiN gate insulating film 22 interposed therebetween. In the first embodiment, the Cr control capacitor electrode 14 is replaced with the Al / Ti control capacitor electrode 46 by SiN.
The insulating film 16 is replaced with a SiN gate insulating film 22, respectively.

Therefore, as in the case of the first embodiment, different voltages are applied to the ITO sub-pixel electrodes 38a and 38b, and the viewing angle dependency in the gray scale display of the pixel electrode 38 obtained by combining these voltages is improved. A display with higher image quality can be obtained. Further, the aperture ratio is not impaired, and Al / T
This is similar to the case where the i-control capacitor electrode 46 exhibits a light-shielding effect.

Further, the Al / Ti control capacitor electrode 46
Is formed at the same time as the Al / Ti gate electrode 42 in the same step using the same mask, so that it also has a process advantage that it is not necessary to increase the number of steps and the number of masks.

[0044]

As described above, according to the present invention, the control capacitor is formed by overlapping the periphery of the plurality of sub-pixel electrodes with the control capacitor electrode formed of the metal film layer via the insulating film. Accordingly, a light blocking effect of blocking light leaking between the sub-pixel electrodes can be achieved without impairing the aperture ratio. In addition, since the control capacitor electrode can be formed simultaneously with the light-shielding film layer or the gate electrode in the same step, a control capacitor can be added without increasing the number of steps and the like.

Therefore, since a control capacitor can be easily added without reducing the aperture ratio, the viewing angle dependency in gradation display can be improved, and a display with higher image quality can be obtained.

[Brief description of the drawings]

FIG. 1 is a plan view showing an active matrix liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a diagram A of the active matrix liquid crystal display device of FIG. 1;
It is a sectional view taken on line -A '.

FIG. 3 is an equivalent circuit diagram showing a control capacitance of the active matrix liquid crystal display device of FIG.

4A and 4B are a process plan view and a process cross-sectional view (part 1) for describing the method of manufacturing the active matrix liquid crystal display device shown in FIGS.

5A and 5B are a process plan view and a process cross-sectional view (part 2) for explaining the method of manufacturing the active matrix liquid crystal display device shown in FIGS.

FIG. 6 is a process plan view and a process cross-sectional view (part 3) for describing the method for manufacturing the active matrix liquid crystal display device shown in FIGS. 1 and 2.

FIG. 7 is a process plan view and a process cross-sectional view (No. 4) for describing the method of manufacturing the active matrix liquid crystal display device shown in FIGS.

8A and 8B are a process plan view and a process cross-sectional view (No. 5) for describing the method for manufacturing the active matrix liquid crystal display device shown in FIGS.

FIG. 9 is a sectional view showing an active matrix liquid crystal display device according to a second embodiment of the present invention.

FIG. 10 is a plan view and a sectional view showing an active matrix liquid crystal display device according to a third embodiment of the present invention.

FIG. 11 is a schematic diagram showing a pixel portion of a conventional active matrix liquid crystal display device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Transparent insulating substrate 12 ... Cr light shielding film layer 14 ... Cr control capacitor electrode 16 ... SiN insulating film 18 ... a-Si active layer 20 ... SiN channel protective film 22 ... SiN gate insulating film 24 ... Cr / Al gate electrode 26: Cr / Al gate bus line 28: TFT 30: source 32: ITO source wiring layer 34: Mo / Al source bus line 36: drain 38a, 38b: ITO sub-pixel electrode 38: pixel electrode 40: Cr / Al control capacitance Electrodes 42 ... Al / Ti gate electrode 44 ... Al / Ti gate bus line 46 ... Al / Ti control capacitor electrode 48 ... Ti / Al source electrode 50 ... Ti / Al drain electrode 52 ... TFT 54 ... Ti / Al source bus Line 60: Source 62: Drain 64: Gate 66: TFT 68a, 68b, 68c, 68d: I TO control capacitor electrode 70: insulating film 72a, 72b, 72c, 72d: ITO sub-pixel electrode

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-12 (JP, A) JP-A-4-51121 (JP, A) JP-A-5-66412 (JP, A) JP-A-4-64 348323 (JP, A) JP-A-4-348324 (JP, A) JP-A-3-239229 (JP, A) JP-A-3-196020 (JP, A) JP-A-2-278231 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G02F 1/1368 G02F 1/1343

Claims (5)

(57) [Claims] A thin film transistor including a source, a drain, an active layer, a gate insulating film, and a gate; a pixel electrode connected to the drain; and a counter electrode provided to face the pixel electrode with a liquid crystal interposed therebetween. In the liquid crystal display device, the pixel electrode is divided into a plurality of sub-pixel electrodes, and a control capacitor formed of a metal film layer via an insulating film above or below a peripheral portion of the plurality of sub-pixel electrodes. And a control capacitor is formed between the plurality of sub-pixel electrodes and the control capacitor electrode, and the control capacity is provided between the plurality of sub-pixel electrodes.
A liquid crystal display device which is coupled by a capacitor . 2. The liquid crystal display device according to claim 1, wherein the control capacitor electrode is provided at substantially the entire periphery of the plurality of sub-pixel electrodes and a gap between the plurality of sub-pixel electrodes via the insulating film. A liquid crystal display device characterized by overlapping with the above. 3. After depositing a first metal film layer on a substrate ,
Patterning the first metal film layer into a predetermined shape,
Forming a light-shielding film layer for blocking light from entering the thin film transistor at the same time as the control capacitor electrode; and, after sequentially depositing a first insulating film and a transparent conductive layer on the entire surface,
Patterning the transparent conductive layer into a predetermined shape, forming a source and a drain above the light shielding film layer,
The peripheral portion is above the control capacitor electrode above the control capacitor electrode.
Forming a pixel electrode composed of a plurality of sub-pixel electrodes overlapping with, forming an active layer sandwiched between the source and the drain, a second insulating film and the second metal film layer on the entire surface Forming a gate electrode above the active layer by patterning the second metal film layer into a predetermined shape after the sequential deposition, and providing the gate electrode via the first insulating film. A method for manufacturing a liquid crystal display device, comprising forming a control capacitor between a plurality of sub-pixel electrodes and the control capacitor electrode. 4. After depositing a first metal film layer on a substrate ,
Patterning the first metal film layer into a predetermined shape,
Forming a light-shielding film layer, and sequentially depositing a first insulating film and a transparent conductive layer on the entire surface,
Patterning the transparent conductive layer into a predetermined shape, forming a source and a drain above the light shielding film layer,
A step of forming a pixel electrode composed of a plurality of sub-pixel electrodes; a step of forming an active layer sandwiched between the source and the drain; a second insulating film and a second metal film layer sequentially deposited on the entire surface After that, the second metal film layer is patterned into a predetermined shape to form a gate electrode above the active layer,
Forming a control capacitor electrode above a peripheral portion of the plurality of sub-pixel electrodes, wherein the plurality of sub-pixel electrodes and the control capacitor electrode provided via the second insulating film are provided. A method for manufacturing a liquid crystal display device, wherein a control capacitor is formed during the process. 5. A step of depositing a metal film layer on a substrate , patterning the metal film layer into a predetermined shape, and forming a control capacitor electrode simultaneously with a gate electrode; Forming a gate insulating film on the electrode for use; forming an active layer on the gate insulating film; and forming a source and a drain connected to the active layer facing each other; in, and a step of peripheral portion is formed of a transparent conductive layer and a pixel electrode composed of a plurality of sub-pixel electrodes overlapping the control capacitor electrode, the plurality of which are provided via the gate insulating film sub A method for manufacturing a liquid crystal display device, comprising forming a control capacitor between a pixel electrode and the control capacitor electrode.