JP3080823B2 - Semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit device for detecting a load current in an intelligent power MOS IC. The semiconductor integrated circuit device of the present invention can be applied to, for example, a three-phase spindle motor driver for a hard disk drive (HDD), a voice coil motor driver, and a driver IC for driving a load by switching between power, MOS, and IC. it can.

[0002]

2. Description of the Related Art As means for detecting a current flowing through a load such as a motor, for example, devices shown in FIGS. 7 and 8 are conventionally known. In the apparatus shown in FIG. 7, a high-precision sense resistor Rs is interposed on the earth-side path of the load current ILoad flowing through the load (Load), and the voltages VRSH and VRSL at both ends thereof are taken out, so that ILoad = (VRSH-VRSL). ) / R
The load current ILoad is detected based on the calculation formula of s. VDD is a power supply voltage.

The device of FIG. 8 has the same configuration as that of FIG. 7 except that a sense resistor Rs is provided on a path on the side of the power supply voltage VDD. 7 and 8, M1 denotes an N-channel power MOSFET.
The OS • FET (M1) is built in an intelligent power MOS • IC for controlling on / off or magnitude of a current flowing to a load (Load).

On the other hand, as a device for detecting a load current without loss, a device shown in FIG. 9 is known. The device shown in FIG. 9 is called a SENSEFET (trade name of Motorola), in which a power MOSFET (F) is divided into a power portion F1 and a sense portion F2. The ON resistance of the power unit F1 is related at a fixed ratio. Therefore, SENSEFET (F)
Turns on, the current flow is divided in inverse proportion to the on-resistance of the sense unit F2 and the on-resistance of the power unit F1,
It appears as a ratio between the sense current (mirror current) IM and the source current IS. The ratio of the source current IS to the sense current IM is defined by the current mirror ratio n, which is typically 100
Since the current is on the order of 0: 1, the load current is substantially equal to the source current IS, and the current mirror ratio n also reflects the ratio between the load current and the sense current IM.

Therefore, by connecting the sense resistor R between the mirror terminal 91 and the ground terminal, the known portion of the load current becomes large as in the case of using the power sense resistor RS as shown in FIGS. Current detection can be performed without voltage loss. If the sense resistance R is 10% or less of the on-resistance of the sense unit F2, the detected current is substantially equal to load current / current mirror ratio, that is, ILoad / n. 92 is a source terminal.

[0006]

However, in the conventional devices shown in FIGS. 7 and 8, in order to drive a load with high efficiency, it is necessary to apply a sufficient voltage to both ends of the load. However, there is a problem that a loss corresponding to a voltage drop occurs in the power sense resistor RS and the efficiency of driving the load is reduced. In particular, when the power supply voltage VDD is low or when it is desired to increase the load current ILoad,
Or if both, the power sense resistor RS
In this case, since the ratio of the voltage loss in the load becomes large, the load driving efficiency is remarkably reduced, and driving may not be possible depending on the performance of the load.

On the other hand, in the device shown in FIG. 9, in order to make the current mirror ratio n accurate, it is necessary to make the sense resistor R sufficiently smaller than 10% of the on-resistance of the sense portion F2.
Therefore, there is a problem that the sense voltage that can be taken out becomes small and it is difficult to detect. Conversely, in order to extract a sufficiently large sense voltage, it is necessary to increase the sense resistance R. In this case, however, there is a problem that the current mirror ratio n becomes inaccurate.

When the motor is driven by the apparatus shown in FIGS. 7 and 8, a larger load current flows at the time of rotation start than at the time of steady rotation, so that when the load current is converted into a voltage and detected, the rotation start is performed. When it is desired to change the gain according to the magnitude of the load current flowing during the normal rotation and during the normal rotation, it is necessary to switch the power sense resistor RS, and there is also a problem that the degree of freedom is low. There is a similar problem in the apparatus of FIG.

Accordingly, a first object of the present invention is to provide a semiconductor integrated circuit device capable of detecting a load current with no loss and high accuracy without interposing a sense resistor on a load current path. It is in. A second object of the present invention is to provide a semiconductor integrated circuit device capable of easily switching a gain according to the magnitude of a load current when detecting a load current.

[0010]

A semiconductor integrated circuit device according to the present invention is a semiconductor integrated circuit device for detecting a load current, comprising: a first series circuit of a power MOSFET (M1) and a load; A second series circuit of an FET (M2) and a power MOS-FET (M3) connected in parallel with each other and inserted between a first power supply and a second power supply; -FET (M1), (M
A first current mirror circuit for connecting the gates of 2) to each other to flow a small current at a fixed ratio to a load current to a second series circuit; and the power MOSFET (M1);
The source-drain voltage of (M2) is input and the output side is the gate of the power MOSFET (M3).
The power MOSFET FET (M1),
An operational amplifier for controlling the current flowing through the power MOSFET (M3) so that the voltage between each source and drain of (M2) becomes equal, and the drain and source are inserted in the second series circuit. Power MOS FET (M4)
A power MOS-FET (M5) and a power MOS-FET (M6) whose gates are connected to the gate of the power MOS-FET (M4);
A power sense resistor commonly connected to the source or drain of the S-FETs (M5) and (M6); A second current mirror circuit for supplying a current to the power sense resistor at a mirror ratio of: and a power MOS.
And a switch section for changing a mirror ratio by changing a current flow manner of the FETs (M5) and (M6).

[0011]

According to the present invention, two power M
The voltage of the OS • FET (M1, M2) is stabilized. Therefore, the power MOSFET for load current control (M1)
, The current mirrored to the current-sensing power MOS-FET (M2) is determined with high accuracy by the size ratio (n to 1) of the FET (M1) and the FET (M2), and the FET (M2)
, A small current of 1 / n of the load current ILoad flows stably.
Therefore, when a current is detected by inserting a power sense resistor having a sufficient resistance into the current path of the FET (M2) with high detection accuracy, power loss in the power sense resistor can be suppressed to a small value. In addition, the load current control power
Since it is not necessary to interpose a power sense resistor in the S-FET (M1), the loss of the voltage applied across the load is small. A part of the current mirror circuit is turned on / off by a switch, so that the power for current sensing MO
Current detection can be performed by mirroring the current flowing through the S.FET (M2) to a small current having a different ratio. Therefore, for example, when the load current greatly changes according to the state of the load like a motor, the load current can be detected with high accuracy using a gain corresponding to the magnitude of the changed load current.

[0012]

FIG. 1 shows an embodiment of the present invention corresponding to claim 1, and is an example of a semiconductor integrated circuit device for detecting a load current without loss in an intelligent power MOS IC. A power MOSFET (M) for controlling the load current ILoad on the ground side of the load (Load).
1) is interposed, and a current sensing power MOSFET (M2) for mirroring a load current ILoad flowing through the FET (M1) to a small current at a constant ratio is connected to a common gate. The FET (M1) and the FET (M
2) are all n-channel MOSFETs whose characteristics are similar. The size ratio between M1 and M2 is n: 1, and in one example, 1000: 1.

An operational amplifier OP1 and a MOS FET (M
3) constitutes a feedback circuit 1. The feedback circuit 1 comprises two FETs (M1, M2).
Terminal voltage (drain-source voltage) is constant. That is, the non-inverting input terminal of the operational amplifier OP1 is an FET
(M1) is connected to the drain and the inverting input terminal is FET
(M2), and the output terminal is connected to the FET (M
3) It is connected to the gate. The source of the FET (M3) is connected to the drain of the FET (M2),
A power sense resistor RS is interposed on the power supply voltage VDD side of (M3). In the feedback circuit 1, control is performed such that the voltage of the non-inverting input terminal and the voltage of the inverting input terminal of the operational amplifier OP1 are always constant.

Next, the operation of the apparatus shown in FIG. 1 will be described.
Generally, the current equation of a MOSFET is given by the following equation 1 when operating in the linear region, and by the following equation 2 when operating in the saturation region.
Indicated by

[0015]

(Equation 1)

[0016]

(Equation 2) Here, IDS is the drain-source current, β is the structural coefficient, μe ε / d (μe is the mobility, ε is the dielectric constant of the insulator, d is the thickness of the insulator), and W is the channel. The width of the
L is the channel length, VGS is the gate-source voltage, V
th indicates a threshold voltage, and VDS indicates a drain-source voltage.

Using a conventionally known current mirror circuit, the current flowing through a certain MOS.
In the case of mirroring to an S-FET, the current equation follows Equation 2 above because the MOS-FET operates in the saturation region, and the current is determined by the ratio of W / L between the two MOS-FETs without being affected by VDS. It is well known to be mirrored.

However, when a current flowing in a certain power MOS-FET is mirrored to another power MOS-FET, the power MOS-FET is designed to have a low on-resistance, so that VGS is usually higher than VDS. Is much larger, and operates in the linear region.
Follow. That is, IDS is affected by VDS, and the relational expression of the current flowing through the FET (M1) and the FET (M2) in FIG.

[0019]

(Equation 3) From equation (3), VDS (M1) of FET (M1) and FET
If VDS (M2) of (M2) is made equal (VDS (M1) = VDS (M2)), W of FET (M1)
The current can be mirrored by the ratio of / L and W / L of the FET (M2). Therefore, the operational amplifier OP1 and the MOSFE
Feedback is applied by the feedback circuit 1 composed of T (M3) and the V of the FET (M1) and the FET (M2).
If DS is always equal, FET (M1) and FET (M
If the size ratio of 2) is n: 1, a current 1 / n of the load current ILoad of the FET (M1) flows stably to the FET (M2) side.

As described above, according to the embodiment shown in FIG. 1, since it is not necessary to interpose a power sense resistor on the current path of the load (Load), the voltage applied to both ends of the load can be reduced. Current sensing FET without loss
By (M2), the load current ILoad can be detected with high accuracy. Moreover, a power sense resistor RS sufficient for increasing the detection accuracy in the current path of the FET (M2).
, The current flowing through the FET (M2) is as small as 1 / n of the load current, so that the power loss due to the power sense resistor RS is suppressed to be small.

FIG. 2 shows another embodiment corresponding to the first embodiment. In this embodiment, the FET (M1) and the FET (M2) are interposed on the power supply voltage VDD side. Are equivalent. Thus, even if the FET (M1) and the FET (M2) are interposed on the power supply voltage VDD side, the same operation and effect as those of the embodiment shown in FIG. 1 can be obtained.

FIG. 3 shows an embodiment of the present invention corresponding to claim 2, and is an example of a semiconductor integrated circuit device for detecting a load current without loss in an intelligent power MOS IC. This embodiment is different from the embodiment shown in FIG. 1 in that a current mirror circuit 2 for mirroring a current flowing through a current sensing power MOS FET (M2) to a small current at a constant ratio, and to make the ratio variable. And a switch 3 for turning on / off a part of the current mirror circuit 2.

The current mirror circuit 2 of this embodiment is constructed using a conventionally known current mirror circuit. That is, the p-channel MOSFET (M4) is interposed on the current path of the power MOSFET (M2) for current sensing, and the current flowing through the FET (M4) is further mirrored into a small current at a constant ratio. P-channel MOS ・ FE for
T (M5) and p-channel MOS FET (M6) are connected to FET (M4) by common gate, respectively.
(M5) and the FET (M6) are connected to a common drain. The transfer gate TG1 constituting the switch 3 is inserted on the drain current path of the FET (M6). The transfer gate TG1 is for controlling on / off of the FET (M6) by a gain control signal. G1 is a gate. Further, the power sense resistor RS is inserted on the drain current path of the FET (M5).

In this embodiment, since a current mirror circuit 2 for mirroring a small current at a fixed ratio and a switch 3 for changing the ratio are added, the switch 3 is turned on and off by a gain control signal. By performing the off control, the current mirror ratio can be switched. Therefore, in the embodiment of FIG. 1, the degree of freedom of the current detection amount is limited. In this embodiment, however, the degree of freedom of the current detection amount is large, and therefore, the power sense resistor RS must be replaced or switched. If the load current greatly changes without performing the above operation, the load current can be detected with high accuracy using a gain corresponding to the magnitude of the changed load current.

This embodiment has a remarkable effect particularly when applied to an intelligent power MOS IC used in a spindle motor driver for a hard disk drive (HDD) or a voice coil motor driver. That is, a large load current flows when the motor starts rotating, and a small load current flows when the motor rotates at a steady speed. Therefore, the detection current can be switched to a small value by the current mirror circuit 2 when the motor starts rotating to increase the detection accuracy.

FIG. 4 shows another embodiment corresponding to claim 2, which is obtained by adding the current mirror circuit 2 and the switch 3 of FIG. 3 to the embodiment of FIG. That is,
This is an example in which the FET (M4) constituting the current mirror circuit is connected to the ground side of the current sensing power MOSFET (M2). In the embodiment shown in FIG. 4, the same operation and effect as those in the embodiment shown in FIG. 3 are obtained.

FIG. 5 shows an embodiment in which the location where the current mirror ratio is switched is changed to the gate side in the embodiment of FIG. That is, in FIG. 3, the switching of the current mirror ratio is performed on the drain side, but in this embodiment, two transfer gates (TG1, TG2) and the gate G1 are used, and the gate side of the FET (M5, M6) is used. The current mirror ratio is switched. Also in this embodiment, FIG.
The same operation and effect as those of the embodiment can be obtained.

FIG. 6 shows an embodiment in which the switching position of the current mirror ratio is changed to the gate side in the embodiment of FIG. In this embodiment, the same operation and effect as those of the embodiment of FIG. 4 can be obtained.

In the embodiment shown in FIGS.
If the same current mirror circuit is further connected in multiple stages to the current mirror circuit composed of one FET (M4, M5, M6), the number of gain switching stages can be further increased.

Although the embodiment of the present invention has been described above, in the present invention, the current mirror circuit is formed using the current mirror circuit. However, the current mirror circuit is not limited to the case where the current mirror circuit is used. Other alternatives can be used.

[0031]

According to the present invention, the following effects can be obtained. (1) Power MOSFET for load current control (M1)
It is not necessary to interpose a power sense resistor on the current path of the load, so that the loss of the voltage applied across the load is small. (2) Since the current flowing through the power MOS FET (M2) for current sensing is small, a power sense resistor for detecting current by inserting a power sense resistor with sufficient resistance and high detection accuracy in this current path is used. The power loss at is small. (3) Since the detected current is extracted by mirroring the load current on a path different from the path of the load current, the degree of freedom in processing the detected current is high. (4) Further, a current mirror circuit for mirroring a small current at a constant ratio and a switch for changing the ratio are provided, so that the current flowing through the current-sensing power MOS-FET (M2) has a small current having a different ratio. Therefore, when the load current changes greatly, the gain can be switched to a gain corresponding to the magnitude of the changed load current, and the load current can be detected with high accuracy. (5) Power MOSFET for load current control (M1)
The size of the power MOSFET for current sensing (M
Since the size can be made much larger than the size of 2), the power consumption of the current sensing power MOSFET (M2) is small.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of an embodiment of the present invention corresponding to claim 1;

FIG. 2 is an explanatory diagram of another embodiment of the present invention corresponding to claim 1;

FIG. 3 is an explanatory view of an embodiment of the present invention corresponding to claim 2;

FIG. 4 is an explanatory view of another embodiment of the present invention corresponding to claim 2;

FIG. 5 is an explanatory view of still another embodiment of the present invention corresponding to claim 2;

FIG. 6 is an explanatory view of still another embodiment of the present invention corresponding to claim 2;

FIG. 7 is an explanatory diagram showing an example of a conventional current detection device.

FIG. 8 is an explanatory diagram showing another example of a conventional current detection device.

FIG. 9 is an explanatory diagram showing still another example of the conventional current detection device.

[Explanation of symbols]

M1 Power MOS for controlling load current
FET M2 Power MOS • FET for current sensing M3 MOS • FET OP1 Operational amplifier Load Load 1 Feedback circuit 2 Current mirror circuit 3 Switch M4, M5, M6 MOS • FET

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) G01R 19/00-19/32 G05F 1/56 310 G05F 3/26 H03F 3/343 H03F 3/345

Claims (1)

(57) [Claims] 1. A semiconductor integrated circuit device for detecting a load current.
, A first series of a power MOSFET (M1) and a load
Circuit, power MOS FET (M2) and power
And a second series circuit of the MOS-FET (M3)
Connect in parallel and interpose between the first power supply and the second power supply
Power MOS FET (M1), (M2)
Are connected to each other and a constant ratio to the load current.
Current mirror for flowing a small current through the second series circuit
Circuit and the power / MOS / FET (M1) and (M2)
-The source-drain voltage is input and the output side is
Connected to the gate of the power MOS FET (M3),
The source of each of the power MOSFETs (M1) and (M2)
Power and MO so that the voltage between
Operational amplifier that controls the current flowing through S-FET (M3)
And a capacitor having a drain and a source interposed in the second series circuit.
The word · MOS · FET (M4), the gate of the power · MOS · FET (M4) - the gate to the door
Power MOS-FET (M5) connected to
Power MOS FET (M6) and this power MO
Source or drain of S-FET (M5), (M6)
And a power sense resistor commonly connected to
And the current flowing through the power MOSFET (M4)
To the power sense resistor at a predetermined mirror ratio.
A second current mirror circuit for flowing a current; and a second current mirror circuit provided in the second current mirror circuit for turning on and off the current.
Of the current of the power MOSFET (M5) and (M6)
Switch section for changing the mirror ratio by changing the flow
And a semiconductor integrated circuit device.