JP3074633B2 - Quantization circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quantization circuit, and more particularly to a quantization circuit capable of outputting a quantized voltage corresponding to an analog voltage.

[0002]

2. Description of the Related Art Digital technology in computer science has been remarkably developed with the progress of microfabrication technology. However, the amount of capital investment has been increasing at an accelerating rate, and analog technology is currently attracting attention. Conventionally, a circuit using a voltage divider with series resistance has been used to quantize analog data.However, since current is constantly generated, power consumption is large, and when the reference voltage fluctuates, There was a problem that the output value fluctuated significantly.

[0003]

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and an object of the present invention is to provide a quantization circuit which is power-saving and has good quantization accuracy. I do.

[0004]

A quantizing circuit according to the present invention is provided with a plurality of threshold circuits in a stepwise manner. When a threshold circuit for a certain threshold generates an output, the output of the lower threshold circuit is output. It shuts off.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of a quantization circuit according to the present invention will be described with reference to the drawings. In FIG. 1, a plurality of (four in FIG. 1) threshold circuits TH1 to quantization circuits are shown.
TH4, which are thresholded stepwise from the lowest threshold to the highest threshold.

The outputs of the threshold circuits are respectively input to first switching means SW11 to SW14, and when the threshold circuits generate outputs, these first switching means are closed. The first switching means has a voltage source (voltages Vd1 to Vd1 in FIG. 1) connected to its first terminal.
Vd4) is connected, and when closed, the voltages of these voltage sources are generated at the second terminal.

The second terminals of the first opening / closing means SW11 to SW13 are connected to the second opening / closing means SW21 to SW23, respectively.
Outputs of TH2 to TH4 are input to these opening / closing means. Opening / closing means SW21 to SW23 are TH2
Opened when the output of TH3 occurs, for example, SW1
SW1 to SW14 are formed of pMOS, and SW21 to SW2
Reference numeral 3 denotes an nMOS, and elements having characteristics opposite to each other are used. The outputs of SW21 to SW24 are connected to a common output terminal (represented by a voltage Vout).

The threshold circuits TH1 to TH4 have the same configuration, and the inputs are an input voltage Vin and an offset voltage Vof.
f, bias voltage Vb and ground. Here, TH1 will be described as an example. TH1 is composed of a capacitive coupling composed of parallel capacitances C11 to C14 and an inverting amplifier INV1.
Voff and Vb are connected to C11, C12, and C13, respectively, and C14 is connected to the ground.

The output voltage V1 of the capacitive coupling, that is, INV
The input voltage to 1 is

(Equation 1) When the input voltage Vin is equal to or higher than the threshold value of INV1, the output of INV1 becomes low level.

That is, if this threshold voltage is Vth,

(Equation 2) Produces a low level output. Here, C12Voff is set so as to eliminate the offset of INV1, and C13 defines the threshold value of the threshold circuit TH1 by a constant Vb.

As described above, even when C13 is arbitrarily set, the coefficient of Vth (C11 + C12 + C13 + C1
The capacity of C14 is set so that 4) becomes constant. For example, the reference threshold is Vth0, and TH1 to TH
Assuming that the thresholds Vth1, Vth2, Vth3, and Vth4 of 4 are Vth1 = Vth0 Vth2 = 2 × Vth0 Vth3 = 3 × Vth0 Vth4 = 4 × Vth0, C13 = Ct−1 × C11 (Vth0 / Vb) C23 = Ct -2 * C11 (Vth0 / Vb) C33 = Ct-3 * C11 (Vth0 / Vb) C43 = Ct-4 * C11 (Vth0 / Vb)

(Equation 3) Becomes If the change in C13 is compensated by C14 in this manner, the threshold values of TH1 to TH4 can be easily set.

Considering the case where the input voltage Vin rises from 0 V, when Vin = Vth1, TH1 produces a low output, SW11 conducts, and Vd1 applied to the drain of SW11 is applied to SW21. You. At this time, since TH2 does not generate a low output, SW21 is conducting, and Vd1 is output from SW2 as it is.
Also, since TH3 and TH4 also do not produce low output, S
W13 and SW14 are also open, and only Vd1 is output to the common output terminal. Therefore, Vout = Vd1. When Vin further rises and becomes Vin = Vth2, the output of TH2 opens SW21 and at the same time closes SW12. At this time, since TH3 has not yet generated a low output, the switch SW22 is conducting, and Vd2 is output from the common output as it is.

Similarly, Vin is Vth3, Vth4
, Vd3 and Vd4 are sequentially output. The above is summarized as follows. FIG. 2 is a graph showing this relationship. When Vth4 ≦ Vin <Vd4, Vout = Vd
4 When Vth3 ≦ Vin <Vth4 Vout = Vd
3 When Vth2 ≦ Vin <Vth3 Vout = Vd
2 When Vth1 ≦ Vin <Vth2, Vout = Vd
1

The relationship between Vd1 and Vd4 does not necessarily have to be monotonically increasing as described above, but may be monotonically decreasing as shown in FIG. 3, or may be a characteristic that causes an appropriate increase or decrease. As described above, the quantization circuit generates a stepwise output for each preset threshold,
Since the setting of the threshold value is performed by using the capacitive coupling and the inverter, the power consumption is greatly reduced as compared with the related art. Further, the threshold setting by the inverter and the capacitive coupling has higher accuracy than the method using the resistor.

[0015]

As described above, in the quantization circuit according to the present invention, a plurality of threshold circuits are provided in stages, and when a threshold circuit for a certain threshold generates an output, the output of the threshold circuit having a lower threshold is output. Since the cutoff is performed, there is an excellent effect that power is saved and quantization accuracy is good.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of a quantization circuit according to the present invention.

FIG. 2 is a graph showing input / output characteristics of the embodiment.

FIG. 3 is a graph showing another input / output characteristic of the embodiment.

[Explanation of symbols]

TH1 to TH4 threshold circuit SW11 to SW14, SW21 to SW23 Opening / closing means Vd1 to Vd4, Vout voltage Vin, V1 to V4 Input voltage Voff Offset voltage Vb Bias voltage C11 to C14, C21 to C2, 4C31 to C34, C
41 to C44 capacitance INV1 to INV4 inverting amplifier Vth threshold voltage

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Makoto Yamamoto 3-5-18 Kitazawa, Setagaya-ku, Tokyo Takayama Building Takayamanai Co., Ltd. (72) Inventor Osamu 3-5-18 Kitazawa, Setagaya-ku, Tokyo Takayama Bi Le Takayamauchi Co., Ltd. (72) Inventor Akira Urushiba 3-5-18 Kitazawa, Setagaya-ku, Tokyo Takayama Building Takayamauchi Co., Ltd. (56) References JP-A-64-81082 (JP, A) JP-A-5-85 343997 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H03M 1/00-1/88 H03K 5/00-5/26

Claims (1)

(57) [Claims] 1. A threshold circuit comprising: a capacitive coupling to which an input voltage, an offset voltage, a bias voltage, and a ground are respectively connected; and an inverter to which an output of the capacitive coupling is input. A threshold circuit configured to set the threshold value of the threshold circuit in a stepwise manner; the capacitance of the capacitance connected to the bias voltage is provided for each threshold circuit, and is closed when the threshold circuit generates an output. First opening / closing means to be connected; an output voltage source connected to the first terminal of each first opening / closing means and set to a different voltage value for each threshold circuit; all threshold circuits except the lowest threshold circuit A first terminal connected to the second terminal of the first opening / closing means connected to the second opening / closing means, and being opened by the output of the next higher threshold circuit; of 2 terminals and, most second terminal of the high threshold first closing means connected to the threshold circuit is connected to a common output terminal, the quantization circuit.