JP3070543B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to the manufacture of semiconductor devices .
More particularly, the present invention relates to a method for manufacturing a semiconductor device having a pattern for inspecting a corrosion state of a metal wiring under a via hole in a pre-process of manufacturing a semiconductor.

[0002]

2. Description of the Related Art Conventionally, a semiconductor device of this kind has an inspection having a plurality of inspection regions having the same opening diameter and different hole densities in order to determine the formation state of a via hole nondestructively, easily, and correctly. Has a pattern. For example, in Japanese Patent Application Laid-Open No. H8-15170, an inspection pattern having an inspection area of a plurality of holes having the same opening diameter as the holes of the semiconductor device formed on the wafer and having different densities from each other is provided. After the metal film forming process, observe the step at the boundary of the inspection region up to the inspection region of the hole density up to the inspection region of the hole density, or observe the size of the step at the boundary of the inspection region on the surface. An inspection method has been proposed in which the degree of metal layer embedding that differs depending on the hole density of the wafer is measured by measuring with a shape evaluation device.

[0003]

However, the above-described conventional inspection method has the following problems.

[0004] The first problem is that it is difficult to judge how much the corrosion state of the metal wiring under the via hole has a margin for variation in diameter.

The reason is that the hole diameter of the inspection pattern of the conventional semiconductor device is limited to the hole diameter of the semiconductor device.

The second problem is that the corrosion state of the metal wiring under the via hole is affected by the manufacturing variation of the hole opening diameter. And standardization is difficult.

The reason is the same as that of the first problem.

Accordingly, the present invention has been made in view of the above problems, and has as its object to non-destructively, easily and correctly determine the quality of the corrosion state of a metal wiring under a via hole. It is another object of the present invention to provide a method of manufacturing a semiconductor device, which achieves easy and efficient inspection.

[0009]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises a method of inspecting a metal wiring under a via hole for a corrosion state of a plurality of holes having different opening diameters or intervals. have a test pattern of holes, Vie
Easily determine the quality of corrosion of metal wiring under holes
Tei Ru.

[0010] The present invention relates to a metal wiring formed on a wafer.
On top, an interlayer insulating film is formed, then plasma etching
To form a via hole by etching
In the method for manufacturing a conductor device, the hole diameter and / or
Inspection areas with multiple holes with different tool spacing
The inspection area is formed on the wafer.
The diameter of the hole in the semiconductor device
A hole having a diameter of
Observe the corrosion state of the metal wiring using a microscope
Thus, the quality of the corrosion state of the metal wiring can be determined.
It is .

In the present invention, there are provided a plurality of inspection patterns in which a group of holes having different diameters of the holes and each having a constant hole interval are grouped.

Further, in the present invention, a plurality of inspection patterns may be provided in which a group of holes having a constant diameter of holes and different hole intervals are grouped.

[Operation] The inspection pattern of the present invention makes it easy to judge whether or not the corrosion state of the metal wiring under the via hole is good, and achieves an improvement in productivity by facilitating inspection and improving efficiency.

[0014]

Embodiments of the present invention will be described below. First, the principle of the present invention will be described.

Generally, when a via hole is formed on a wiring, the following processing is performed. That is, a silicon oxide film, BPSG
A silicon oxide film-based interlayer insulating film such as a film and a PSG film is formed, then a photoresist film is deposited on the insulating film, and the photoresist film is selectively exposed and developed to form a resist pattern. Is performed by plasma etching such as RIE (reactive ion etching) to form a via hole.

In the via hole forming step, when the insulating film is etched using the photoresist pattern as a mask, a reaction product is generated on the photoresist film and the side wall of the via hole.

[0017] The reaction product is used during the etching.
There is an advantage that highly accurate anisotropic etching is performed to protect the photoresist pattern and the side wall of the via hole.

However, there is a problem that the reaction product cannot be removed by ashing performed after the etching and remains as a residue on the side wall of the via hole after removing the resist pattern.

Therefore, generally, the wafer after the ashing is subjected to, for example, an amine stripper at 100 ° C. for 1 hour.
This is immersed in a rinsing liquid such as IPA (isopropyl alcohol) at room temperature for 5 minutes.
The reaction product is removed by performing water washing for 5 minutes after performing the treatment such as PA substitution.

However, when the diameter of the via hole becomes 0.8 μm or less, the amine-based peeling solution in the via hole is not sufficiently replaced by IPA, and the amine-based peeling solution remaining in the via hole is washed with water. , The metal wiring is corroded by a local battery effect or the like, and in the subsequent metal wiring forming step, a problem occurs that a connection failure with the metal wiring above the via hole occurs.

In general, during etching, the etching speed changes between a dense portion and a sparse portion due to a loading effect, and the etching speed becomes relatively high in a portion where the contact distribution is sparse. Excessively etched. Further, when the diameter of the hole becomes 1 μm or less, the so-called microloading effect, in which the amount of etching varies depending on the size of the diameter, becomes remarkable.

That is, the metal wiring under the hole is easily corroded when the diameter of the hole becomes 0.8 μm or less.
Variations in the hole diameter in manufacturing are greatly affected by the desired hole diameter and density.

Therefore, according to the present invention, as a test pattern, a test pattern having a different diameter or density is formed on a wafer in a process of actually manufacturing a semiconductor device, so that the corrosion state of metal wiring under a hole can be optically checked. By observing using a microscope, it is possible to determine whether or not a desired shape is formed.

Since this inspection pattern has holes of a diameter other than the holes of the semiconductor device formed on the wafer, the corrosion state of the metal wiring under the holes of different diameters can be observed, and the quality of the corrosion state can be comprehensively evaluated. Can be determined.

For this reason, in a factory that manufactures various kinds of different products, it is possible to obtain an effect that standardization of the quality judgment standard becomes easy. It is preferable that the number of holes arranged in each inspection area is three rows and three columns or more.

In a preferred embodiment, the semiconductor device of the present invention has an inspection pattern of a plurality of holes having different opening diameters or intervals for inspecting the corrosion state of the metal wiring under the via hole. The opening diameter and interval of the holes of the inspection pattern are preferably such that the hole opening diameter is 0.3.
It is in the range of 6 to 0.8 μm, and the hole interval is preferably in the range of 0.44 to 1.0 μm.

In the embodiment of the present invention, the hole interval corresponds to the hole density and is constant for each hole having a different diameter in each inspection region. It is formed so as to gradually increase as it goes to the inspection area (see FIG. 1).

In the embodiment of the present invention, the diameter of a plurality of holes is made constant and the interval between holes is variably set in one inspection area. Is formed so that the opening diameter of the hole becomes larger in the range of 0.36 to 0.8 μm as the inspection area goes (see FIG. 3).

[0029]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention;

FIG. 1 is a diagram for explaining a first embodiment of the present invention, and is a plan view schematically showing an inspection pattern. Referring to FIG. 1, the first embodiment of the present invention includes a plurality of inspection areas denoted by 1-1 to 1-n. In each of the inspection regions 1-1 to 1-n, a plurality of via holes 2 having different diameters and intervals are arranged. The diameter of the hole is 0.36-0.8 μm. The hole interval corresponds to the hole density and is set in a range of 0.44 to 1.0 μm. In one inspection region, the hole interval is constant for each hole having a different diameter. It is set so as to increase as the value becomes 1 to 1-n.

FIG. 2 is a diagram schematically showing the cross-sectional shape of the inspection pattern according to the first embodiment of the present invention. In FIG. 2, 6 is a substrate, 5 is a metal wiring, 4 is an insulating film (interlayer insulating film), 3 is a photoresist, and 2 is a formed via hole.

In the above embodiment, in the process of actually manufacturing a semiconductor device, inspection patterns of different diameters or densities are formed on a wafer, so that the corrosion state of the metal wiring 5 under the hole 2 can be determined by an optical microscope. It is possible to judge how much the corrosion state of the metal wiring under the via hole has a margin for the variation in the diameter. That is, in the above embodiment, the inspection pattern has holes with diameters other than the holes of the semiconductor device formed on the wafer, and the corrosion state of the metal wiring under the holes with different diameters can be observed, and whether the corrosion state is good or bad. Can be determined comprehensively and correctly.

FIG. 3 is a view for explaining a second embodiment of the present invention, and is a plan view schematically showing an inspection pattern. Referring to FIG. 3, the second embodiment of the present invention includes a plurality of inspection areas 7-1 to 7-n, and the inspection areas 7-1 to 7-n have different diameters and intervals. Via holes 2 are arranged in plurals.

Referring to FIG. 3, in one inspection area, a plurality of holes having a single opening diameter are arranged, and the hole interval is variably set in a range of 0.44 to 1.0 μm. The opening diameter of the hole is constant in each inspection area, but the opening diameter of the hole is set to be larger in the range of 0.36 to 0.8 μm as the inspection area changes from 7-1 to 7-n. ing.

In the second embodiment, since the holes having different densities are provided in one inspection area, the movement of the visual field is reduced, and the variation in the hole diameter due to the density of the holes can be inspected.

[0036]

As described above, according to the present invention, the following effects can be obtained.

A first effect of the present invention is that, in a process of actually manufacturing a semiconductor device, the corrosion state of metal wiring under a hole is observed using an optical microscope. This means that it is possible to determine how much margin is provided for variations in hole diameter, thereby improving inspection efficiency and contributing to improvement in reliability and yield of semiconductor devices.

The reason is that, in the present invention, a plurality of inspection patterns having a plurality of holes of different diameters or densities are formed on a wafer, and the inspection patterns are formed of holes having a diameter other than the holes of the semiconductor device formed on the wafer. This is because the corrosion state of the metal wiring under the holes having different diameters can be observed, and the quality of the corrosion state can be comprehensively and correctly determined.

The second effect of the present invention is that only a part of the test patterns need be inspected to judge whether or not the corrosion state of the metal wiring under the via hole is good. Facilitates standardization of pass / fail judgment criteria,
That's what it means. The reason is the same as the first effect.

A third effect of the present invention is that it is possible to inspect the variation in the hole diameter due to the density of the holes by reducing the movement of the visual field during the inspection.

The reason is that, in the present invention, one inspection area has a plurality of holes with different densities.

[Brief description of the drawings]

FIG. 1 is a plan view showing an inspection pattern according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a cross-sectional shape of the inspection pattern of FIG.

FIG. 3 is a plan view showing an inspection pattern according to a second embodiment of the present invention.

[Explanation of symbols]

 1-1 to 1-n inspection pattern 2 via hole 3 photoresist 4 insulating film 5 metal wiring 6 substrate 7-1 to 7-n inspection pattern

Claims (3)

(57) [Claims] A semiconductor device in which an interlayer insulating film is formed on a metal wiring formed on a wafer and then etched by plasma etching to form a via hole .
In the manufacturing method, to form the hole diameter, and / or an examination region having a plurality of holes hole spacing varies in a plurality said wafer, said test area, the diameter of the hole in which the semiconductor device has to be formed on the wafer By observing the corrosion state of the metal wiring under the hole in the inspection area using a microscope, the corrosion of the metal wiring is provided.
A method for manufacturing a semiconductor device , wherein the quality of a state can be determined. 2. The inspection apparatus according to claim 1, wherein the distance between the holes is constant for each hole having a different diameter in each inspection area. 2. The method of manufacturing a semiconductor device according to claim 1 , wherein the size gradually increases within the range. 3. An inspection area, wherein a plurality of hole opening diameters are fixed and a hole interval is variably set, and the plurality of inspection areas are arranged such that the number of holes increases from one inspection area to the other inspection area. 2. The method for manufacturing a semiconductor device according to claim 1 , wherein the opening diameter of the semiconductor device gradually increases within a predetermined range.