JP3069867U - Electronic equipment - Google Patents

Abstract

(57) [Summary] To simplify a procedure for transferring data to a buffer. Kind Code: A1 A buffer for temporarily transferring transfer data whose data amount changes within a range of 2n bytes (n is a natural number) or less, and a buffer having a fixed data area of 2n bytes and the number of bytes of the transfer data are written. Byte counter 12
And the transfer data stored in the predetermined area
1 and a transfer unit 3 whose data width at the time of transfer is a power of 2 bytes. When the transfer unit 3 transfers the transfer data to the buffer 11, the number of bytes of the transfer data is When the number of bytes becomes smaller than 2n bytes, 2n-byte data including the transfer data is transferred to the buffer 11, and the byte counter 12 is written with the number of bytes of the transfer data.

Description

[Detailed description of the invention]

[0001]

[Technical field to which the invention belongs]

 The present invention relates to an electronic device for transferring transfer data having a variable number of bytes to a buffer having a fixed number of bytes in a data area, such as 16 bytes. The present invention relates to an electronic device for transferring data having a number of bytes equal to the number of bytes of a buffer, including transfer data, even when the number of bytes is smaller than the number of bytes of a buffer.

[0002]

[Prior art]

 A printer connected to a host computer via a USB (Universal Serial Bus) requires a function of transmitting data of 16 bytes or less to the host computer. Therefore, a 16-byte buffer for temporarily storing data to be transmitted to the host computer is provided in the printer. Further, a byte counter is provided for storing the number of bytes of data transferred to the buffer. Therefore, the CPU stores the data to be transferred to the buffer in a register inside the CPU, and then transfers the data in this register to the buffer. After that, a numerical value indicating the number of bytes of the data transferred to the buffer is written in a byte counter (referred to as a first conventional technique).

[0003] One of the conventional techniques for USB data transfer is a technique proposed as Japanese Patent Application Laid-Open No. 11-88381. That is, in this technique, it is detected from the received token packet whether the data is received or transmitted. When the data is received, the display indicates that the data is received, and when the data is transmitted, the display indicates that the data is transmitted (this is referred to as a second conventional technique).

Further, there is a conventional technique proposed as Japanese Patent Application Laid-Open No. 10-326251. In other words, this technique has a configuration having a data path having a packet buffer that can be accessed by two masters provided inside the peripheral device. For this reason, the memory can be used more efficiently as compared with the related art (third related art).

[0005]

[Problems to be solved by the invention]

 However, in the first prior art, when the configuration in which the data width at the time of data transfer is 2 bytes or 4 bytes is used as the transfer means mainly including the CPU, the following problem occurs. This will be described with reference to FIG.

Now, it is assumed that data to be transferred to a buffer having an area of 16 bytes is 7 bytes. First, the CPU checks the number of bytes of data to be transferred (step S11), and if it is 4 bytes or more, transfers 4 bytes of data (step S12). Next, the process returns from step S13 to step S11, and after checking that the remaining data is less than 4 bytes, further checks whether or not the remaining data is 2 bytes or more (step S14). At this time, since two or more bytes of data remain, two-byte data transfer is performed (step S15). Thereafter, the operation proceeds from steps S13, S11, S14 to step S16, and one-byte data transfer is performed.

As described above, when transferring data to a buffer, it is necessary to check the number of bytes of data to be transferred before performing the transfer. In addition, it is necessary to branch processing according to the number of bytes of data to be transferred. This complicates the procedure of the program that describes the data transfer. Further, in the one-byte data transfer in step S16, the following problem also occurs.

That is, the configuration of the transfer means having the CPU as a main part is such that the minimum data transfer width is 2 bytes. Also, assuming that the upper one byte data is transferred to the memory address A, the lower one byte data is transferred to the memory address (A + 1). Is done. On the other hand, when only 1-byte data is stored in the internal register, this data is stored as lower-order 1-byte data in the register. Therefore, when performing 1-byte data transfer in step S16, the lower-order 1-byte data in the register is moved to the upper-order 1-byte area in the register, and then the register data is transferred to the buffer. There is a need to. For this reason, there has been a problem that the data transfer procedure is further complicated.

The second and third prior arts are difficult to apply from the viewpoint of avoiding the above-described complicated data transfer procedure.

The present invention has been made in order to solve the above-mentioned problem, and an object of the present invention is to provide a buffer having a data area of 2n bytes by using a transfer means whose data transfer width is a power of 2 bytes. When writing transfer data, even if the number of bytes of the transfer data is less than 2n bytes, transfer the data to the buffer by transferring 2n bytes of data including the transfer data to the buffer. Another object of the present invention is to provide an electronic device that can simplify the procedure of the program.

In addition to the above object, the data area of the buffer is set to an integral multiple of 4 bytes, and the transfer means is configured to have a function of executing an instruction to write 4-byte data at a time. Another object of the present invention is to provide an electronic device that can reduce the time required for data transfer to a buffer.

In addition to the above object, by using a transfer means having a function of executing a block transfer instruction for instructing data transfer of a plurality of words using 4-byte data as a word, data transfer at an assembler level is achieved. An object of the present invention is to provide an electronic device capable of reducing the number of instructions indicating a procedure.

[0013] In addition to the above-mentioned object, by connecting to a host computer via USB, the procedure for preparing data to be transmitted to the host computer connected via USB can be simplified. It is to provide an electronic device that can perform the operation.

Another object of the present invention is to provide a printer capable of simplifying a procedure for transmitting data to a host computer, in addition to the above object.

[0015]

[Means for Solving the Problems]

 In order to solve the above-mentioned problem, the electronic device according to the present invention, when n is a natural number, temporarily stores transfer data whose data amount changes within a range of 2n bytes or less, and has a data area of 2n bytes. A fixed buffer, a byte counter in which the number of bytes of transfer data is written, and transfer data stored in a predetermined area to the buffer, and data for transferring the transfer data to the buffer. A transfer means having a data width of a power of 2 (for example, 2 bytes, or 2 bytes and 4 bytes, etc.), wherein the transfer means stores transfer data in the buffer. When transferring, even when the number of bytes of the transfer data is smaller than 2n bytes, when transferring 2n bytes of data including the transfer data to the buffer, To, have a configuration writes the number of bytes in the transfer data to the byte counter.

That is, the transfer means always transfers 2n bytes of data to the buffer regardless of the number of bytes of transfer data. Then, when the transfer means transfers 2n-byte data to the buffer, the situation of transferring 1-byte data does not occur. In other words, no matter what value the number of bytes of the transfer data takes, the transfer of 1-byte data that complicates the procedure does not occur. Also, of the 2n-byte data written to the buffer, the data in the range indicated by the value written to the byte counter is the transfer data, so the transfer data and the non-transfer data are different. , Will be distinguished from each other.

In addition, in addition to the above configuration, the data area of the buffer is an integral multiple of 4 bytes, and the transfer means has a function of executing a write command for writing 4-byte data at a time.

That is, assuming that the value of 1/4 of the number of bytes in the data area of the buffer is Y, the transfer means only writes the buffer Y times, and the writing of the transfer data to the buffer is completed. .

Further, in addition to the above configuration, when 4-byte data is converted into a word, the transfer unit has a function of executing a block transfer instruction for instructing data transfer of a plurality of words by one instruction.

That is, the operation of transferring the transfer data to the buffer can be described by one assembler-level instruction.

Further, in addition to the above configuration, a communication control unit that transmits the transfer data transferred to the buffer to a host computer via a USB is provided.

That is, the procedure for preparing data to be transmitted to the host computer connected via the USB in the buffer is simplified.

Further, in addition to the above configuration, the printer is configured to print out print data received from the host computer via the USB.

That is, in a printer that prints print data from a host computer connected via USB, the procedure for preparing data to be transmitted to the host computer in a buffer is simplified.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an electrical configuration of an embodiment of the electronic device according to the present invention, and specifically shows a printer having a communication function via USB.

The printer 1 is a device that prints print data transmitted from the host computer 2 connected via a USB cable 17. When the host computer 2 requests data transmission, the host computer 2 transmits the requested data. The data transmitted at this time is data whose number of bytes changes within a range of 16 bytes or less. For this reason, when roughly classified, the printer 1 includes a CPU 4, a memory controller 5, a main memory 6, a printing unit 7, and a communication unit 15.

The communication section 15 is a block serving as an interface when communicating with the host computer 2. That is, the data requested by the host computer 2 is transmitted at the timing requested by the host computer 2. Further, it receives print data transmitted by the host computer 2. For this purpose, a buffer 11, a byte counter 12, a trigger 13, and a communication control unit 14 are provided.

The buffer 11 is a memory having a data area of 2n bytes, where n is a natural number. In the present embodiment, the buffer 11 is a memory having a data area of 16 bytes. Then, data to be transmitted to the host computer 2 (data whose number of bytes changes within a range of 16 bytes or less, hereinafter, referred to as transfer data) is stored. The byte counter 12 is a register that stores the number of bytes of transfer data stored in the buffer 11.

The trigger 13 is a 1-bit flag. When the trigger 13 is set, the buffer 11 stores transfer data, and the byte counter 12 stores the number of bytes of the transfer data. To the communication control unit 14. When reset, it notifies the communication controller 14 that the transfer data is not ready.

When the trigger 13 is set and a transmission request is received from the host computer 2, the communication control unit 14 transfers the transfer data stored in the buffer 11 and indicating the number of bytes indicated by the byte counter 12 to the USB cable. 17 to the host computer 2. On the other hand, when the trigger 13 is reset, if there is a transmission request from the host computer 2, it notifies the host computer 2 that data cannot be transmitted. Further, it receives the print data transmitted from the host computer 2 and stores it in a predetermined area.

The CPU 4 is a block for controlling main operations of the printer 1 and is an element having a data bus width of 32 bits. Further, five registers R0 to R4 (20 to 24) each having 32 bits are provided therein (other registers are not shown). The memory controller 5 is a block for matching the electrical characteristics and timing of the bus 8 of the CPU 4 with the electrical characteristics and timing of the internal bus 9.

The transfer means described in the claims comprises a block 3 comprising a CPU 4 and a memory controller 5. The CPU 4 having such a configuration will be described.

When transferring the transfer data to the buffer 11, the CPU 4 transfers 16 bytes of data including the transfer data to the buffer 11 even when the number of bytes of the transfer data becomes smaller than 16 bytes. The byte counter 12 writes the number of bytes of the transfer data. When transferring 16-byte data including the transfer data to the buffer 11, the CPU 4 transfers the 16-byte data in four times, four bytes at a time.

The function of the CPU 4 at the assembler level will be described. The CPU 4 has a function of executing an instruction to write data of a power of 2 at a time. That is, the CPU 4 has a function of executing an instruction to transfer 2-byte data at a time. Also, it has a function to execute an instruction to transfer 4-byte data at a time. In addition, when 4-byte data is converted into a word, a function of executing a block transfer instruction for instructing data transfer of a plurality of words by one instruction is provided.

The main memory 6 is a block composed of a ROM and a RAM, and stores a program executed by the CPU 4. It also provides a work area for the CPU 4. The printing unit 7 is a block including a print head, a print head drive mechanism, a print paper drive mechanism, and the like, and prints print data transmitted from the host computer 2 on print paper.

FIG. 2 is a flowchart showing a main operation when transmitting transfer data to the host computer 2. FIG. 3 is a flowchart showing an operation of transferring the transfer data to the buffer 11 at an assembler level. 4 is an explanatory diagram showing the states of the registers R0 to R3 (20 to 23). The operation of the embodiment will be described with reference to these drawings as necessary.

In the CPU 4, registers R0 to R3 (20 to 23) are used for storing transfer data. The register R4 (24) is used to indicate the transfer destination address of the transfer data (the head address of the buffer 11).

Now, it is assumed that the transfer data is 11 bytes. At this time, transfer data is prepared in the registers R0 to R3 (20 to 23) in advance. More specifically, referring to FIG. 4, the data of the first byte of the transfer data is stored in the upper byte area 201 of the register R0 (20), and the next byte of the data following the transfer data is stored. Data is stored in area 202. Hereinafter, similarly, the data of the next succeeding byte is stored as areas 203 and 204.

Then, the data of the byte following the transfer data is stored in the areas 211 to 214 of the register R1 (21) and the areas 221 to 223 of the register R2 (22). The 5-byte area consisting of the area 224 of the register R2 (22) and the areas 231 to 234 of the register R3 (23) is ignored, and the data is placed in an undefined state.

In a state immediately before the transfer data is transferred to the buffer 11, the transfer data is stored as described above. In this state, the CPU 4 performs block transfer of the 4-word data (16-byte data including 11-byte transfer data) in the registers R0 to R3 (20 to 23) to the buffer 11. Therefore, the 11-byte transfer data stored from the area 201 of the register R0 (20) to the area 223 of the register R2 (22) is transferred to the area from the head of the address of the buffer 11 to the 11th byte. Is performed (step S1).

After transferring the transfer data to the buffer 11, the CPU 4 writes the value 11 indicating the number of bytes of the transfer data to the byte counter 12 (step S2). Then, the trigger 13 is set (step S3). When a transmission request is issued from the host computer 2 in a state where the trigger 13 is set, the communication control unit 14 buffers the transfer data of the number of bytes indicated by the byte counter 12 (11-byte transfer data). Data is sequentially read from the 11th head address. Then, the read transfer data is transmitted to the host computer 2 (steps S4 and S5). As a result, the 11-byte transfer data stored from the area 201 of the register R0 (20) to the area 223 of the register R2 (22) is transmitted to the host computer 2.

A program for transferring the above-described transfer data to the buffer 11 (a program for block transfer in step S1) is as follows at an assembler level. First, an instruction (step S7) for storing a value indicating the head address of the buffer 11 in the register R4 (24) is described. Then, a block transfer instruction (step S8) for transferring data of four words stored in the registers R0 (20) to R3 (23) is described using the register R4 (24) as a pointer indicating the start address of the transfer destination. I do. By the description of these two instructions, a program for transferring the transfer data to the buffer 11 is completed.

When the number of bytes of the transfer data is, for example, 8 bytes, the transfer data ranges from the area 201 of the register R0 (20) to the area 214 of the register R1 (21). Is prepared. Then, the contents of the registers R2 (22) and R3 (23) are ignored. In this state, 16-byte data from the area 201 of the register R0 (20) to the area 234 of the register R3 (23) is transferred to the buffer 11. The value 8 is written to the byte counter 12. Therefore, the communication control unit 14 transmits eight bytes of data from the head address of the buffer 11 to the host computer 2.

If the number of bytes of the transfer data is, for example, 16 bytes, the transfer data is transferred from the area 201 of the register R0 (20) to the area 234 of the register R3 (23). Data is prepared. In this state, 16 bytes of data from the area 201 of the register R0 (20) to the area 234 of the register R3 (23) are transferred to the buffer 11. The value 16 is written to the byte counter 12. For this reason, the communication control unit 14 transmits 16 bytes of data from the head address of the buffer 11 to the host computer 2.

As described above, the transfer operation described above does not require a procedure for determining the number of bytes of transfer data. Also, no matter what value the number of bytes of transfer data takes, the operation is such that transfer of 1-byte data does not occur. Therefore, the procedure of the program for transferring the transfer data to the buffer 11 is simplified.

Further, the operation of transferring the data for transfer to the buffer 11 is completed only by transferring the data of one word at a time four times. As a result, the throughput of the CPU 4 is improved, so that the CPU 4 can be allocated more to other tasks.

At the assembler level, a program for transferring the transfer data to the buffer 11 is described only by describing the above two instructions. That is, when a program for transferring the transfer data to the buffer 11 is described at the assembler level, the program is shortened.

The description of the operation when transferring the transfer data to the buffer 11 has been completed, and a supplementary operation will be described below. Now, it is assumed that print data is transmitted from the host computer 2 and received by the communication control unit 14. At this time, the CPU 4 controls the printing unit 7 to print the print data transmitted from the host computer 2 on printing paper.

Note that the present invention is not limited to the above embodiment, and the case where the buffer 11 has 16 bytes has been described. However, if the buffer 11 is an integral multiple of 4 bytes, the buffer 11 may have an arbitrary number of bytes. Has become possible.

The instruction for block-transferring 16-byte data including the transfer data to the buffer 11 has been described in the case where the instruction using the register R4 (24) as a pointer is used. This instruction can be used if the previous address can be specified as an immediate value. It is also possible to use a block transfer instruction in any other addressing mode.

[0051]

[Effect of the invention]

 As described above, the electronic device according to the present invention, when n is a natural number, temporarily stores transfer data whose data amount changes within a range of 2n bytes or less, and its data area is reduced to 2n bytes. A fixed buffer, a byte counter in which the number of bytes of transfer data is written, and a data width for transferring the transfer data stored in a predetermined area to the buffer and transferring the transfer data to the buffer. Is a power-of-two byte, the transfer means transfers the transfer data to the buffer even when the number of bytes of the transfer data is less than 2n bytes. 2n bytes of data including data is transferred to the buffer, and the number of bytes of the transfer data is written in the byte counter. To have. Therefore, the transfer means always transfers 2n bytes of data to the buffer, regardless of the number of bytes of the transfer data. For this reason, no matter what the number of bytes of data to be transferred is, no one-byte data transfer, which complicates the procedure, occurs, so that the procedure of the program for transferring data to the buffer can be simplified. It is possible.

Further, the data area of the buffer is an integral multiple of 4 bytes, and the transfer means has a function of executing a write command for writing 4-byte data at a time. Therefore, if the value of 1/4 of the number of bytes in the data area of the buffer is Y, the transfer means only transfers the data to the buffer Y times, and the transfer of the transfer data ends. It is possible to reduce the time required for data transfer.

Further, when 4-byte data is converted into a word, the transfer means is configured to have a function of executing a block transfer instruction instructing data transfer of a plurality of words by one instruction. Therefore, the operation of transferring the transfer data to the buffer can be described by one assembler-level instruction, so that the number of assembler-level instructions indicating the data transfer procedure can be reduced. ing.

Further, a communication control unit for transmitting the transfer data transferred to the buffer to the host computer via USB is provided. Therefore, it is possible to simplify the procedure for preparing data to be transmitted to the host computer connected via the USB in the buffer.

Further, the printer is configured to print the print data received from the host computer via the USB. That is, in a printer that prints print data from a host computer connected via USB, the procedure for preparing data to be transmitted to the host computer in a buffer is simplified, and the data is stored in the host computer. A printer that can simplify the procedure for sending a message is provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an electrical configuration of an embodiment (printer) of an electronic device according to the present invention.

FIG. 2 is a flowchart illustrating main operations when transmitting transfer data to a host computer.

FIG. 3 is a flowchart showing an operation of transferring transfer data to a buffer at an assembler level.

FIG. 4 is an explanatory diagram showing states of registers R0 to R3 in a CPU.

FIG. 5 is a flowchart illustrating a transfer procedure according to the related art.

[Explanation of symbols]

 Reference Signs List 1 printer 2 host computer 3 transfer means 4 CPU 11 buffer 12 byte counter 14 communication control unit 15 communication unit 17 USB cable 20 to 24 register

Claims (5)

[Utility model registration claims] When n is a natural number, the data amount is 2n
A buffer having a data area fixed at 2n bytes, a byte counter in which the number of bytes of the transfer data is written, and a transfer counter stored in a predetermined area. Transfer means for transferring data to the buffer and transferring the transfer data to the buffer, wherein the transfer means has a data width of a power of 2 bytes, wherein the transfer means stores the transfer data in the buffer. When the number of bytes of the transfer data is smaller than 2n bytes, 2n bytes of data including the transfer data is transferred to the buffer and the number of bytes of the transfer data is written in the byte counter. An electronic device, comprising: 2. The data area of the buffer is an integral multiple of 4 bytes, and the transfer means has a function of executing a write command for writing 4-byte data at a time. Electronic devices. 3. The transfer means according to claim 2, wherein when 4-byte data is converted into a word, said transfer means has a function of executing a block transfer instruction instructing data transfer of a plurality of words by one instruction. Electronic devices. 4. The communication apparatus according to claim 1, further comprising a communication control unit for transmitting the transfer data transferred to said buffer to a host computer via a USB.
The electronic device according to any of the above. 5. The electronic device according to claim 4, wherein the printer is a printer that prints print data received from a host computer via the USB.